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2019-08-03arm64: dts: imx8mq: correct usb controller clocksLi Jun1-4/+4
The correct clock for "bus_early", "ref", "suspend" should be: IMX8MQ_CLK_USB1_CTRL_ROOT, IMX8MQ_CLK_USB_CORE_REF, IMX8MQ_CLK_32K, especially we may need the right suspend clock rate to set register in controller driver. Signed-off-by: Li Jun <jun.li@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Add clock for TMU nodeAnson Huang1-0/+1
i.MX8MQ has clock gate for TMU module, add clock info to TMU node for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Correct OPP table according to latest datasheetAnson Huang1-3/+2
According to latest datasheet (Rev.1, 10/2018) from below links, in the consumer datasheet, 1.5GHz is mentioned as highest opp but depends on speed grading fuse, and in the industrial datasheet, 1.3GHz is mentioned as highest opp but depends on speed grading fuse. 1.5GHz and 1.3GHz opp use same voltage, so no need for consumer part to support 1.3GHz opp, with same voltage, CPU should run at highest frequency in order to go into idle as quick as possible, this can save power. That means for consumer part, 1GHz/1.5GHz are supported, for industrial part, 800MHz/1.3GHz are supported, and then check the speed grading fuse to limit the highest CPU frequency further. Correct the market segment bits in opp table to make them work according to datasheets. https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQIEC.pdf https://www.nxp.com/docs/en/data-sheet/IMX8MDQLQCEC.pdf Fixes: 12629c5c3749 ("arm64: dts: imx8mq: Add cpu speed grading and all OPPs") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Correct OPP table according to latest datasheetAnson Huang1-2/+1
According to latest datasheet (Rev.0.2, 04/2019) from below links, 1.8GHz is ONLY available for consumer part, so the market segment bits for 1.8GHz opp should ONLY available for consumer part accordingly. https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf https://www.nxp.com/docs/en/data-sheet/IMX8MMCEC.pdf Fixes: f403a26c865b (arm64: dts: imx8mm: Add cpu speed grading and all OPPs) Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Add "fsl,imx8mq-src" as src's fallback compatibleAnson Huang1-1/+1
i.MX8MM can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as src's fallback compatible to enable it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8m: Add ddr-pmu nodesLeonard Crestez2-0/+14
The same ddr perfomance counter IP from 8qxp is also available on imx8m series so add it to dts. Tested with `perf stat` and `memtester` on imx8mm-evk and obtained plausible results. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Frank Li <frank.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm-evk: enable usb1 and typec supportLi Jun1-0/+65
USB1 port has typec connector with power delivery support: - Dual data role: host and device. - Dual power role: source and sink, prefer power sink. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REFLi Jun1-8/+4
Since IMX8MM_CLK_USB_CORE_REF is not used at all, so remove the setting for it. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Add gpio-ranges propertyAnson Huang1-0/+5
Add "gpio-ranges" property to establish connections between GPIOs and PINs on i.MX8MM pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mq: Add gpio-ranges propertyAnson Huang1-0/+5
Add "gpio-ranges" property to establish connections between GPIOs and PINs on i.MX8MQ pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8mm: Init rates and parents configs for clocksAbel Vesa1-0/+12
Add the initial configuration for clocks that need default parent and rate setting. This is based on the vendor tree clock provider parents and rates configuration except this is doing the setup in dts rather than using clock consumer API in a clock provider driver. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03ARM: imx_v6_v7_defconfig: Select the OV5645 camera driverFabio Estevam1-0/+1
OV5645 camera sensor can be used on several i.MX boards, such as imx6qdl-wandboard, imx7d-pico, imx6ul-pico, etc. Select the OV5645 driver by default. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03ARM: dts: imx6qdl-wandboard: Add OV5645 camera supportEzequiel Garcia1-4/+69
imx6qdl-wandboard can be connected to a OV5645 camera via MIPI CSI port. Add support for it. PAD_GPIO_6 has been originally used for the Ethernet FEC ERR006687 workaround, but it needs to be used to provide the camera sensor clock, so adjust it accordingly. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03parisc: Add assembly implementations for memset, strlen, strcpy, strncpy and strcatHelge Deller5-93/+157
Add performance-optimized versions of some string functions. Signed-off-by: Helge Deller <deller@gmx.de> Tested-by: Sven Schnelle <svens@stackframe.org>
2019-08-03parisc: trigger die notifier chain in parisc_terminate()Sven Schnelle1-0/+2
This will trigger kgdb/kdb when they are enabled. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Helge Deller <deller@gmx.de>
2019-08-03parisc/ftrace: Add KPROBES_ON_FTRACESven Schnelle3-3/+156
Allow KPROBES to use the ftrace infrastructure on PA-RISC. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Helge Deller <deller@gmx.de>
2019-08-03parisc/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS supportSven Schnelle2-2/+7
Pass ftrace_ops to ftrace functions to ftrace_trace_function(). Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Helge Deller <deller@gmx.de>
2019-08-02arm64: dts: fsl: ls1028a: Enable eth port1 on the ls1028a QDS boardClaudiu Manoil2-0/+46
LS1028a has one Ethernet management interface. On the QDS board, the MDIO signals are multiplexed to either on-board AR8035 PHY device or to 4 PCIe slots allowing for SGMII cards. To enable the Ethernet ENETC Port 1, which can only be connected to a RGMII PHY, the multiplexer needs to be configured to route the MDIO to the AR8035 PHY. The MDIO/MDC routing is controlled by bits 7:4 of FPGA board config register 0x54, and value 0 selects the on-board RGMII PHY. The FPGA board config registers are accessible on the i2c bus, at address 0x66. The PF3 MDIO PCIe integrated endpoint device allows for centralized access to the MDIO bus. Add the corresponding devicetree node and set it to be the MDIO bus parent. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-03ARM: dts: rockchip: Add pin names for rk3288-veyron fievelMatthias Kaehlcke1-0/+214
This is like commit 0ca87bd5baa6 ("ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry") and other similar commits, but for the veyron fievel board (and tiger, which includes the fievel .dtsi). Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-03ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger}Matthias Kaehlcke3-31/+38
Fix/improve a few things for veyron fievel/tiger: - move 'vccsys' regulator from tiger to fievel, both boards have it (and tiger includes the fievel .dtsi) - move 'ext_gmac' node below regulators - fix GPIO ids of vcc5_host1 and vcc5_host2 regulators - remove reset configuration from 'gmac' node, this is already done in rk3288.dtsi - fixed style issues of some multi-line comments - switch 'vcc18_lcdt', 'vdd10_lcd' and 'vcc33_ccd' regulators off during suspend - no pull-up on the Bluetooth wake-up pin, there is an external pull-up. The signal is active low, add the 'bt_host_wake_l' pinctrl config - move BC 1.2 pins up in the pinctrl config to keep 'wake only' pins separate - add BC 1.2 pins to sleep config Fixes: 0067692b662e ("ARM: dts: rockchip: add veyron-fievel board") Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-02Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds17-65/+116
Pull arm64 fixes from Catalin Marinas: - Update the compat layer to allow single-byte watchpoints on all addresses (similar to the native support) - arm_pmu: fix the restoration of the counters on the CPU_PM_ENTER_FAILED path - Fix build regression with vDSO and Makefile not stripping CROSS_COMPILE_COMPAT - Fix the CTR_EL0 (cache type register) sanitisation on heterogeneous machines (e.g. big.LITTLE) - Fix the interrupt controller priority mask value when pseudo-NMIs are enabled - arm64 kprobes fixes: recovering of the PSTATE.D flag in the single-step exception handler, NOKPROBE annotations for unwind_frame() and walk_stackframe(), remove unneeded rcu_read_lock/unlock from debug handlers - Several gcc fall-through warnings - Unused variable warnings * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: Make debug exception handlers visible from RCU arm64: kprobes: Recover pstate.D in single-step exception handler arm64/mm: fix variable 'tag' set but not used arm64/mm: fix variable 'pud' set but not used arm64: Remove unneeded rcu_read_lock from debug handlers arm64: unwind: Prohibit probing on return_address() arm64: Lower priority mask for GIC_PRIO_IRQON arm64/efi: fix variable 'si' set but not used arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG} arm64: vdso: Fix Makefile regression arm64: module: Mark expected switch fall-through arm64: smp: Mark expected switch fall-through arm64: hw_breakpoint: Fix warnings about implicit fallthrough drivers/perf: arm_pmu: Fix failure path in PM notifier arm64: compat: Allow single-byte watchpoints on all addresses
2019-08-02Merge branch 'parisc-5.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds7-6/+12
Pull parisc fixes from Helge Deller: "A few small fixes for the parisc architecture: - Fix fall-through warnings in parisc math emu code - Fix vmlinuz linking failure with debug-enabled kernels - Fix a race condition in kernel live-patching code - Add missing archclean Makefile target & defconfig adjustments" * 'parisc-5.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Add archclean Makefile target parisc: Strip debug info from kernel before creating compressed vmlinuz parisc: Fix build of compressed kernel even with debug enabled parisc: fix race condition in patching code parisc: rename default_defconfig to defconfig parisc: Fix fall-through warnings in fpudispatch.c parisc: Mark expected switch fall-throughs in fault.c
2019-08-02Merge tag 's390-5.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linuxLinus Torvalds12-236/+382
Pull s390 updates from Vasily Gorbik: - Default configs updates - Minor qdio cleanup - Sparse warnings fixes - Implicit-fallthrough warnings fixes * tag 's390-5.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/zcrypt: adjust switch fall through comments for -Wimplicit-fallthrough vfio-ccw: make vfio_ccw_async_region_ops static s390/3215: add switch fall through comment for -Wimplicit-fallthrough s390/tape: add fallthrough annotations s390/mm: add fallthrough annotations s390/mm: make gmap_test_and_clear_dirty_pmd static s390/kexec: add missing include to machine_kexec_reloc.c s390/perf: make cf_diag_csd static s390/lib: add missing include s390/boot: add missing declarations and includes s390: update configs s390: clean up qdio.h
2019-08-02Merge tag 'arm-swiotlb-5.3' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds4-1/+74
Pull arm swiotlb support from Christoph Hellwig: "This fixes a cascade of regressions that originally started with the addition of the ia64 port, but only got fatal once we removed most uses of block layer bounce buffering in Linux 4.18. The reason is that while the original i386/PAE code that was the first architecture that supported > 4GB of memory without an iommu decided to leave bounce buffering to the subsystems, which in those days just mean block and networking as no one else consumed arbitrary userspace memory. Later with ia64, x86_64 and other ports we assumed that either an iommu or something that fakes it up ("software IOTLB" in beautiful Intel speak) is present and that subsystems can rely on that for dealing with addressing limitations in devices. Except that the ARM LPAE scheme that added larger physical address to 32-bit ARM did not follow that scheme and thus only worked by chance and only for block and networking I/O directly to highmem. Long story, short fix - add swiotlb support to arm when build for LPAE platforms, which actuallys turns out to be pretty trivial with the modern dma-direct / swiotlb code to fix the Linux 4.18-ish regression" * tag 'arm-swiotlb-5.3' of git://git.infradead.org/users/hch/dma-mapping: arm: use swiotlb for bounce buffering on LPAE configs dma-mapping: check pfn validity in dma_common_{mmap,get_sgtable}
2019-08-02ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI supportPatrice Chotard1-0/+1
Enable support for QSPI block on STM32 SoCs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: multi_v7_defconfig: enable STM32 booster regulatorFabrice Gasnier1-0/+1
This enables the driver for STM32 booster regulator found on stm32mp1. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: multi_v7_defconfig: add FMC2 NAND controller supportChristophe Kerello1-0/+1
This patch adds FMC2 NAND controller support used by STM32MP SOCs. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrlAlexandre Torgue1-24/+0
This patch removes "ngpios" and "gpio-ranges" information from stm32mp157-pinctrl.dtsi file as it is now filled in stm32mp157 pinctrl package files. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1Yannick Fertré1-0/+1
The dsi physical layer is powered by the 1v8 power controller supply. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 boardOlivier Moysan1-0/+89
Add support of Cirrus cs42l51 audio codec on stm32mp157a-dk1 board. Configuration overview: - SAI2A is the CPU interface used for the codec audio playback - SAI2B is the CPU interface used for the codec audio record - SAI2A is configured as a clock provider for the audio codec - SAI2A&B are configured as slave of the audio codec - SAI2A&B share the same interface of the audio codec Note: In master mode, cs42l51 audio codec provides a bitclock at 64 x FS, regardless of data width. This means that slot width is always 32 bits. Set slot width to 32 bits and slot number to 2 in SAI2A&B endpoint nodes, to match this constraint. dai-tdm-slot-num and dai-tdm-slot-width properties are used here, assuming that i2s is a special case of tdm, where slot number is 2. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add syscfg to ADC on stm32mp157cFabrice Gasnier1-0/+1
On stm32mp157c, the ADC inputs are multiplexed with analog switches which have reduced performances when their supply is below 2.7V (vdda by default). Add syscfg registers that can be used on stm32mp157c, to get full ADC analog performances. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add pwm cells to stm32f746Fabrice Gasnier1-0/+12
STM32 Timers support generic 3 cells PWM to encode PWM number, period and polarity. Fixes: 9bd7b77af8e4 ("ARM: dts: stm32: add Timers driver for stm32f746 MCU") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add pwm cells to stm32f429Fabrice Gasnier1-0/+12
STM32 Timers support generic 3 cells PWM to encode PWM number, period and polarity. Fixes: c0e14fc712d9 ("ARM: dts: stm32: add Timers driver for stm32f429 MCU") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add pwm cells to stm32mp157cFabrice Gasnier1-0/+12
STM32 Timers support generic 3 cells PWM to encode PWM number, period and polarity. Fixes: 61fc211c484d ("ARM: dts: stm32: add timers support to stm32mp157c") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcanErwan Le Ray1-1/+1
Fix compilations warnings detected by -Wall W=1 compilation option: - node has a unit name, but no reg property Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add booster for ADC analog switches on stm32mp157cFabrice Gasnier1-0/+6
Booster for ADC analog input switches can be used when Vdda is below 2.7V to get maximum ADC analog performances. Add booster for ADC analog switches on stm32mp157c. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1Fabien Dessenne1-0/+10
Enable m4 coprocessor for STM32MP157a-dk1 board. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1Fabien Dessenne1-0/+36
Declare reserved memories shared by the processors for STM32MP157a-dk1 Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1Fabien Dessenne1-0/+10
Enable m4 coprocessor for STM32MP157c-ed1 board. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1Fabien Dessenne1-0/+36
Declare reserved memories shared by the processors for STM32MP157c-ed1 board. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add m4 remoteproc support on STM32MP157cFabien Dessenne1-0/+20
Declare the M4 remote processor in a sub-node of the mlahb simple bus. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-evalFabrice Gasnier1-0/+1
Add missing vdda-supply required by STM32 ADC. Fixes: 090992a9ca54 ("ARM: dts: stm32: enable ADC on stm32h743i-eval board") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-evalFabrice Gasnier1-0/+7
Add missing vdda-supply required by STM32 ADC. Fixes: 7465d81191a1 ("ARM: dts: stm32: enable ADC on stm32f429i-eval board") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02ARM: dts: stm32: remove fixed regulator unit address on stm32429i-evalFabrice Gasnier1-12/+6
vref fixed regulator shouldn't have unit address and reg properties. Rename the label and phandle to "vref" according to the schematics. Also remove it from simple-bus. Fixes: 7465d81191a1 ("ARM: dts: stm32: enable ADC on stm32f429i-eval board") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-02olpc: x01: convert platform driver to use dev_groupsGreg Kroah-Hartman1-10/+7
Platform drivers now have the option to have the platform core create and remove any needed sysfs attribute files. So take advantage of that and do not register "by hand" a lid sysfs file. Cc: Darren Hart <dvhart@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: x86@kernel.org Cc: platform-driver-x86@vger.kernel.org Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20190731124349.4474-7-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-08-02arm64: Make debug exception handlers visible from RCUMasami Hiramatsu1-8/+49
Make debug exceptions visible from RCU so that synchronize_rcu() correctly track the debug exception handler. This also introduces sanity checks for user-mode exceptions as same as x86's ist_enter()/ist_exit(). The debug exception can interrupt in idle task. For example, it warns if we put a kprobe on a function called from idle task as below. The warning message showed that the rcu_read_lock() caused this problem. But actually, this means the RCU is lost the context which is already in NMI/IRQ. /sys/kernel/debug/tracing # echo p default_idle_call >> kprobe_events /sys/kernel/debug/tracing # echo 1 > events/kprobes/enable /sys/kernel/debug/tracing # [ 135.122237] [ 135.125035] ============================= [ 135.125310] WARNING: suspicious RCU usage [ 135.125581] 5.2.0-08445-g9187c508bdc7 #20 Not tainted [ 135.125904] ----------------------------- [ 135.126205] include/linux/rcupdate.h:594 rcu_read_lock() used illegally while idle! [ 135.126839] [ 135.126839] other info that might help us debug this: [ 135.126839] [ 135.127410] [ 135.127410] RCU used illegally from idle CPU! [ 135.127410] rcu_scheduler_active = 2, debug_locks = 1 [ 135.128114] RCU used illegally from extended quiescent state! [ 135.128555] 1 lock held by swapper/0/0: [ 135.128944] #0: (____ptrval____) (rcu_read_lock){....}, at: call_break_hook+0x0/0x178 [ 135.130499] [ 135.130499] stack backtrace: [ 135.131192] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.2.0-08445-g9187c508bdc7 #20 [ 135.131841] Hardware name: linux,dummy-virt (DT) [ 135.132224] Call trace: [ 135.132491] dump_backtrace+0x0/0x140 [ 135.132806] show_stack+0x24/0x30 [ 135.133133] dump_stack+0xc4/0x10c [ 135.133726] lockdep_rcu_suspicious+0xf8/0x108 [ 135.134171] call_break_hook+0x170/0x178 [ 135.134486] brk_handler+0x28/0x68 [ 135.134792] do_debug_exception+0x90/0x150 [ 135.135051] el1_dbg+0x18/0x8c [ 135.135260] default_idle_call+0x0/0x44 [ 135.135516] cpu_startup_entry+0x2c/0x30 [ 135.135815] rest_init+0x1b0/0x280 [ 135.136044] arch_call_rest_init+0x14/0x1c [ 135.136305] start_kernel+0x4d4/0x500 [ 135.136597] So make debug exception visible to RCU can fix this warning. Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Acked-by: Paul E. McKenney <paulmck@linux.ibm.com> Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-02arm64: kprobes: Recover pstate.D in single-step exception handlerMasami Hiramatsu2-34/+8
kprobes manipulates the interrupted PSTATE for single step, and doesn't restore it. Thus, if we put a kprobe where the pstate.D (debug) masked, the mask will be cleared after the kprobe hits. Moreover, in the most complicated case, this can lead a kernel crash with below message when a nested kprobe hits. [ 152.118921] Unexpected kernel single-step exception at EL1 When the 1st kprobe hits, do_debug_exception() will be called. At this point, debug exception (= pstate.D) must be masked (=1). But if another kprobes hits before single-step of the first kprobe (e.g. inside user pre_handler), it unmask the debug exception (pstate.D = 0) and return. Then, when the 1st kprobe setting up single-step, it saves current DAIF, mask DAIF, enable single-step, and restore DAIF. However, since "D" flag in DAIF is cleared by the 2nd kprobe, the single-step exception happens soon after restoring DAIF. This has been introduced by commit 7419333fa15e ("arm64: kprobe: Always clear pstate.D in breakpoint exception handler") To solve this issue, this stores all DAIF bits and restore it after single stepping. Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Fixes: 7419333fa15e ("arm64: kprobe: Always clear pstate.D in breakpoint exception handler") Reviewed-by: James Morse <james.morse@arm.com> Tested-by: James Morse <james.morse@arm.com> Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-02ARM: dts: aspeed: tiogapass: Add Riser cardVijay Khemka1-0/+230
Added i2c mux for riser card and multiple ava card and its sensor components for Facebook tiogapass platform Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02ARM: dts: aspeed: tiogapass: Move battery sensorVijay Khemka1-5/+1
Moved adc7 hwmon battery sensor to correct label to be read by single applications for all adc sensors. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-02asm-generic: Remove redundant arch-specific rules for simd.hHerbert Xu2-2/+0
Now that simd.h is in include/asm-generic/Kbuild we don't need the arch-specific Kbuild rules for them. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Fixes: 82cb54856874 ("asm-generic: make simd.h a mandatory...") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>