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2021-12-16arm64: tegra: Rename GPIO hog nodes to match schemaThierry Reding1-1/+1
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unsupported regulator propertiesThierry Reding2-13/+0
Remove the unsupported "regulator-disable-ramp-delay" properties which ended up in various DTS files for some reason. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename TCU node to "serial"Thierry Reding1-1/+1
The TCU is basically a serial port (albeit a fancy one), so it should be named "serial". Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clockThierry Reding1-3/+2
The "core_m" clock is not documented in the Tegra194 PCIe device tree bindings, so remove it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unused properties for Tegra194 PCIeThierry Reding1-15/+0
The num-viewport property is never used and can be dropped, whereas the "iommus" property is not needed since we use "iommu-map-mask" and "iommu-map" already. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix Tegra194 HSP compatible stringThierry Reding1-2/+2
The HSP instances on Tegra194 are not fully compatible with the version found on Tegra186, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unsupported nvidia,lpdr propertyThierry Reding1-2/+0
The Tegra194 pinmux DT bindings do not define the nvidia,lpdr property, so drop them from the device trees that have listed them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Use JEDEC vendor prefix for SPI NOR flash chipsThierry Reding2-2/+2
The standard "jedec," vendor prefix should be used for SPI NOR flash chips. This allows the right DT schema to be picked for validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unit-address for audio card graph endpointsThierry Reding3-7/+7
Audio graph endpoints don't have a "reg" property, so they shouldn't have a unit-address either. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Adjust length of CCPLEX cluster MMIO regionThierry Reding1-1/+1
The Tegra186 CCPLEX cluster register region is 4 MiB is length, not 4 MiB - 1. This was likely presumed to be the "limit" rather than length. Fix it up. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix Tegra186 compatible string listThierry Reding1-9/+9
The I2C controller found on Tegra186 is not fully compatible with the Tegra210 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename power-monitor input nodesThierry Reding3-16/+16
Child nodes of the TI INA3221 power monitor device tree node should be called input@* according to the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename thermal zones nodesThierry Reding8-55/+49
The DT schema requires that nodes representing thermal zones include a "-thermal" suffix in their name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Sort Tegra132 XUSB clocks correctlyThierry Reding1-2/+2
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Drop unused AHCI clocks on Tegra132Thierry Reding1-4/+2
The CML1 and PLL_E clocks are never explicitly used by the AHCI controller found on Tegra132, so drop them from the corresponding device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix Tegra132 I2C compatible string listThierry Reding1-6/+6
The I2C controller found on Tegra124 is not fully compatible with the Tegra114 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add OPP tables on Tegra132Thierry Reding2-1/+438
Add peripheral OPP tables on Tegra132 and wire them up to ACTMON and the EMC. While at it, add the missing "#interconnect-cells" properties to the memory controller and external memory controller nodes. Also set the "#reset-cells" property for the memory controller because it exports the hotflush reset controls. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix compatible string for Tegra132 timerThierry Reding1-1/+1
The TKE (time-keeping engine) found on Tegra132 is not backwards compatible with the version found on Tegra20, so update the compatible string list accordingly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Remove unsupported properties on NorrinThierry Reding1-2/+0
The Tegra PMC device tree bindings don't support the "#wake-cells" and "nvidia,reset-gpio" properties, so remove them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fix unit-addresses on NorrinThierry Reding1-3/+3
The AS3722 pinmux device tree node doesn't have a "reg" property and therefore must not have a unit-address, so drop it. While at it, add missing unit-addresses for the charger and smart battery IC's on the ChromeOS embedded controller's I2C tunnel bus. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add native timer support on Tegra186Thierry Reding1-0/+16
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add the device tree node on Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename top-level regulatorsThierry Reding12-86/+86
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename top-level clocksThierry Reding6-6/+6
Clocks defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the clock to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add ISO SMMU controller for Tegra194Jon Hunter1-0/+76
The display controllers are attached to a separate ARM SMMU instance that is dedicated to servicing isochronous memory clients. Add this ISO instance of the ARM SMMU to device tree. Please note that the display controllers are not hooked up to this SMMU yet, because we are still missing a means to transition framebuffers used by the bootloader to the kernel. This based upon an initial patch by Thierry Reding <treding@nvidia.com>. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add NVENC and NVJPG nodes for Tegra186 and Tegra194Jon Hunter2-0/+84
Populate the device-tree nodes for NVENC and NVJPG Host1x engines on Tegra186 and Tegra194. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add support to enumerate SD in UHS modePrathamesh Shete1-0/+34
Add support to enumerate SD in UHS mode on Tegra194. Add required device-tree properties in SDMMC1 and SDMMC3 instances to enable dynamic pad voltage switching and enumerate SD card in UHS-I modes. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add NVIDIA Jetson AGX Orin Developer Kit supportMikko Perttunen4-0/+55
The Jetson AGX Orin Developer Kit is a continuation of the Jetson Developer Kit line using the new NVIDIA Tegra234 (Orin) SoC. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Describe Tegra234 CPU hierarchyThierry Reding1-2/+363
The NVIDIA Tegra234 SoC has 3 clusters of 4 Cortex-A78AE CPU cores each, for a total of 12 CPUs. Each CPU has 64 KiB instruction and data caches with each cluster having an additional 256 KiB unified L2 cache and a 2 MiB L3 cache. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add main and AON GPIO controllers on Tegra234Thierry Reding1-0/+74
These two controllers expose general purpose I/O pins that can be used to control or monitor a variety of signals. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add Tegra234 TCU deviceMikko Perttunen1-0/+8
Add a device for TCU (Tegra Combined UART) used for serial console. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fill in properties for Tegra234 eMMCMikko Perttunen1-3/+16
Add missing properties to the eMMC controller, as required to use it on actual hardware. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Update Tegra234 BPMP channel addressesMikko Perttunen1-6/+6
On final Tegra234 systems, shared memory for communication with BPMP is located at offset 0x70000 in SYSRAM. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Add clock for Tegra234 RTCMikko Perttunen1-0/+2
The RTC device requires a clock. Add it. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Fixup SYSRAM referencesThierry Reding3-6/+6
The json-schema bindings for SRAM expect the nodes to be called "sram" rather than "sysram" or "shmem". Furthermore, place the brackets around the SYSRAM references such that a two-element array is created rather than a two-element array nested in a single-element array. This is not relevant for device tree itself, but allows the nodes to be properly validated against json-schema bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16MIPS: OCTEON: add put_device() after of_find_device_by_node()Ye Guojin2-0/+3
This was found by coccicheck: ./arch/mips/cavium-octeon/octeon-platform.c, 332, 1-7, ERROR missing put_device; call of_find_device_by_node on line 324, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-platform.c, 395, 1-7, ERROR missing put_device; call of_find_device_by_node on line 387, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-usb.c, 512, 3-9, ERROR missing put_device; call of_find_device_by_node on line 515, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-usb.c, 543, 1-7, ERROR missing put_device; call of_find_device_by_node on line 515, but without a corresponding object release within this function. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Ye Guojin <ye.guojin@zte.com.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16MIPS: BCM47XX: Replace strlcpy with strscpyJason Wang1-1/+1
The strlcpy should not be used because it doesn't limit the source length. As linus says, it's a completely useless function if you can't implicitly trust the source string - but that is almost always why people think they should use it! All in all the BSD function will lead some potential bugs. But the strscpy doesn't require reading memory from the src string beyond the specified "count" bytes, and since the return value is easier to error-check than strlcpy()'s. In addition, the implementation is robust to the string changing out from underneath it, unlike the current strlcpy() implementation. Thus, We prefer using strscpy instead of strlcpy. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: fix Kconfig reference to PHYS_ADDR_T_64BITLukas Bulwahn1-1/+1
Commit d4a451d5fc84 ("arch: remove the ARCH_PHYS_ADDR_T_64BIT config symbol") removes config ARCH_PHYS_ADDR_T_64BIT with all instances of that config refactored appropriately. Since then, it is recommended to use the config PHYS_ADDR_T_64BIT instead. Commit 171543e75272 ("MIPS: Disallow CPU_SUPPORTS_HUGEPAGES for XPA,EVA") introduces the expression "!(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))" for config CPU_SUPPORTS_HUGEPAGES, which unintentionally refers to the non-existing symbol ARCH_PHYS_ADDR_T_64BIT instead of the intended PHYS_ADDR_T_64BIT. Fix this Kconfig reference to the intended PHYS_ADDR_T_64BIT. This issue was identified with the script ./scripts/checkkconfigsymbols.py. I then reported it on the mailing list and Paul confirmed the mistake in the linked email thread. Link: https://lore.kernel.org/lkml/H8IU3R.H5QVNRA077PT@crapouillou.net/ Suggested-by: Paul Cercueil <paul@crapouillou.net> Fixes: 171543e75272 ("MIPS: Disallow CPU_SUPPORTS_HUGEPAGES for XPA,EVA") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: txx9: remove left-over for removed TXX9_ACLC configsLukas Bulwahn2-31/+0
The patch series "Remove support for TX49xx" (see Link) was only partially applied: The ASoC driver was removed with commit a8644292ea46 ("ASoC: txx9: Remove driver"), which was patch 10/10 from that series. The mips architecture code to be removed with patch 1/10 from that series was not applied. This partial patch series application leaves the build config setup and code in the mips architecture in a slightly unclean, intermediate state. The configs HAS_TXX9_ACLC and SND_SOC_TXX9ACLC were removed, but are still referenced in the txx9-architecture Kconfig and generic setup. The script ./scripts/checkkconfigsymbols.py warns about this: HAS_TXX9_ACLC Referencing files: arch/mips/txx9/Kconfig SND_SOC_TXX9ACLC Referencing files: arch/mips/txx9/generic/setup.c Clean up the code for those removed references. Link: https://lore.kernel.org/all/20210105140305.141401-1-tsbogend@alpha.franken.de/ Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: alchemy: remove historic comment on gpio build constraintsLukas Bulwahn1-2/+0
In ./arch/mips/alchemy/common/gpiolib.c, the comment points out certain build constraints on CONFIG_GPIOLIB and CONFIG_ALCHEMY_GPIO_INDIRECT. The commit 832f5dacfa0b ("MIPS: Remove all the uses of custom gpio.h") makes all mips machines use the common gpio.h and removes the config ALCHEMY_GPIO_INDIRECT. So, this makes the comment in alchemy's gpiolib.c historic and obsolete, and can be removed after the commit above. The issue on the reference to a non-existing Kconfig symbol was identified with ./scripts/checkkconfigsymbols.py. This script has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, remove the historic comment to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: remove obsolete selection of CPU_HAS_LOAD_STORE_LRLukas Bulwahn1-1/+0
Commit 18d84e2e55b6 ("MIPS: make CPU_HAS_LOAD_STORE_LR opt-out") replaced the config CPU_HAS_LOAD_STORE_LR by the config with an inverted semantics, making the "LOAD_STORE_LR" cpu configuration the default. The ./arch/mips/Kconfig was adjusted accordingly. Later, commit 65ce6197ed40 ("Revert "MIPS: Remove unused R4300 CPU support"") reintroduces a select CPU_HAS_LOAD_STORE_LR through its revert commit, restoring the config CPU_R4300 in ./arch/mips/Kconfig before the refactoring above. This select however now refers to a non-existing config and is further unneeded, as LOAD_STORE_LR is the default now. Remove the obsolete select for the reintroduced mips R4300 architecture. This issue is identified with ./scripts/checkkconfigsymbols.py. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: kgdb: adjust the comment to the actual ifdef conditionLukas Bulwahn1-1/+1
The comment refers to CONFIG_CPU_32BIT, but the ifdef uses CONFIG_32BIT. As this ifdef and comment was introduced with initial mips-kgdb commit 8854700115ec ("[MIPS] kgdb: add arch support for the kernel's kgdb core"), it is probably just a minor issue that was overlooked during the patch creation and refactoring before submission. This inconsistency was identified with ./scripts/checkkconfigsymbols.py. This script has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, adjust the comment to the actual ifdef condition to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: dec: provide the correctly capitalized config CPU_R4X00 in init error messageLukas Bulwahn1-1/+1
The config for MIPS R4000-series processors is named CPU_R4X00 with upper-case X, not CPU_R4x00 as the error message suggests. Hence, ./scripts/checkkconfigsymbols.py reports this invalid reference: CPU_R4x00 Referencing files: arch/mips/dec/prom/init.c When human users encounter this error message, they probably just deal with this minor discrepancy; so, the spelling never was a big deal here. Still, the script ./scripts/checkkconfigsymbols.py has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, repair the error message to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: drop selecting non-existing config NR_CPUS_DEFAULT_2Lukas Bulwahn1-1/+0
Commit c5eaff3e857e ("MIPS: Kconfig: Drop obsolete NR_CPUS_DEFAULT_{1,2} options") removed the config NR_CPUS_DEFAULT_2, as with this commit, the NR_CPUS default value is 2. Commit 7505576d1c1a ("MIPS: add support for SGI Octane (IP30)") introduces the config SGI_IP30, which selects the removed config NR_CPUS_DEFAULT_2, but this has actually no effect. Fortunately, NR_CPUS defaults to 2 when there is no specific NR_CPUS_DEFAULT_* config selected. So, the effect of the intended 'select NR_CPUS_DEFAULT_2' is achieved without further ado. Drop selecting the non-existing config NR_CPUS_DEFAULT_2. The issue was identified with ./scripts/checkkconfigsymbols.py. Fixes: 7505576d1c1a ("MIPS: add support for SGI Octane (IP30)") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16mips: add SYS_HAS_CPU_MIPS64_R5 config for MIPS Release 5 supportLukas Bulwahn1-0/+4
Commit ab7c01fdc3cf ("mips: Add MIPS Release 5 support") adds the two configs CPU_MIPS32_R5 and CPU_MIPS64_R5, which depend on the corresponding SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R5, respectively. The config SYS_HAS_CPU_MIPS32_R5 was already introduced with commit c5b367835cfc ("MIPS: Add support for XPA."); the config SYS_HAS_CPU_MIPS64_R5, however, was never introduced. Hence, ./scripts/checkkconfigsymbols.py warns: SYS_HAS_CPU_MIPS64_R5 Referencing files: arch/mips/Kconfig, arch/mips/include/asm/cpu-type.h Add the definition for config SYS_HAS_CPU_MIPS64_R5 under the assumption that SYS_HAS_CPU_MIPS64_R5 follows the same pattern as the existing SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R6. Fixes: ab7c01fdc3cf ("mips: Add MIPS Release 5 support") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16MIPS: drop selected EARLY_PRINTK configs for MACH_REALTEK_RTLSander Vanheule1-3/+0
MACH_REALTEK_RTL declares that the system supports early printk , but this is not actually implemented as intended. The system is left with a non-functional early0 console because the setup_8250_early_printk_port() call provided for MIPS_GENERIC is never used to set this up. Generic ns16550a earlycon works, so devices should use that for early output. This means that SYS_HAS_EARLY_PRINTK and USE_GENERIC_EARLY_PRINTK_8250 do not need to be selected. Additionally, as reported by Lukas Bulwahn, the selected symbol SYS_HAS_EARLY_PRINTK_8250 does not actually exist, so should also be dropped. Cc: Lukas Bulwahn <lukas.bulwahn@gmail.com> Cc: Bert Vermeulen <bert@biot.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-12-16arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulatorBiju Das1-0/+13
Add vdd core regulator (1.1 V). This patch add regulator support for gpu. The H/W manual mentions nothing about a gpu regulator. So using vdd core regulator for gpu. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211208104026.421-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-16arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU nodeBiju Das1-0/+65
Add Mali-G31 GPU node to SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211208104026.421-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-16ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driverDmitry Osipenko1-0/+1
All Tegra20/30/114 serial and audio drivers depend on the Tegra20 APB DMA driver, enable this DMA driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driverDmitry Osipenko1-0/+1
Enable Tegra20 S/PDIF driver that is a part of HDMI audio subsystem. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra_defconfig: Enable S/PDIF driverDmitry Osipenko1-0/+1
Enable Tegra20 S/PDIF driver. It's a part of HDMI audio subsystem on Tegra. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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