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2022-09-17arm64: dts: ls2080a-rdb: add phy nodesIoana Radulescu1-0/+69
Define PHY nodes on the board. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGALi Yang1-3/+62
Update the cpld node name to be generic board-contrl and add mmio mdio mux nodes from the on-board FPGA. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add PCIe supportTim Harvey1-3/+37
Add PCIe support on the Gateworks GW74xx board. While at it, fix the related gpio line names from the previous incorrect values. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: freescale: add support for i.MX8DXL EVK boardShenwei Wang2-0/+427
This is to support the EVK (Evaluation Kit Board) for the i.MX8DXL. The patch has enabled the serial console, SD/EMMC interface, and the eqos and fec ethernet network. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: freescale: add i.MX8DXL SoC supportShenwei Wang5-0/+515
i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. This patch adds the basic support for i.MX8DXL SoC. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8: add a node label to ddr-pmuShenwei Wang1-1/+1
The ddr-pmu on i.mx8dxl has a different interrupt number. Add a node label to ddr-pmu so that it could be referred and changed in i.mx8dxl dts. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx: Add i.mx8mm Gateworks gw7904 dts supportTim Harvey2-0/+889
The GW7904 is based on the i.MX 8M Mini SoC featuring: - LPDDR4 DRAM - eMMC FLASH - microSD connector with UHS support - LIS2DE12 3-axis accelerometer - Gateworks System Controller - IMX8M FEC - 2x RS232 off-board connectors - PMIC - 10x bi-color LED's - 1x miniPCIe socket with PCIe and USB2.0 - 802.3at Class 4 PoE - 10-30VDC input via barrel-jack Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add WiFi/BT module supportTim Harvey1-3/+59
The GW74xx supports an on-board Laird Connectivity Sterling LWB5+ module which uses a Cypress CYW4373W chip to provide 1x1 802.11 a/b/g/n/ac + Bluetooth 5.2. Add the proper device-tree nodes for it. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add cpu-supply node for cpufreqTim Harvey1-1/+17
Add regulator config for cpu-supply in order to support cpufreq. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-venice-gw74xx: add USB DR supportTim Harvey1-5/+25
Add support for USB DR on USB1 interface. Host/Device detection is done using the usb-role-switch connector with a GPIO as USB1_OTG_ID is not connected internally. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add mediamix blk ctrl nodePeng Fan1-0/+21
Add i.MX93 mediamix blk ctrl node Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add src nodePeng Fan1-0/+24
Add i.MX93 SRC node Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a-rdb: add more ethernet aliasesVladimir Oltean1-0/+3
Commit "arm64: dts: ls1028a: enable swp5 and eno3 for all boards" which Shawn declared as applied, but for which I can't find a sha1sum, has enabled a new Ethernet port on the LS1028A-RDB (&enetc_port3), but U-Boot, which passes a MAC address to Linux' device tree through the /aliases node, fails to do this for this newly enabled port. Fix that by adding more ethernet aliases in the only backwards-compatible way possible: at the end of the current list. And since it is possible to very easily convert either swp4 or swp5 to DSA user ports now (which have a MAC address of their own), using these U-Boot commands: => fdt addr $fdt_addr_r => fdt rm /soc/pcie@1f0000000/ethernet-switch@0,5/ports/port@4 ethernet it would be good if those DSA user ports (swp4, swp5) gained a valid MAC address from U-Boot as well. In order for that to work properly, provision two more ethernet aliases for &mscc_felix_port{4,5} as well. The resulting ordering is slightly unusual, but to me looks more natural than eno0, eno2, swp0, swp1, swp2, swp3, eno3, swp4, swp5. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq: update sdma node name formatJoy Zou1-2/+2
Node names should be generic, so change the sdma node name format 'sdma' into 'dma-controller'. Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add lpspi nodesPeng Fan1-0/+24
Add i.MX93 lpspi nodes Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add lpi2c nodesPeng Fan1-0/+89
Add i.MX93 lpi2c nodes Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add a55 pmuPeng Fan1-0/+5
Add A55 PMU node for perf usage Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add blk ctrl nodePeng Fan1-0/+10
Add i.MX93 BLK CTRL MIX node Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add s4 mu nodePeng Fan1-0/+9
Add s4 mu node for sentinel communication Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: add gpio clkPeng Fan1-0/+12
Add the GPIO clk, otherwise GPIO may not work if clk driver disable the GPIO clk during kernel boot. Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx93: correct SDHC clk entryPeng Fan1-6/+6
DUMMY clk only works with clk_ignore_unused and bootloader enables those clks that required for SDHC work properly. Correct SDHC clk entry with real clk. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: tqma8mpql: add USB DR supportAlexander Stein1-0/+48
Add support for USB DR on USB1 interface. Host/Device detection is done using the usb-role-switch connector. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: verdin-imx8mm: introduce hdmi-connectorPhilippe Schenker1-0/+8
The Lontium LT8912B driver needs a HDMI connector to be connected to port 1. Introduce this connector to be enabled in a device tree overlay. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: verdin-imx8mm: add lvds panel nodeMarcel Ziswiler1-0/+7
Add an LVDS panel node to be extended by a device tree overlay. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: verdin-imx8mm: rename sn65dsi83 to sn65dsi84Marcel Ziswiler1-2/+2
Rename sn65dsi83 to sn65dsi84 as that is the exact chip used on the Verdin DSI to LVDS Adapter. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: increase the clock speed of LPSPIClark Wang1-8/+8
LPSPI transfer max speed is half of the root clock. Increase the root clock speed to support faster data transmission. And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2 which could produce accurate clock for i2c/spi usage. Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: add mailbox nodePeng Fan1-0/+24
Add Sentinel Message Unit(MU), Generic MU nodes. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: add pmu nodePeng Fan1-0/+8
Add i.MX8ULP pmu node Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: correct the scmi sram node namePeng Fan1-1/+1
Follow sram/sram.yaml to update the sram node name. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: drop undocumented property in cgcPeng Fan1-4/+0
The clocks and clocks-names are not documented in binding doc, and the clk-imx8ulp driver not use the undocumented property, so drop them. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: fix mipi_csi descriptionMartin Kepplinger1-2/+0
Properties are not documented so lead to the following error: '#address-cells', '#size-cells', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+' Fix this by removing unneeded properties. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: add usb-role-switch property to dwc3Angus Ainslie1-0/+1
In order to enable (PD and data) role switching on the Librem 5 phone, add the usb-role-switch property to imx8mq's dwc3 node. Signed-off-by: Angus Ainslie <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: add USB type-c properties for role switchingAngus Ainslie1-0/+4
Add the connector properties to the USB type-c stanza to enable (PD) role-switching on the Librem 5 phone. Signed-off-by: Angus Ainslie <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: Add bq25895 as max17055's power supplySebastian Krzyszkowiak1-0/+1
This allows the userspace to notice that there's not enough current provided to charge the battery, and also fixes issues with 0% SOC values being considered invalid. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: add RGB pwm notification ledsGuido Günther1-0/+26
Describe the RGB notification leds on the Librem 5 phone. Use the common defines so we're sure to adhere to the common patterns, use predefined led colors and functions so we're being warned in case of deprecations. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mq-librem5: describe the voice coil motor for focus controlMartin Kepplinger1-0/+6
Describe the focus motor that will be used for the rear camera - even though the rear camera sensor driver is not yet in the mainline. The focus motor is a separate device and can be controlled already. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a: enable swp5 and eno3 for all boardsVladimir Oltean3-0/+24
In order for the LS1028A based boards to benefit from support for multiple CPU ports, the second DSA master and its associated CPU port must be enabled in the device trees. This does not change the default CPU port from the current port 4. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a: mark enetc port 3 as a DSA master tooVladimir Oltean1-0/+1
The LS1028A switch has 2 internal links to the ENETC controller. With DSA's ability to support multiple CPU ports, we should mark both ENETC ports as DSA masters. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a: move DSA CPU port property to the common SoC dtsiVladimir Oltean4-3/+1
Since the CPU port 4 of the switch is hardwired inside the SoC to go to the enetc port 2, this shouldn't be something that the board files need to set (but whether that CPU port is used or not is another discussion). So move the DSA "ethernet" property to the common dtsi. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-evk: Add PCIe supportRichard Zhu1-0/+53
Add PCIe support on i.MX8MP EVK board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marek Vasut <marex@denx.de> Tested-by: Richard Leitner <richard.leitner@skidata.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Add iMX8MP PCIe supportRichard Zhu1-0/+43
Add i.MX8MP PCIe support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marek Vasut <marex@denx.de> Tested-by: Richard Leitner <richard.leitner@skidata.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: no executable source file permissionMarcel Ziswiler1-0/+0
This fixes the following error: arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h: error: do not set execute permissions for source files Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Add SNVS LPGPRMarek Vasut1-0/+5
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store e.g. boot counter. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier boardMartyn Welch4-0/+941
Add device trees for one of a number of MSC's (parent company, Avnet) variants of the SM2S-IMX8PLUS system on module along with the compatible SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use the NXP i.MX8MP SoC and provide the SMARC module interface. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm: Fix typo in license text for Engicam boardsJagan Teki3-3/+3
Fix the Amarula Solutions typo mistake in license text for Engicam i.MX8M boards add in below commits. commit <60ac35268f85b> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM") commit <aec8ad34f7f24> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit") commit <eefe06b295087> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8-ss-dma: add IPG clock for i2cPeng Fan1-8/+12
i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-SFrieder Schrempf3-0/+707
This adds support for the Kontron Electronics SL i.MX8MM OSM-S SoM and the matching baseboard BL i.MX8MM OSM-S. The SoM hardware complies to the Open Standard Module (OSM) 1.0 specification, size S (https://sget.org/standards/osm). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Add SPI NOR partition layoutFrieder Schrempf1-0/+21
This is the layout used by the bootloader. Add it to the kernel devicetree to make the same layout available in Linux and have the devicetrees synced. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Use voltage rail names from schematic for PMIC regulator-namesFrieder Schrempf1-11/+11
Improve the naming of the regulators to contain the voltage rail names from the schematic. Suggested-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Remove low DDRC operating pointFrieder Schrempf1-4/+0
For some reason there is a problem with finding a DDR configuration that works on all operating points and all LPDDR4 types used on the SoM. Therefore the bootloader currently doesn't configure the lowest of the three operating points. Let's also skip this in the kernel devicetree to make sure it isn't used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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