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Now that we can track an equivalent of TIF_FOREIGN_FPSTATE, drop
the mapping of current's thread_info at EL2.
Signed-off-by: Marc Zyngier <maz@kernel.org>
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We currently have to maintain a mapping the thread_info structure
at EL2 in order to be able to check the TIF_FOREIGN_FPSTATE flag.
In order to eventually get rid of this, start with a vcpu flag that
shadows the thread flag on each entry into the hypervisor.
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
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Now that we don't have any users left for __sve_save_state, remove
it altogether. Should we ever need to save the SVE state from the
hypervisor again, we can always re-introduce it.
Suggested-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
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The SVE host tracking in KVM is pretty involved. It relies on a
set of flags tracking the ownership of the SVE register, as well
as that of the EL0 access.
It is also pretty scary: __hyp_sve_save_host() computes
a thread_struct pointer and obtains a sve_state which gets directly
accessed without further ado, even on nVHE. How can this even work?
The answer to that is that it doesn't, and that this is mostly dead
code. Closer examination shows that on executing a syscall, userspace
loses its SVE state entirely. This is part of the ABI. Another
thing to notice is that although the kernel provides helpers such as
kernel_neon_begin()/end(), they only deal with the FP/NEON state,
and not SVE.
Given that you can only execute a guest as the result of a syscall,
and that the kernel cannot use SVE by itself, it becomes pretty
obvious that there is never any host SVE state to save, and that
this code is only there to increase confusion.
Get rid of the TIF_SVE tracking and host save infrastructure altogether.
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
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The vcpu arch flags are in an interesting, semi random order.
As I have made the mistake of reusing a flag once, let's rework
this in an order that I find a bit less confusing.
Signed-off-by: Marc Zyngier <maz@kernel.org>
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Set clock phandle to uart node for Milbeaut M10V support.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-4-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Set clock phandle to timer node for Milbeaut M10V support.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-3-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a clock node for the platform of the Milbeaut M10V.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-2-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add two new parameters kernel_ringparam and extack for
.get_ringparam and .set_ringparam to extend more ring params
through netlink.
Signed-off-by: Hao Chen <chenhao288@hisilicon.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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SoCFPGA fix for v5.16
- Fix crash when CONFIG_FORTIRY_SOURCE is enabled
* tag 'socfpga_fix_for_v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: Fix crash with CONFIG_FORTIRY_SOURCE
Link: https://lore.kernel.org/r/20211119153224.2761257-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.16, please pull the following:
- Florian fixes the BCM5310x DTS include file to have the appropriate
I2C controller interrupt line, and allows the BCMA GPIO controller to
be used as an interrupt controller. Finally, the BCM2711 (Raspberry Pi
4) PCIe Device Tree node interrupts are fixed to list the correct
interrupt output as well as the INTB/C/D lines.
* tag 'arm-soc/for-5.16/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Fix PCIe interrupts
ARM: dts: BCM5301X: Add interrupt properties to GPIO node
ARM: dts: BCM5301X: Fix I2C controller interrupt
Link: https://lore.kernel.org/r/20211116201429.2692786-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Beelink X2 doesn't use HW CEC controller found in DW HDMI core. It has
dedicated GPIO pin for that purpose.
Add a node for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211120102024.439456-1-jernej.skrabec@gmail.com
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Experimentation determined that HDMI CEC controller inside DW HDMI block
depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC
communication starts or stops working, depending on situation.
SoC user manual doesn't say anything about CEC, so this was overlooked.
Fix this by adding dependency to RTC 32k clock.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211120073448.32480-3-jernej.skrabec@gmail.com
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Experimentation determined that HDMI CEC controller inside DW HDMI block
depends on 32k clock from RTC. If this clock is tampered with, HDMI CEC
communication starts or stops working, depending on situation.
SoC user manual doesn't say anything about CEC, so this was overlooked.
Fix this by adding dependency to RTC 32k clock.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211120073448.32480-2-jernej.skrabec@gmail.com
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Nodes are not sorted alphabetically. Do it.
There is no functional change.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211121070321.601659-1-jernej.skrabec@gmail.com
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Tanix TX6 has a LED display driven by FD650.
Currently there is no Linux driver nor any binding for it. However, we
can at least provide I2C node in DT, so user space scripts or programs
can manually control it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211121115002.693329-1-jernej.skrabec@gmail.com
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This reverts commit 279917e27edc293eb645a25428c6ab3f3bca3f86.
With the CONFIG_HARDENED_USERCOPY option enabled, this patch triggers
kernel bugs at runtime:
usercopy: Kernel memory overwrite attempt detected to kernel text (offset 2084839, size 6)!
kernel BUG at mm/usercopy.c:99!
Backtrace:
IAOQ[0]: usercopy_abort+0xc4/0xe8
[<00000000406ed1c8>] __check_object_size+0x174/0x238
[<00000000407086d4>] copy_strings.isra.0+0x3e8/0x708
[<0000000040709a20>] do_execveat_common.isra.0+0x1bc/0x328
[<000000004070b760>] compat_sys_execve+0x7c/0xb8
[<0000000040303eb8>] syscall_exit+0x0/0x14
The problem is, that we have an init section of at least 2MB size which
starts at _stext and is freed after bootup.
If then later some kernel data is (temporarily) stored in this free
memory, check_kernel_text_object() will trigger a bug since the data
appears to be inside the kernel text (>=_stext) area:
if (overlaps(ptr, len, _stext, _etext))
usercopy_abort("kernel text");
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: stable@kernel.org # 5.4+
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Convert the PTE lookup functions to use the safer extru_safe macro.
Signed-off-by: Helge Deller <deller@gmx.de>
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The extru instruction leaves the most significant 32 bits of the target
register in an undefined state on PA 2.0 systems. If any of these bits
are nonzero, this will break the calculation of the lock pointer.
Fix by using extrd,u instruction via extru_safe macro on 64-bit kernels.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
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The extru instruction leaves the most significant 32 bits of the
target register in an undefined state on PA 2.0 systems.
Provide a macro to safely use extru on 32- and 64-bit machines.
Suggested-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
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The KVM_MAX_VCPUS value is supposed to be aligned with number of
VMID bits in the hgatp CSR but the current KVM_MAX_VCPUS value
is aligned with number of ASID bits in the satp CSR.
Fixes: 99cdc6c18c2d ("RISC-V: Add initial skeletal KVM support")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
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Unmap stage2 page tables when a memslot is being deleted or moved. It's
the architectures' responsibility to ensure existing mappings are removed
when kvm_arch_flush_shadow_memslot() returns.
Fixes: 9d05c1fee837 ("RISC-V: KVM: Implement stage2 page table programming")
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
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The r3 and later revisions of the Librem 5 phone include an additional switch
to control the hi846 XSHUTDOWN pin. Describe it.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable the CSI1 MIPI RX controller and CSI1 bridge on the SoC. Describe
the Librem 5 front-facing camera, connected to the CSI1 MIPI.
the following sets formats, streams 10 frames and saves one:
#!/bin/bash
WIDTH=1632
HEIGHT=1224
SKIP=10
media-ctl -d "platform:30a90000.csi" --set-v4l2 "'csi':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]"
media-ctl -d "platform:30a90000.csi" --set-v4l2 "'imx8mq-mipi-csi2 30a70000.csi':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]"
media-ctl -d "platform:30a90000.csi" --set-v4l2 "'hi846 2-0020':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]"
media-ctl -d "platform:30a90000.csi" -l "'hi846 2-0020':0 -> 'imx8mq-mipi-csi2 30a70000.csi':0 [1]"
v4l2-ctl -d "/dev/v4l/by-path/platform-30a90000.csi-video-index0" --set-fmt-video=width=${WIDTH},height=${HEIGHT},pixelformat=GB16 --stream-mmap --stream-to=$WIDTH.raw --stream-skip=$SKIP --stream-count=1
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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CAMERA_PWR_EN controls two different power supplies that cameras will use.
The hardware killswitch controls a third one. Describe that appropriately.
The pinctrl that describes the gpio that is used in 2 places here is added
to the pmic. This is done because pmic is powered early enough to make
sure this will work.
When we would have put the same pinctrl property into the 2 regulator nodes
(instead of the pmic), we'd get:
imx8mq-pinctrl 30330000.pinctrl: pin MX8MQ_IOMUXC_GPIO1_IO00 already requested by regulator-csi-1v8; cannot claim for regulator-vcam-2v8
imx8mq-pinctrl 30330000.pinctrl: pin-10 (regulator-vcam-2v8) status -22
imx8mq-pinctrl 30330000.pinctrl: could not request pin 10 (MX8MQ_IOMUXC_GPIO1_IO00) from group camerapwrgrp on device 30330000.pinctrl
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Librem 5 r3 ("Dogwood") and r4 ("Evergreen") revisions are quite
similar. Add a shared imx8mq-librem5-r3.dtsi description to be included
in r3 and later dts files in order to avoid duplication.
This is no change in the descriptions but only refactoring.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i.MX8M Mini has two available USB controllers. On the
imx8mm-beacon board, USB1 is routed to a mini-USB port with
OTG functionality. USB2 is routed to a USB hub which has
three host-only ports connected to it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Pull x86 fixes from Thomas Gleixner:
- Move the command line preparation and the early command line parsing
earlier so that the command line parameters which affect
early_reserve_memory(), e.g. efi=nosftreserve, are taken into
account. This was broken when the invocation of
early_reserve_memory() was moved recently.
- Use an atomic type for the SGX page accounting, which is read and
written locklessly, to plug various race conditions related to it.
* tag 'x86-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/sgx: Fix free page accounting
x86/boot: Pull up cmdline preparation and early param parsing
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Pull x86 perf fixes from Thomas Gleixner:
- Remove unneded PEBS disabling when taking LBR snapshots to prevent an
unchecked MSR access error.
- Fix IIO event constraints for Snowridge and Skylake server chips.
* tag 'perf-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/perf: Fix snapshot_branch_stack warning in VM
perf/x86/intel/uncore: Fix IIO event constraints for Snowridge
perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server
perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
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Pull more powerpc fixes from Michael Ellerman:
- Fix a bug in copying of sigset_t for 32-bit systems, which caused X
to not start.
- Fix handling of shared LSIs (rare) with the xive interrupt controller
(Power9/10).
- Fix missing TOC setup in some KVM code, which could result in oopses
depending on kernel data layout.
- Fix DMA mapping when we have persistent memory and only one DMA
window available.
- Fix further problems with STRICT_KERNEL_RWX on 8xx, exposed by a
recent fix.
- A couple of other minor fixes.
Thanks to Alexey Kardashevskiy, Aneesh Kumar K.V, Cédric Le Goater,
Christian Zigotzky, Christophe Leroy, Daniel Axtens, Finn Thain, Greg
Kurz, Masahiro Yamada, Nicholas Piggin, and Uwe Kleine-König.
* tag 'powerpc-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/xive: Change IRQ domain to a tree domain
powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX
powerpc/signal32: Fix sigset_t copy
powerpc/book3e: Fix TLBCAM preset at boot
powerpc/pseries/ddw: Do not try direct mapping with persistent memory and one window
powerpc/pseries/ddw: simplify enable_ddw()
powerpc/pseries/ddw: Revert "Extend upper limit for huge DMA window for persistent memory"
powerpc/pseries: Fix numa FORM2 parsing fallback code
powerpc/pseries: rename numa_dist_table to form2_distances
powerpc: clean vdso32 and vdso64 directories
powerpc/83xx/mpc8349emitx: Drop unused variable
KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr()
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Adding the rockchip,system-power-controller property here will use the
rk808 to power off the system.
Fixes: 09e006cfb43e ("arm64: dts: rockchip: Add basic support for Kobol's Helios64")
Signed-off-by: Florian Klink <flokli@flokli.de>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20211020095926.735938-2-flokli@flokli.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds the hdd_{a,b}_power blocks present in the armbian helios64
dts. [1]
Without those powered up, no HDDs will appear (except one connected via
the m.2 slot).
>From https://wiki.kobol.io/helios64/sata/#hdd-power:
> The power delivery of the HDDs is divided into two group:
>
> HDD Rail A (Max. 3x Drives)
> HDD Rail B (Max. 2x Drives)
>
> Helios64 implements a power staggering approach where HDD Rail A will be
> powered up first, then few seconds later HDD Rail B will be powered up.
> This power control scenario is performed to reduce the inrush current
> during disk spin-up.
In practice, this power staggering approach will be included in the
bootloader (not in the kernel), as we might want to boot from a SATA
drive.
>From my experiments, if the bootloader doesn't implement the power
staggering, only one HDD will get recognized (probably cause the others
didn't boot due to few power).
Still, it makes sense to expose this block in the device-tree, so the
kernel can ensure both rails are on (and this can be shared with
u-boot).
[1] https://github.com/armbian/build/blob/744ea89a589d62cb6f409baab60fc6664520bc39/patch/kernel/archive/rockchip64-5.14/add-board-helios64.patch
Signed-off-by: Florian Klink <flokli@flokli.de>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20211020095926.735938-1-flokli@flokli.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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without ep-gpios defined u-boot does not initialise PCIe
rockchip_pcie pcie@f8000000: failed to find ep-gpios property
additionally set max-link-speed and pinctrl-names for completeness
with this patch and the ones from Florian Klink applied to the dts
file in u-boot sata drives show up in both u-boot and linux
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Acked-By: Florian Klink <flokli@flokli.de>
Link: https://lore.kernel.org/r/20211029005323.144652-1-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add the 4 ports on the internal hub and define and turn on the 2.5GbE
nic.
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Florian Klink <flokli@flokli.de>
Link: https://lore.kernel.org/r/20211026150751.70115-1-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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As schematics at [1] and [2] show C- and plus-revisions have interrupt and
headphone detection lines of ES8316 codec connected.
Add them to the respective device trees.
[1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf
[2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4b_plus_v16_sch_20200628.pdf
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20211027143726.165809-2-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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As stated in the schematics [1] and [2] P5 the APIO5 domain is supplied
by RK808-D Buck4, which in our case vcc1v8_codec - i.e. a 1.8 V regulator.
Currently only white noise comes from the ES8316's output, which - for
whatever reason - came up only after the the correct switch from i2s0_8ch_bus
to i2s0_2ch_bus for i2s0's pinctrl was done.
Fix this by setting the correct regulator for audio-supply.
[1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4_v13_sch_20181112.pdf
[2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf
Fixes: 1b5715c602fd ("arm64: dts: rockchip: add ROCK Pi 4 DTS support")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20211027143726.165809-1-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Correct a typo in the vin-supply property. The input supply is
always-on, so this mistake doesn't affect whether the supply is actually
enabled correctly.
Fixes: fc702ed49a86 ("arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC")
Signed-off-by: John Keeping <john@metanate.com>
Link: https://lore.kernel.org/r/20211102182908.3409670-3-john@metanate.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Correct a typo in the vin-supply property. The input supply is
always-on, so this mistake doesn't affect whether the supply is actually
enabled correctly.
Fixes: 4403e1237be3 ("arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc")
Signed-off-by: John Keeping <john@metanate.com>
Link: https://lore.kernel.org/r/20211102182908.3409670-2-john@metanate.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Remove mmc-hs400-enhanced-strobe from the rk3399-khadas-edge dts to
improve compatibility with a wider range of eMMC chips.
Before (BJTD4R 29.1 GiB):
[ 7.001493] mmc2: CQHCI version 5.10
[ 7.027971] mmc2: SDHCI controller on fe330000.mmc [fe330000.mmc] using ADMA
.......
[ 7.207086] mmc2: mmc_select_hs400es failed, error -110
[ 7.207129] mmc2: error -110 whilst initialising MMC card
[ 7.308893] mmc2: mmc_select_hs400es failed, error -110
[ 7.308921] mmc2: error -110 whilst initialising MMC card
[ 7.427524] mmc2: mmc_select_hs400es failed, error -110
[ 7.427546] mmc2: error -110 whilst initialising MMC card
[ 7.590993] mmc2: mmc_select_hs400es failed, error -110
[ 7.591012] mmc2: error -110 whilst initialising MMC card
After:
[ 6.960785] mmc2: CQHCI version 5.10
[ 6.984672] mmc2: SDHCI controller on fe330000.mmc [fe330000.mmc] using ADMA
[ 7.175021] mmc2: Command Queue Engine enabled
[ 7.175053] mmc2: new HS400 MMC card at address 0001
[ 7.175808] mmcblk2: mmc2:0001 BJTD4R 29.1 GiB
[ 7.176033] mmcblk2boot0: mmc2:0001 BJTD4R 4.00 MiB
[ 7.176245] mmcblk2boot1: mmc2:0001 BJTD4R 4.00 MiB
[ 7.176495] mmcblk2rpmb: mmc2:0001 BJTD4R 4.00 MiB, chardev (242:0)
Fixes: c2aacceedc86 ("arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards")
Signed-off-by: Artem Lapkin <art@khadas.com>
Link: https://lore.kernel.org/r/20211115083321.2627461-1-art@khadas.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This fixes a potential kernel panic on memcpy when FORTIFY_SOURCE
is enabled. Because memory is iomem use appropriate function for
accessing it.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Link: https://lore.kernel.org/r/20211116084616.24811-1-iivanov@suse.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A separate Kconfig option HAVE_S3C2410_I2C for Samsung SoCs is not
really needed and the i2c-s3c24xx driver can depend on Samsung ARM
architectures instead. This also enables i2c-s3c2410 for arm64 Exynos
SoCs, which is required for example by Exynos850.
This is basically continuation of work made in following commits:
- commit d96890fca9fd ("rtc: s3c: remove HAVE_S3C_RTC in favor of
direct dependencies")
- commit 7dd3cae90d85 ("ARM: samsung: remove HAVE_S3C2410_WATCHDOG and
use direct dependencies")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211121150558.21801-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Increase the number of arguments supported by mixed mode calls, so that
we will be able to call into the TCG2 protocol to measure the initrd
and extend the associated PCR. This involves the TCG2 protocol's
hash_log_extend_event() method, which takes five arguments, three of
which are u64 and need to be split, producing a total of 8 outgoing
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20211119114745.1560453-3-ilias.apalodimas@linaro.org
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Define the right prototype for efi_tcg2_protocol::hash_log_extend_event()
and add the required structs so we can start using it to measure the initrd
into the TPM if it was loaded by the EFI stub itself.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20211119114745.1560453-2-ilias.apalodimas@linaro.org
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert
TCFQ users to XSPI FIFO mode ") and 6c1c26ecd9a3("spi:
spi-fsl-dspi: Accelerate transfers using larger word size if possible"),
on ls1043a-rdb platform, the spi work mode is changed from TCFQ
mode to XSPI mode. In order to keep the transmission sequence matches
with flash device, it is need to add delay between CS and CLK signal.
The strategy of generating delay value refers to QorIQ LS1043A
Reference Manual.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Since commit 4b563a066611 ("ARM: imx: Remove imx21 support"), the config
DEBUG_IMX21_IMX27_UART is really only debug support for IMX27.
So, rename this option to DEBUG_IMX27_UART and adjust dependencies in
Kconfig and rename the definitions to IMX27 as further clean-up.
This issue was discovered with ./scripts/checkkconfigsymbols.py, which
reported that DEBUG_IMX21_IMX27_UART depends on the non-existing config
SOC_IMX21.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The commits:
commit 879c0e5e0ac7 ("ARM: imx: Remove i.MX27 board files")
commit c93197b0041d ("ARM: imx: Remove i.MX31 board files")
commit e1324ece2af4 ("ARM: imx: Remove i.MX35 board files")
remove the config MACH_MX27_3DS, MACH_MX31_3DS and MACH_MX35_3DS.
Commit a542fc18168c ("ARM: imx31: Remove remaining i.MX31 board code")
further removes arch/arm/mach-imx/3ds_debugboard.{c,h}. So, only some
dead left-over in Kconfig and Makefile remains.
Remove this remaining left-over.
This issue was identified with ./scripts/checkkconfigsymbols.py,
which warns on references to the non-existing configs
MACH_MX{27,31,35}_3DS in ./arch/arm/mach-imx/Kconfig.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Specify the phy-mode for the external PHYs on the third switch on the
ZII development rev B board so phylink and phylib knows what mode these
interfaces are configured for.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
switch 2 as "rgmii-id" but referring to the schematics, it is in fact
a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
S_MODE=1, which means port 5 is configured as 1000BASE-X.
This is confirmed by the value in the 88E6352 port 5 status register,
0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
cross-chip SERDES mode is selected.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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In the new behavior, the sja1105 driver expects there to be explicit
RGMII delays present on the fixed-link ports, otherwise it will complain
that it falls back to legacy behavior, which is to apply RGMII delays
incorrectly derived from the phy-mode string.
In this case, the legacy behavior of the driver is to apply both RX and
TX delays. To preserve that, add explicit 2 nanosecond delays, which are
identical with what the driver used to add (a 90 degree phase shift).
The delays from the phy-mode are ignored by new kernels (it's still
RGMII as long as it's "rgmii*" something), and the explicit
{rx,tx}-internal-delay-ps properties are ignored by old kernels, so the
change works both ways.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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In the new behavior, the sja1105 driver expects there to be explicit
RGMII delays present on the fixed-link ports, otherwise it will complain
that it falls back to legacy behavior, which is to apply RGMII delays
incorrectly derived from the phy-mode string.
In this case, the legacy behavior of the driver is to not apply delays
in any direction (mostly because the SJA1105T can't do that, so this
board uses PCB traces). To preserve that but also silence the driver,
use explicit delays of 0 ns. The delay information from the phy-mode is
ignored by new kernels (it's still RGMII as long as it's "rgmii*"
something), and the explicit {rx,tx}-internal-delay-ps properties are
ignored by old kernels, so the change works both ways.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marc Zyngier
Sugaya Taichi
Hao Chen
Arnd Bergmann
Jernej Skrabec
Helge Deller
John David Anglin
Anup Patel
Sean Christopherson
Martin Kepplinger
Adam Ford
Linus Torvalds
Florian Klink
Dennis Gilmore
Alex Bee
John Keeping
Artem Lapkin
Ivan T. Ivanov
Sam Protsenko
Ard Biesheuvel
Meng Li
Lukas Bulwahn
Russell King (Oracle)
Vladimir Oltean