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If an UNDEFINED exception is taken from EL1, and do_undefinstr() doesn't
find any suitable undef_hook, it will call:
BUG_ON(!user_mode(regs))
... and the kernel will report a failure witin do_undefinstr() rather
than reporting the original context that the UNDEFINED exception was
taken from. The pt_regs and ESR value reported within the BUG() handler
will be from within do_undefinstr() and the code dump will be for the
BRK in BUG_ON(), which isn't sufficient to debug the cause of the
original exception.
This patch makes the reporting better by having do_undefinstr() call
die() directly in this case to report the original context from which
the UNDEFINED exception was taken.
Prior to this patch, an undefined instruction is reported as:
| kernel BUG at arch/arm64/kernel/traps.c:497!
| Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
| Modules linked in:
| CPU: 0 PID: 0 Comm: swapper Not tainted 5.19.0-rc3-00127-geff044f1b04e-dirty #3
| Hardware name: linux,dummy-virt (DT)
| pstate: 000000c5 (nzcv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
| pc : do_undefinstr+0x28c/0x2ac
| lr : do_undefinstr+0x298/0x2ac
| sp : ffff800009f63bc0
| x29: ffff800009f63bc0 x28: ffff800009f73c00 x27: ffff800009644a70
| x26: ffff8000096778a8 x25: 0000000000000040 x24: 0000000000000000
| x23: 00000000800000c5 x22: ffff800009894060 x21: ffff800009f63d90
| x20: 0000000000000000 x19: ffff800009f63c40 x18: 0000000000000006
| x17: 0000000000403000 x16: 00000000bfbfd000 x15: ffff800009f63830
| x14: ffffffffffffffff x13: 0000000000000000 x12: 0000000000000019
| x11: 0101010101010101 x10: 0000000000161b98 x9 : 0000000000000000
| x8 : 0000000000000000 x7 : 0000000000000000 x6 : 0000000000000000
| x5 : ffff800009f761d0 x4 : 0000000000000000 x3 : ffff80000a2b80f8
| x2 : 0000000000000000 x1 : ffff800009f73c00 x0 : 00000000800000c5
| Call trace:
| do_undefinstr+0x28c/0x2ac
| el1_undef+0x2c/0x4c
| el1h_64_sync_handler+0x84/0xd0
| el1h_64_sync+0x64/0x68
| setup_arch+0x550/0x598
| start_kernel+0x88/0x6ac
| __primary_switched+0xb8/0xc0
| Code: 17ffff95 a9425bf5 17ffffb8 a9025bf5 (d4210000)
With this patch applied, an undefined instruction is reported as:
| Internal error: Oops - Undefined instruction: 0 [#1] PREEMPT SMP
| Modules linked in:
| CPU: 0 PID: 0 Comm: swapper Not tainted 5.19.0-rc3-00128-gf27cfcc80e52-dirty #5
| Hardware name: linux,dummy-virt (DT)
| pstate: 800000c5 (Nzcv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
| pc : setup_arch+0x550/0x598
| lr : setup_arch+0x50c/0x598
| sp : ffff800009f63d90
| x29: ffff800009f63d90 x28: 0000000081000200 x27: ffff800009644a70
| x26: ffff8000096778c8 x25: 0000000000000040 x24: 0000000000000000
| x23: 0000000000000100 x22: ffff800009f69a58 x21: ffff80000a2b80b8
| x20: 0000000000000000 x19: 0000000000000000 x18: 0000000000000006
| x17: 0000000000403000 x16: 00000000bfbfd000 x15: ffff800009f63830
| x14: ffffffffffffffff x13: 0000000000000000 x12: 0000000000000019
| x11: 0101010101010101 x10: 0000000000161b98 x9 : 0000000000000000
| x8 : 0000000000000000 x7 : 0000000000000000 x6 : 0000000000000000
| x5 : 0000000000000008 x4 : 0000000000000010 x3 : 0000000000000000
| x2 : 0000000000000000 x1 : 0000000000000000 x0 : 0000000000000000
| Call trace:
| setup_arch+0x550/0x598
| start_kernel+0x88/0x6ac
| __primary_switched+0xb8/0xc0
| Code: b4000080 90ffed80 912ac000 97db745f (00000000)
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220913101732.3925290-2-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The only diffrence against the standrard edition is that the enterprise
one has a built-in EEPROM chip which stores a globally unique MAC address.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20220915022511.4267-2-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Rockchip PX30 SoC has three I2S controllers, i2s1 and i2s2 are
2-channel I2S/PCM controllers handled by the same controller driver, and
i2s0 a 8-channel I2S/PCM/TDM controller handled by another controller
driver.
This adds the device tree node required to enable I2S0 on PX30.
This was tested in a 2-channel I2S with TX BCLK/LRCK for both TX and RX
(rockchip,trcm-sync-tx-only) setup on a soon-to-be-released board.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20220916091746.35108-1-foss+kernel@0leil.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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As commit 559089e0a93d ("vmalloc: replace VM_NO_HUGE_VMAP with
VM_ALLOW_HUGE_VMAP"), the use of hugepage mappings for vmalloc
is an opt-in strategy, so it is saftly to support huge vmalloc
mappings on arm64, for now, it is used in kvmalloc() and
alloc_large_system_hash().
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Link: https://lore.kernel.org/r/20220911044423.139229-1-wangkefeng.wang@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add the missing required DT property `atmel,usart-mode` to the serial
nodes of Atmel/Microchip DT files.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-4-sergiu.moga@microchip.com
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Maintain consistency among the compatibles of the serial nodes of
sam9x60ek and highlight the incremental characteristic of its serial
IP's by making sure that all serial nodes contain both the sam9x60
and sam9260 usart/dbgu compatibles.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-3-sergiu.moga@microchip.com
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Swap the rx and tx of the DMA related DT properties of the spi11 node
in order to maintain consistency across Microchip/Atmel SoC files.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220913142205.162399-2-sergiu.moga@microchip.com
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Now that everything except StrongARM is unified under
CONFIG_ARCH_MULTIPLATFORM, the option is rather meaningless
in its current form.
Rework the Kconfig logic to make this useful again, similar
to the way that RISC-V has CONFIG_NONPORTABLE (with the
opposite polarity), this now controls the visibility of
options that get in the way of building generic kernels,
while allowing custom kernels.
One side-effect is that 'randconfig' builds now rarely hit
strongarm machines, rather than testing them three quarters
of the time.
* 'arm-multiplatform-cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: make ARCH_MULTIPLATFORM user-visible
ARM: fix XIP_KERNEL dependencies
ARM: Kconfig: clean up platform selection
ARM: simplify machdirs/platdirs handling
ARM: remove obsolete Makefile.boot infrastructure
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A cleanup for the footbridge platform that came out of inspecting
the platforms during the multiplatform conversion as well as the
dma address patches.
* 'footbridge/cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: footbridge: remove custom DMA address handling
ARM: footbridge: move isa-dma support into footbridge
ARM: footbridge: remove leftover from personal-server
ARM: footbridge: remove addin mode
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This pull request contains Broadcom ARM64-based SoC changes for 6.1,
please pull the following:
- Rafal adds the BCM4908 LED controller node and describes all 32 LED
pins, he also adds support for the Asus GC-AC5300 LEDs
* tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs
arm64: dts: broadcom: bcm4908: add LEDs controller block
arm64: dts: broadcom: bcm4908: add remaining LED pins
Link: https://lore.kernel.org/r/20220915023044.2350782-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This pull request contains Broadcom ARM-based SoC Device Tree updates
for 6.1, please pull the following:
- Rafal improves the BCM5301X PCIe DT nodes schema validation by
flagging the PCIe controller with a missing "device_type" property
- William merges BCM4908 within BCMBCA since this chip is part of the
Broadcom Broadband Carrier Access group and follows the architecture of
those chips
* tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux:
arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA
arm64: dts: Add BCM4908 generic board dts
arm64: dts: Move BCM4908 dts to bcmbca folder
arm64: dts: bcmbca: update BCM4908 board dts files
dt-bindings: arm64: bcmbca: Update BCM4908 description
dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA
ARM: dts: BCM5301X: Add basic PCI controller properties
Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This pull request contains Broadcom ARM64 defconfig changes for 6.1,
please pull the following:
- William completes the removal of ARCH_BCM4908 by removing that Kconfig
entry from the defconfig since it is being deleted after having been
transitional through 6.0
* tag 'arm-soc/for-6.1/defconfig-arm64' of https://github.com/Broadcom/stblinux:
arm64: defconfig: remove BCM4908
Link: https://lore.kernel.org/r/20220915023044.2350782-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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AT91 fixes for 6.0 #2
It contains a fix for LAN966 SoCs that corrects the interrupt
number for internal PHYs.
* tag 'at91-fixes-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: Fix the interrupt number for internal PHYs
Link: https://lore.kernel.org/r/20220915105833.4159850-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add dma properties to support GPCDMA for I2C in Tegra 186 and later
chips
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the iommus property to the HDA node on Tegra234.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Enable HDA node for the Jetson AGX Orin platform.
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add Host1x context isolation domains on Tegra234. On Tegra234 we have
two IOMMUs that are connected to Host1x-channel programmed engines,
so we have to include domains for each of them.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Make sure that each phandle-array is enclosed in a set of angular
brackets and properly indent each entry.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Google Pixel C contains a BRCM4354 Wi-Fi + BT module.
Add a DT node for its Wi-Fi functionality. Tested on Pixel C.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Google Pixel C contains a BRCM4354 Wi-Fi + BT module.
Add a DT node for its BT functionality. Tested on Pixel C.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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A Multi-Gigabit Ethernet (MGBE) instance drives the primary Ethernet
port on the Jetson AGX Orin Developer Kit. Enable it.
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add device tree nodes for the four instances of the Multi-Gigabit
Ethernet (MGBE) IP found on NVIDIA Tegra234 SoCs.
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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There is no need to list the Tegra194-specific compatible for Tegra234
because the backwards-compatibility goes back all the way to Tegra186.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Enable PCIe controller nodes to enable respective PCIe slots on
P3737-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-1 : On-board Broadcom WiFi controller
Controller-4 : M.2 Key-M slot
Controller-5 : CEM form-factor x8 slot
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra234 SoC contains 10 PCIe controllers and 24 P2U instances
grouped into three different PHY bricks namely High-Speed IO (HSIO-8 P2Us)
NVIDIA High Speed (NVHS-8 P2Us) and Gigabit Ethernet (GBE-8 P2Us)
respectively.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add regulator supplies required for PCIe functionality. The supplies
include 1.8V, 3.3V and 12V.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The size of the UFS PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).
Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220915143431.19842-2-johan+linaro@kernel.org
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Configure the reserved memory for ADSP and enable it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-5-luca@z3ntu.xyz
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The customized reserved memory for ADSP is already configured, so we
just need to enable the node.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-4-luca@z3ntu.xyz
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Add a node for the adsp found on msm8226.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220423155059.660387-3-luca@z3ntu.xyz
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Add a node for mt6795-systimer: this is necessary to start the
System Timer(s) for all cores, finally making CNTVCT_EL0 usable.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220729093536.27623-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The size of the PCIe PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).
Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220915143431.19842-1-johan+linaro@kernel.org
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i.MX fixes for 6.0, 2nd round:
- A couple of TQMa8MPQL device tree fixes from Alexander Stein on button
GPIOs and PCF85063 RTC alarm pinctrl.
- Include phy-imx8-pcie.h header in tqma8mqml-mba8mx device tree to fix
build errors when this SoM dtsi is included on customer carrier boards.
- Remove GPU power domain reset from i.MX8MN device tree to fix
a sporadical hang seen with GPUMIX powering up.
- Correct CPLD_Dn GPIO label mapping for Toradex Verdin based Menlo
board.
- Add ARCH_NXP back to defconfig, which was dropped accidentally by
commit 566e373fe047 ("arm64: Kconfig.platforms: Group NXP platforms
together").
- Add missing #reset-cells for i.MX8ULP PCC clock controllers.
- Update PMIC voltages for imx8mm-verdin board to fix an issue with one
Toradex SKU that uses a consumer-grade chip that is capable of going up
to 1.8GHz at 1.00V.
- A series of imx8mp-venice-gw74xx device tree changes from Tim Harvey
to fix things on CAN STBY polarity, KSZ9477 CPU uplink port and
phy-mode.
* tag 'imx-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation
arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
arm64: defconfig: enable ARCH_NXP
arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
arm64: dts: imx8mm-verdin: extend pmic voltages
arm64: dts: imx8ulp: add #reset-cells for pcc
arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
arm64: dts: imx8mn: remove GPU power domain reset
arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Both AMD and Intel recommend using INT3 after an indirect JMP. Make sure
to emit one when rewriting the retpoline JMP irrespective of compiler
SLS options or even CONFIG_SLS.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Alexei Starovoitov <alexei.starovoitov@gmail.com>
Link: https://lkml.kernel.org/r/Yxm+QkFPOhrVSH6q@hirez.programming.kicks-ass.net
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Footbridge is the last Arm platform that has its own
__virt_to_bus()/__bus_to_virt()/phys_to_dma()/dma_to_phys() abstraction,
but this is just a simple offset now.
For PCI devices, the offset that is programmed into the PCI bridge must
also be set in each device using dma_direct_set_offset(). As Arm does
not have a pcibios_bus_add_device() helper yet, just use a bus notifier
for this.
For the ISA DMA, drivers now pass a non-translated physical address into
set_dma_addr(), so they have to be converted back with the corresponding
isa_bus_to_virt() function and then into the correct bus address with
the offset using the isa_dma_dev.
Tested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Make TEGRA186_GPC_DMA driver as built-in since the clients using the
DMA (like I2C_TEGRA etc) are built-in. This would avoid the potential
long delay probe deferral can cause.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add avdd-0v9-supply and avdd-1v8-supply to hdmi node for
rk3399-roc-pc to silence dmesg warning and match the name
of the 1v8 supply to the circuit sheet.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Link: https://lore.kernel.org/r/20220915111138.1108-1-m.reichl@fivetechno.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Gru-Scarlet family includes a variety of SKU identifiers, using
parts of a 3-bit space {0..7}. SKU2 and SKU4 devices (under a few
different manufacturer names) also use the Innolux display.
Without this, a SKU2 device may non-deterministically (depending on the
matching order of DTBs and bootloader behavior) select either one of the
INX DTBs (rk3399-gru-scarlet-dumo.dtb or rk3399-gru-scarlet-inx.dtb) or
the KingDisplay DTB (rk3399-gru-scarlet-kd.dtb), to ill effect.
For reference, the original vendor tree source:
CHROMIUM: arm64: dts: rockchip: add sku{0,2,4} compatibility
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/f6ed665c9e2eb37fb2680debbb36ec9fb0e8fb97
CHROMIUM: arm64: dts: rockchip: scarlet: add SKU0 device tree
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/9987c8776f4b087d135d761e59f7fa6cc83fc7fc
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220817123350.2.I5f4fd0808a927b08e267c189712fb4a85931fd3b@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Remove the following orphan declarations from kvm_ppc.h:
1. kvmppc_mmu_priv_switch() has been removed since
commit dd9ebf1f9435 ("KVM: PPC: e500: Add shadow PID
support").
2. kvmppc_core_destroy_mmu() has been removed since
commit ecc0981ff07c ("KVM: ppc: cosmetic changes to mmu
hook names").
3. kvmppc_prepare_vrma() has been removed since
commit aa04b4cc5be6 ("KVM: PPC: Allocate RMAs (Real Mode
Areas) at boot for use by guests").
So remove the declarations for them from header file.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-10-cuigaosheng1@huawei.com
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Remove the following orphan declarations from ps3av.h:
1. ps3av_dev_open()
2. ps3av_dev_close()
They have been removed since commit 13a5e30cf740 ("[POWERPC] PS3:
Rework AV settings driver"), so remove them.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Acked-by: Geoff Levand <geoff@infradead.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-9-cuigaosheng1@huawei.com
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xics_ipi_dispatch() has been removed since
commit 23d72bfd8f9f ("powerpc: Consolidate ipi message mux
and demux"), so remove it.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-8-cuigaosheng1@huawei.com
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Remove the following orphan declarations from opal.h:
1. opal_notifier_register()
2. opal_notifier_unregister()
3. opal_notifier_update_evt()
4. opal_notifier_enable()
5. opal_notifier_disable()
They have been removed since commit 81f2f7ce4c5b ("opal:
Remove events notifier"), so remove them.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-7-cuigaosheng1@huawei.com
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Remove the following orphan declarations from mmu_context.h:
1. switch_cop() and drop_cop() have been removed since
commit 6ff4d3e96652 ("powerpc: Remove old unused icswx
based coprocessor support").
2. mm_iommu_cleanup() has been removed since
commit 4b6fad7097f8 ("powerpc/mm/iommu, vfio/spapr: Put
pages on VFIO container shutdown").
So remove the declarations for them from header file.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-6-cuigaosheng1@huawei.com
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udbg_init_debug_beat() has been removed since
commit bf4981a00636 ("powerpc: Remove the celleb support"),
so remove it.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-5-cuigaosheng1@huawei.com
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chrp_event_scan() has been removed since
commit 3d541c4b7f6e ("powerpc/chrp: Use the same RTAS
daemon as pSeries"), so remove it.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-4-cuigaosheng1@huawei.com
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Remove the following orphan declarations from spufs.h:
1. spufs_coredump_calls has been removed since
commit 48cad41f7ee7 ("[POWERPC] spufs: Combine
spufs_coredump_calls with spufs_calls").
2. spufs_coredump_num_notes has been removed since
commit 936d5bf1d7dc ("[POWERPC] spufs: Get rid of spufs_coredump_num_notes,
it's not needed if we NULL terminate").
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-3-cuigaosheng1@huawei.com
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ppc_parse_cpu() has been removed since
commit 5b102782c7f4 ("powerpc/xmon: Enable disassembly
files (compilation changes)"), so remove it.
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220913075029.682327-2-cuigaosheng1@huawei.com
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Jetson AGX board has flash device on QSPI controller and SPI instance
on 40-pin expander.
Enable Tegra SPI & QSPI drivers in defconfig as modules.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Enable mac3 controller in Elbert dts: Elbert MAC3 is connected to the
BCM53134P onboard switch's IMP_RGMII port directly (fixed link, no PHY
between BMC MAC and BCM53134P).
Note: BMC's mdio0 controller is connected to BCM53134P's MDIO interface,
and the MDIO channel will be enabled later, when BCM53134 is added to
"bcm53xx" DSA driver.
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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The previous patch triggered a build failure for the debian kernel,
which has CONFIG_64BIT enabled, uses the CROSS_COMPILER environment
variable and uses ARCH=parisc to configure the kernel for 64-bit
support.
This patch weakens the previous patch while keeping the recommended way
to configure the kernel with:
ARCH=parisc -> build 32-bit kernel
ARCH=parisc64 -> build 64-bit kernel
while adding the possibility for debian to configure a 64-bit kernel
even if ARCH=parisc is set (PA8X00 CPU has to be selected and
CONFIG_64BIT needs to be enabled).
The downside of this patch is, that we now have a small window open
again where people may get it wrong: if they enable CONFIG_64BIT and try
to compile with a 32-bit compiler.
Fixes: 3dcfb729b5f4 ("parisc: Make CONFIG_64BIT available for ARCH=parisc64 only")
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # 5.15+
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