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2021-10-20x86/fpu: Cleanup xstate xcomp_bv initializationThomas Gleixner6-33/+49
No point in having this duplicated all over the place with needlessly different defines. Provide a proper initialization function which initializes user buffers properly and make KVM use it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.897664678@linutronix.de
2021-10-20x86/fpu: Do not inherit FPU context for kernel and IO worker threadsThomas Gleixner1-11/+26
There is no reason why kernel and IO worker threads need a full clone of the parent's FPU state. Both are kernel threads which are not supposed to use FPU. So copying a large state or doing XSAVE() is pointless. Just clean out the minimally required state for those tasks. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.839822981@linutronix.de
2021-10-20x86/process: Clone FPU in copy_thread()Thomas Gleixner1-1/+3
There is no reason to clone FPU in arch_dup_task_struct(). Quite the contrary - it prevents optimizations. Move it to copy_thread(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.780714235@linutronix.de
2021-10-20x86/fpu: Remove pointless memset in fpu_clone()Thomas Gleixner1-6/+0
Zeroing the forked task's FPU registers buffer to avoid leaking init optimized stale data into the clone is a pointless exercise for the case where the current task has TIF_NEED_FPU_LOAD set. In that case, the FPU registers state is copied from current's FPU register buffer which can contain stale init optimized data as well. The alledged information leak is non-existant because this stale init optimized data is used nowhere and cannot leak anywhere. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.722854569@linutronix.de
2021-10-20x86/fpu: Cleanup the on_boot_cpu clutterThomas Gleixner2-25/+0
Defensive programming is useful, but this on_boot_cpu debug is really silly. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.665080855@linutronix.de
2021-10-20x86/fpu: Restrict xsaves()/xrstors() to independent statesThomas Gleixner1-15/+7
These interfaces are really only valid for features which are independently managed and not part of the task context state for various reasons. Tighten the checks and adjust the misleading comments. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.608492174@linutronix.de
2021-10-20x86/pkru: Remove useless includeThomas Gleixner2-1/+2
PKRU code does not need anything from FPU headers. Include cpufeature.h instead and fixup the resulting fallout in perf. This is a preparation for FPU changes in order to prevent recursive include hell. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.551522694@linutronix.de
2021-10-20x86/fpu: Update stale commentsThomas Gleixner1-10/+3
copy_fpstate_to_sigframe() does not have a slow path anymore. Neither does the !ia32 restore in __fpu_restore_sig(). Update the comments accordingly. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.493570236@linutronix.de
2021-10-20x86/fpu: Remove pointless argument from switch_fpu_finish()Thomas Gleixner3-5/+3
Unused since the FPU switching rework. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011538.433135710@linutronix.de
2021-10-20Merge tag 'imx-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dtArnd Bergmann29-190/+1374
i.MX arm64 device tree changes for 5.16: - New board support: LX2160A based BlueBox3, S32G2 EVB and RDB2 boards. - Quite some updates on imx8mq-librem5 board: delay the startup of the SDIO, add power sequencing for M.2 cards, add wifi regulator, add panel reset GPIO, fix led_r and led_g pinctrl, etc. - Fix the SPI chipselect polarity for a couple of i.MX8MM boards. - Add GPU nodes for i.MX8MM 2D and 3D core. - Add VPU and DISP blk-ctrl devices for i.MX8MM. - A series from Michael Walle to LS1028A device trees and add GPU support. - Random and small updates on various boards. * tag 'imx-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits) arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card arm64: dts: imx8mm-venice-gw7901.dts: disable pgc_gpumix arm64: dts: imx8mq-librem5: set debounce interval of volume buttons to 50ms arm64: dts: imx8mq-librem5: Limit the max sdio frequency arm64: dts: imx8mq-librem5: add power sequencing for M.2 cards arm64: dts: imx8mq-librem5: delay the startup of the SDIO arm64: dts: imx8mq-librem5: wire up the wifi regulator arm64: dts: imx8mq-librem5: Fix led_r and led_g pinctrl assignments arm64: dts: imx8mq-librem5: add reset gpio to mantix panel description arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY arm64: dts: imx8mm: add DISP blk-ctrl arm64: dts: imx8mm: add VPU blk-ctrl arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core arm64: dts: imx8mm: put USB controllers into power-domains arm64: dts: imx8mm: add GPC node arm64: dts: ls1028a: mark internal links between Felix and ENETC as capable of flow control arm64: dts: freescale: Fix 'interrupt-map' parent address cells arm64: dts: ls1028a: use phy-mode instead of phy-connection-type arm64: dts: ls1028a: move PHY nodes to MDIO controller arm64: dts: ls1028a: disable usb controller by default ... Link: https://lore.kernel.org/r/20211016140138.1603-4-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'imx-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dtArnd Bergmann39-323/+1650
i.MX device tree changes for 5.16: - New board support: Kobo Libra H2O, Tolino Vision 5, SKOV LT2 and Colibri i.MX6ULL eMMC variants. - A series from Fabio Estevam to correct SPI chipselect polarity for various i.MX6/7 boards. - A couple of patches from Krzysztof Kozlowski to clean up unsupported properties from imx6dl-b1x5v2 and imx6dl-prtrvt boards. - A series from Li Yang to clean up LS1021a based boards and add missing device nodes. - A series from Matthias Schiffer to fix typo, add SPI-NOR flash and partition layout for imx7-tqma7/mba7 boards. - Fix the schema check errors in i.MX PCIe device nodes. - Other random and small fix-up and device additions. * tag 'imx-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (42 commits) ARM: dts: ls1021a-tsn: use generic "jedec,spi-nor" compatible for flash ARM: dts: ls1021a: move thermal-zones node out of soc/ ARM: dts: ls1021a-tsn: remove undocumented property "position" from mma8452 node ARM: dts: ls1021a-qds: change fpga to simple-mfd device ARM: dts: ls1021a: add #power-domain-cells for power-controller node ARM: dts: ls1021a: add #dma-cells to qdma node ARM: dts: ls1021a: fix memory node for schema check ARM: dts: ls1021a: remove regulators simple-bus ARM: dts: ls1021a: disable ifc node by default ARM: dts: ls1021a: breakup long values in thermal node ARM: dts: ls1021a: fix board compatible to follow binding schema ARM: dts: ls1021a: update pcie nodes for dt-schema check ARM: dts: ls1021a-qds: Add node for QSPI flash ARM: dts: ls1021a: change to use SPDX identifiers ARM: dts: ls1021a: change dma channels order to match schema ARM: dts: ls1021a: remove clock-names property for i2c nodes ARM: dts: imx6dl-prtrvt: drop undocumented TRF7970A NFC properties ARM: dts: imx6: phytec: Add gpio pinctrl for i2c bus recovery ARM: dts: imx6: skov: provide panel support for lt2 variants ARM: dts: imx6qdl-apalis: Fix typo in ADC comment ... Link: https://lore.kernel.org/r/20211016140138.1603-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dtArnd Bergmann5-0/+171
Visconti device tree updates for 5.16 - Add DT support for Toshiba Visconti5 PCIe driver - Add 150MHz fixed clock to TMPV7708 SoC - Add DT support for VisROBO VRB boardi * tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: dts: visconti: Add DTS for the VisROBO board dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB board arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC Link: https://lore.kernel.org/r/YWoH3g7vU1ZEAp+P@toshiba.co.jp Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'mvebu-dt-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dtArnd Bergmann2-0/+296
mvebu dt for 5.16 (part 1) Add support for Netgear GS110EMX switch (Armada 381 SoC based) * tag 'mvebu-dt-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: mvebu: add device tree for netgear gs110emx switch Link: https://lore.kernel.org/r/874k9imeel.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'mvebu-dt64-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dtArnd Bergmann2-0/+459
mvebu dt64 for 5.16 (part 1) Add support for Globalscale MOCHAbin an Armada 7040 based development board. * tag 'mvebu-dt64-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: marvell: add Globalscale MOCHAbin Link: https://lore.kernel.org/r/877deemefy.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20KVM: s390: preserve deliverable_mask in __airqs_kick_single_vcpuHalil Pasic1-2/+3
Changing the deliverable mask in __airqs_kick_single_vcpu() is a bug. If one idle vcpu can't take the interrupts we want to deliver, we should look for another vcpu that can, instead of saying that we don't want to deliver these interrupts by clearing the bits from the deliverable_mask. Fixes: 9f30f6216378 ("KVM: s390: add gib_alert_irq_handler()") Signed-off-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Michael Mueller <mimu@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Link: https://lore.kernel.org/r/20211019175401.3757927-3-pasic@linux.ibm.com Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2021-10-20KVM: s390: clear kicked_mask before sleeping againHalil Pasic1-0/+1
The idea behind kicked mask is that we should not re-kick a vcpu that is already in the "kick" process, i.e. that was kicked and is is about to be dispatched if certain conditions are met. The problem with the current implementation is, that it assumes the kicked vcpu is going to enter SIE shortly. But under certain circumstances, the vcpu we just kicked will be deemed non-runnable and will remain in wait state. This can happen, if the interrupt(s) this vcpu got kicked to deal with got already cleared (because the interrupts got delivered to another vcpu). In this case kvm_arch_vcpu_runnable() would return false, and the vcpu would remain in kvm_vcpu_block(), but this time with its kicked_mask bit set. So next time around we wouldn't kick the vcpu form __airqs_kick_single_vcpu(), but would assume that we just kicked it. Let us make sure the kicked_mask is cleared before we give up on re-dispatching the vcpu. Fixes: 9f30f6216378 ("KVM: s390: add gib_alert_irq_handler()") Reported-by: Matthew Rosato <mjrosato@linux.ibm.com> Signed-off-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Michael Mueller <mimu@linux.ibm.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Link: https://lore.kernel.org/r/20211019175401.3757927-2-pasic@linux.ibm.com Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2021-10-20powerpc/smp: do not decrement idle task preempt count in CPU offlineNathan Lynch1-2/+0
With PREEMPT_COUNT=y, when a CPU is offlined and then onlined again, we get: BUG: scheduling while atomic: swapper/1/0/0x00000000 no locks held by swapper/1/0. CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.15.0-rc2+ #100 Call Trace: dump_stack_lvl+0xac/0x108 __schedule_bug+0xac/0xe0 __schedule+0xcf8/0x10d0 schedule_idle+0x3c/0x70 do_idle+0x2d8/0x4a0 cpu_startup_entry+0x38/0x40 start_secondary+0x2ec/0x3a0 start_secondary_prolog+0x10/0x14 This is because powerpc's arch_cpu_idle_dead() decrements the idle task's preempt count, for reasons explained in commit a7c2bb8279d2 ("powerpc: Re-enable preemption before cpu_die()"), specifically "start_secondary() expects a preempt_count() of 0." However, since commit 2c669ef6979c ("powerpc/preempt: Don't touch the idle task's preempt_count during hotplug") and commit f1a0a376ca0c ("sched/core: Initialize the idle task with preemption disabled"), that justification no longer holds. The idle task isn't supposed to re-enable preemption, so remove the vestigial preempt_enable() from the CPU offline path. Tested with pseries and powernv in qemu, and pseries on PowerVM. Fixes: 2c669ef6979c ("powerpc/preempt: Don't touch the idle task's preempt_count during hotplug") Signed-off-by: Nathan Lynch <nathanl@linux.ibm.com> Reviewed-by: Valentin Schneider <valentin.schneider@arm.com> Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211015173902.2278118-1-nathanl@linux.ibm.com
2021-10-20powerpc/idle: Don't corrupt back chain when going idleMichael Ellerman1-4/+6
In isa206_idle_insn_mayloss() we store various registers into the stack red zone, which is allowed. However inside the IDLE_STATE_ENTER_SEQ_NORET macro we save r2 again, to 0(r1), which corrupts the stack back chain. We used to do the same in isa206_idle_insn_mayloss() itself, but we fixed that in 73287caa9210 ("powerpc64/idle: Fix SP offsets when saving GPRs"), however we missed that the macro also corrupts the back chain. Corrupting the back chain is bad for debuggability but doesn't necessarily cause a bug. However we recently changed the stack handling in some KVM code, and it now relies on the stack back chain being valid when it returns. The corruption causes that code to return with r1 pointing somewhere in kernel data, at some point LR is restored from the stack and we branch to NULL or somewhere else invalid. Only affects Power8 hosts running KVM guests, with dynamic_mt_modes enabled (which it is by default). The fixes tag below points to the commit that changed the KVM stack handling, exposing this bug. The actual corruption of the back chain has always existed since 948cf67c4726 ("powerpc: Add NAP mode support on Power7 in HV mode"). Fixes: 9b4416c5095c ("KVM: PPC: Book3S HV: Fix stack handling in idle_kvm_start_guest()") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211020094826.3222052-1-mpe@ellerman.id.au
2021-10-20arm64: dts: rockchip: Add idle cooling devices to rk3399Daniel Lezcano1-0/+12
The thermal framework accepts now the cpu idle cooling device as an alternative when the cpufreq cooling device fails. Add the node in the DT so the cooling devices will be present and the platforms can extend the thermal zone definition to add them. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20211001161728.1729664-1-daniel.lezcano@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-20ARM: dts: rockchip: remove usb-phy fallback string from rk3066a/rk3188Johan Jonker2-4/+2
With the conversion of rockchip-usb-phy.yaml a long time used fallback string for rk3066a/rk3188 was added. The linux driver doesn't do much with the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example don't match. Remove the usb-phy fallback string for rk3066a/rk3188 to prevent possible strange side effects. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210828111218.10026-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-20ARM: dts: gemini: Consolidate PCI interrupt-map propertiesRob Herring6-91/+20
The Gemini PCI 'interrupt-map' does not vary by board, so let's move the definition to a common location. This avoids having incomplete interrupt properties (i.e. #interrupt-cells without interrupt-map). Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-19x86/ftrace: Remove fault protection code in prepare_ftrace_returnSteven Rostedt (VMware)1-35/+3
Removing the fault protection code when writing return_hooker to stack. As Steven noted: > That protection was there from the beginning due to being "paranoid", > considering ftrace was bricking network cards. But that protection > would not have even protected against that. Link: https://lkml.kernel.org/r/20211008091336.33616-3-jolsa@kernel.org Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-19x86/ftrace: Remove extra orig rax moveJiri Olsa1-1/+0
There's identical move 2 lines earlier. Link: https://lkml.kernel.org/r/20211008091336.33616-2-jolsa@kernel.org Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-10-20ARM: dts: ixp4xx: Group PCI interrupt properties togetherRob Herring13-2/+24
Move the PCI 'interrupt-map-mask' and '#interrupt-cells' properties alongside the 'interrupt-map' property in each board dts. This avoids having incomplete set of interrupt properties which may fail validation. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
2021-10-20Merge tag 'stm32-dt-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dtArnd Bergmann13-15/+508
STM32 DT for v5.16, round 1 Highlights: ---------- - MPU: - ST boards: - Add new stm32mp135f-dk board. It embedds new STM32MP135 SoC, with 512 MB of DDR3. Several connections are available on this board: 4*USB2.0, 1*USB2.0 typeC DRD, SDcard, 2*RJ45, HDMI, Combo Wifi/BT, ... Only SD card, uart4 (console) and watchdog IPs are enabled in this tag. - Change IRQ level for STUSB1600 on DKx boards. - Fix SAI subclocks range. - Add ck_usb0_48m clock in USB OHCI node device to match with STM32MP15 datasheet. - DH boards: - Reduce DHCOR SPI NOR frequency to 50 MHz to avoid sporadic issues. - Fix SAI pin muxing. - Odyssey: - Set DCMI pins. * tag 'stm32-dt-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151 ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15 ARM: dts: stm32: fix SAI sub nodes register range ARM: dts: stm32: fix STUSB1600 Type-C irq level on stm32mp15xx-dkx ARM: dts: stm32: set the DCMI pins on stm32mp157c-odyssey ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz ARM: dts: stm32: add initial support of stm32mp135f-dk board dt-bindings: stm32: document stm32mp135f-dk board ARM: dts: stm32: add STM32MP13 SoCs support Link: https://lore.kernel.org/r/9d52c3e2-a3b9-89f3-1896-7cd3560e7010@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20Merge tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dtArnd Bergmann10-46/+1849
Renesas ARM DT updates for v5.16 (take two) - SPI Multi I/O Bus, SDHI, and Ethernet support for the RZ/G2L SoC, - SPI Multi I/O Bus, camera, and video-on support for the R-Car V3U SoC, - SPI FLASH support for the Falcon development board, - eMMC, microSD, and Ethernet support for the RZ/G2L SMARC EVK development board, - 2 GHz High-Performance support for the R-Car H3e-2G, M3e-2G, and M3Ne-2G SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: mailmap: Fix text encoding for Niklas Söderlund arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet arm64: dts: renesas: r9a07g044: Add GbEthernet nodes arm64: dts: renesas: Add ports node to all adv7482 nodes arm64: dts: renesas: r8a779a0: Add and connect all CSI-2, ISP and VIN nodes arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform arm64: dts: renesas: r9a07g044: Add SDHI nodes arm64: dts: renesas: falcon-cpu: Add SPI flash via RPC arm64: dts: renesas: r8a779a0: Add RPC node arm64: dts: renesas: r9a07g044: Add SPI Multi I/O Bus controller node Link: https://lore.kernel.org/r/cover.1634298094.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'aspeed-5.16-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dtArnd Bergmann8-21/+1872
ASPEED device tree updates for 5.15 - New machines: * TYAN S7106 BMC, a x86 server from about four years ago - Descriptions for the AST2600 ADC, which now has an upstream driver - Lots of GPIO line names. The OpenBMC project has adopted a scheme for naming the lines, and new additions will follow this guide - New I2C devices for Rainier, Everest, EthanolX, Mt Jade - Fixes for fp5280g2 which has seen some recent development, including the addtion of a QEmu machine for testing * tag 'aspeed-5.16-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: fp5280g2: Use the 64M layout ARM: dts: aspeed: Add TYAN S7106 BMC machine ARM: dts: aspeed: rainier: Add power-config-full-load gpio ARM: dts: aspeed: p10bmc: Define secure boot gpio ARM: dts: aspeed: mtjade: Add some gpios ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest ARM: dts: everest: Define name for gpio line B6 ARM: dts: everest: Define name for gpio line Q2 ARM: dts: rainier: Define name for gpio line Q2 ARM: dts: everest: Add 'factory-reset-toggle' as GPIOF6 ARM: dts: aspeed: everest: Add I2C bus 15 muxes ARM: dts: aspeed: rainier: Add system LEDs ARM: dts: aspeed: amd-ethanolx: Add FRU EEPROM ARM: dts: fp5280g2: Enable KCS 3 for MCTP binding Link: https://lore.kernel.org/r/CACPK8XdrMzY9tzdof7KpzxKquTo7GcWW4N9Zqwtmmu73C7htXA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'hisi-arm64-dt-for-5.16' of git://github.com/hisilicon/linux-hisi into arm/dtArnd Bergmann5-26/+96
ARM64: DT: HiSilicon ARM64 DT updates for 5.16 - Add SPMI PMIC support for the Hikey970 board - Correct the sp805 watchdog compatible string to match the document - Correct the operating-points table name to match the dtschema * tag 'hisi-arm64-dt-for-5.16' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: align operating-points table name with dtschema arm64: dts: hisilicon: fix arm,sp805 compatible string arm64: dts: hisilicon: Add support for Hikey 970 PMIC Link: https://lore.kernel.org/r/6168EB53.60503@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'ux500-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dtArnd Bergmann10-38/+61
Ux500 DTS updates: - Flag the janice SPI display lines properly for the right line semantics. - Fix some errors in the Skomer regulator configuration. - Fix some SD card pin configurations on Skomer. - Assign the Skomer SD card a 300 ms power-on delay. - Rewrite the battery nodes to use the standard binding "monitored-battery" as used in the updated bindings, and provide the right Samsung battery compatibles for the Samsung phones. * tag 'ux500-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Switch battery nodes to standard ARM: dts: ux500: Skomer eMMC needs 300 ms power on ARM: dts: ux500: Fix up SD card pin config ARM: dts: ux500: Skomer regulator fixes ARM: dts: ux500: Tag Janice display SPI correct Link: https://lore.kernel.org/r/CACRpkdYf5GwRvG1Gemk4mE+aw6UnAVTY8OudwsVNPQXThHXu6g@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'arm-soc/for-5.16/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann1-8/+8
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.16, please pull the following: - Rafal updates the BCM4908 DTS files to produce fewer warnings by fixing the UART clock name, moving the reboot syscon node out of the bus node, and finally updating the NAND controller node names. * tag 'arm-soc/for-5.16/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: Fix UART clock name arm64: dts: broadcom: bcm4908: Move reboot syscon out of bus arm64: dts: broadcom: bcm4908: Fix NAND node name Link: https://lore.kernel.org/r/20211013174016.831348-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'arm-soc/for-5.16/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann50-172/+1748
This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.16, please pull the following: - Matthew provides a set of updates to the Northstar Plus Device Tree files to fix a number of warnings, and prepare the files to support the addition of the Cisco Meraki MX64/MX65 wireless controller devices and finally adds support for those boards. - Rafal continues to provide updates to the BCM5301X Device Tree files in order to fix warnings with the various node names, MDIO muxes and memory nodes. He also adds support for the external switches on the BCM53573 SoC and adds Tenda AC9 switch ports. - Christian provides the description of the Ethernet switch ports for the Cisco Meraki MR32 based on the 53016 SoC - Arinc adds support for the Asus RT-AC88U device based on the BCM4709 and featuring 8 Ethernet ports over the integrated and the external Realtek switch (not supported yet) - Stefan adds support for the Raspberry Pi Compute Module 4 IO board and does a number of preparatory changes to get there to the Device Tree files before doing the actual addition * tag 'arm-soc/for-5.16/devicetree' of https://github.com/Broadcom/stblinux: (31 commits) arm64: dts: broadcom: Add reference to RPi CM4 IO Board ARM: dts: Add Raspberry Pi Compute Module 4 IO Board ARM: dts: Add Raspberry Pi Compute Module 4 dt-bindings: arm: bcm2835: Add Raspberry Pi Compute Module 4 ARM: dts: bcm283x-rpi: Move Wifi/BT into separate dtsi dt-bindings: display: bcm2835: add optional property power-domains ARM: dts: BCM5301X: Add DT for Asus RT-AC88U ARM: BCM53016: MR32: get mac-address from nvmem ARM: BCM53016: Specify switch ports for Meraki MR32 ARM: dts: BCM53573: Add Tenda AC9 switch ports ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch ARM: dts: BCM5301X: Specify switch ports for more devices ARM: dts: NSP: Fix MX65 MDIO mux warnings ARM: dts: NSP: Fix MX64/MX65 eeprom node name ARM: dts: NSP: Fix MDIO mux node names ARM: dts: NSP: Fix mpcore, mmc node names ARM: dts: NSP: Add bcm958623hr board name to dts ARM: dts: BCM5301X: Fix memory nodes names ARM: dts: BCM5301X: Fix MDIO mux binding ARM: dts: BCM5301X: Fix nodes names ... Link: https://lore.kernel.org/r/20211013174016.831348-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'samsung-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dtArnd Bergmann6-9/+1556
Samsung DTS ARM64 changes for v5.16 1. Match Exynos5433 DTS with dtschema. 2. Add an Exynos Auto v9 SoC and SADK board. The Exynos Auto v9 is a design for automotive for In-vehicle Infotainments (IVI) and Advanced Driver-Assistance Systems (ADAS). This pull request brings very basic support (pinctrl, UART and UFS storage) with a development SADK (Samsung Automotive Development Kit) board. * tag 'samsung-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: add minimal support for exynosautov9 sadk board arm64: dts: exynos: add initial support for exynosautov9 SoC arm64: dts: exynos: add proper comaptible FSYS syscon in Exynos5433 arm64: dts: exynos: align operating-points table name with dtschema in Exynos5433 Link: https://lore.kernel.org/r/20211013162418.43072-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'samsung-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dtArnd Bergmann4-23/+19
Samsung DTS ARM changes for v5.16 Minor cleanups - from undocumented or unused properties, coding style. * tag 'samsung-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: use spaces instead of tabs around '=' ARM: dts: exynos: remove unneeded DVS voltages from PMIC on Arndale ARM: dts: exynos: drop undocumented samsung,sata-freq property in Exynos5250 Link: https://lore.kernel.org/r/20211013162418.43072-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'qcom-arm64-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dtArnd Bergmann46-372/+6768
Qualcomm ARM64 dts updates for v5.16 MSM8916 gained some DT cleanup fixes. The Dragonboard 410c gains updated firmware paths to the device specific firmware for modem and WiFi, to allow these to be pushed to linux-next. The Longcheer L8150 gains extcon support and the interrupt configuration for the accelerometer and magnetometer are corrected. MSM8998 gained descriptions for the multimedia clock controller and iommu, as well as the GPU and its dedicated IOMMU. The QFPROM node is updated to access the CRC corrected value space, the white LED (for backlight) found in PMI8998 is described and GCC gains references to the missing XO and sleep_clk reference clocks. On top of this initial support for the Fxtec Pro1 QX1000 is added and then the Sony Xperia XZ1, Xperia XZ1 Compact and the Xperia XZ Premium, with USB, touchscreen, SDHCI, Bluetooth and vibrator supported. The Xiaomi Mi 5 and Xiaomi Mi Note 2, based on the MSM8996 platform was added, with support for frame buffer, GPU, audio, video encoder/decoder and touchscreen. The USB controller and PHY found in IPA6018 is described to provide USB support. IPQ8074 gains a description of the SPMI controller. The highlight on SC7180 is the introduction of the just released "Homestar" device. CPU power coefficients are corrected based on measurements, IMEM is described to ensure that remoteproc relocation information is carried to post mortem debug tools and a few smaller fixes are introduced. The SC7280 gains QSPI, low speed (i2c/spi/uart), GPU, thermal zones, modem, CPU topology and updated memory map. On SDM845 the "Limits hardware" is described and increases the throttling temperature of the hardware from ~70C to 95C, with up to 30% improvement in benchmarks as result. Relying on hardware throttling and thermal pressure, the CPU cooling devices are dropped. The power for the second WiFi channel is properly described for the Lenovo Yoga C630, to ensure they are both powered. reboot-modes are defined for the PM660 PMIC, found in SDM630 and SDM660. Initial support for the Snapdragon 690 (aka SM6350) is introduced, with support for clocks, regulators, pinctrl, storage, thermal sensors, USB, SMMU and CPUfreq. On top of this support for the Sony Xperia 10 III is introduced. * tag 'qcom-arm64-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (99 commits) arm64: dts: qcom: sdm630-nile: Correct regulator label name arm64: dts: qcom: sm6125: Improve indentation of multiline properties arm64: dts: qcom: msm8916-longcheer-l8150: Use &pm8916_usbin extcon arm64: dts: qcom: pm8916: Add pm8941-misc extcon for USB detection arm64: dts: qcom: pm8916: Remove wrong reg-names for rtc@6000 arm64: dts: qcom: sc7280: Update Q6V5 MSS node arm64: dts: qcom: sc7280: Add Q6V5 MSS node arm64: dts: qcom: sc7280: Add nodes to boot modem arm64: dts: qcom: sc7280: Add/Delete/Update reserved memory nodes arm64: dts: qcom: sc7280: Update reserved memory map arm64: dts: qcom: msm8998-fxtec-pro1: Add tlmm keyboard keys arm64: dts: qcom: msm8998-fxtec-pro1: Add Goodix GT9286 touchscreen arm64: dts: qcom: msm8998-fxtec-pro1: Add physical keyboard leds arm64: dts: qcom: Add support for MSM8998 F(x)tec Pro1 QX1000 arm64: dts: qcom: msm8916: Fix Secondary MI2S bit clock arm64: dts: qcom: msm8916-longcheer-l8150: Add missing sensor interrupts arm64: dts: qcom: sc7180: Add IMEM and pil info regions arm64: dts: qcom: pm6150l: Add missing include arm64: dts: qcom: sm6350: Add device tree for Sony Xperia 10 III arm64: dts: qcom: sm6350: Add apps_smmu and assign iommus prop to USB1 ... Link: https://lore.kernel.org/r/20211012231155.1036519-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'qcom-dts-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dtArnd Bergmann11-22/+538
Qualcomm DTS updates for v5.16 This extends the previous limited description of MSM8226 with SDHC, UART, I2C, SCM, SMEM, RPM and basic PMIC definitions. Based on this, initial support for the LG G Watch R smartwatch is introduced. APQ8064 gets a couple of DT updates, one which will allow the GPU driver to drop supporting legacy "opp tables" in the future. DT bindings and DTS files are updated with additional compatibles, for completeness. * tag 'qcom-dts-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: arm: qcom, add missing devices ARM: dts: qcom: msm8974: Add xo_board reference clock to DSI0 PHY ARM: dts: qcom: fill secondary compatible for multiple boards ARM: dts: qcom: apq8064: adjust memory node according to specs ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2 ARM: dts: qcom: Add support for LG G Watch R dt-bindings: arm: qcom: Document APQ8026 SoC binding ARM: dts: qcom: Add pm8226 PMIC ARM: dts: qcom: msm8226: Add more SoC bits dt-bindings: arm: qcom: Document SDX65 platform and boards Link: https://lore.kernel.org/r/20211012174310.1017857-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'v5.15-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dtArnd Bergmann28-120/+622
Biggest change is, that we have now support for a reset controller inside the mmsys. This goes inhand with changes to the driver, that you will find in the soc pull request. Mediatek PCI device tree binding described the root port in a wrong. The IP actaully implements several root complex with everyone having a single root port. We need to fix the DT in an incompatible way to describe the HW as it is. This also fixes a problem that no IRQ bigger then 32 could be handled. The only public available HW that is affected by this is the BananaPi R64. I'm not aware that there is a big user base using the upstream kernel. In this boards PCI is only used for extension cards, so I don't expect any boot problems. - mt8173: add reset for dsi0 to mmsys - move dt-bindings reset controller includes to correct folder - split PCIe node to use new format for mt2712 and mt7622 - mt8183: add audio node to chromebook devices - mt8192: add clock controller node * tag 'v5.15-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0 arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0 dt-bindings: display: mediatek: add dsi reset optional property dt-bindings: mediatek: Add #reset-cells to mmsys system controller arm64: dts: mediatek: Move reset controller constants into common location arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 arm64: dts: mt8183: add kukui platform audio node arm64: dts: mt8183: add audio node arm64: dts: mediatek: Add mt8192 clock controllers Link: https://lore.kernel.org/r/1a3d63a3-c020-3319-26f6-a2ec338cc42e@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19powerpc/perf: Fix data source encodings for L2.1 and L3.1 accessesKajol Jain2-5/+23
Fix the data source encodings to represent L2.1/L3.1(another core's L2/L3 on the same node) accesses properly for power10 and older plaforms. Add new macros(LEVEL/REM) which can be used to add mem_lvl_num and remote field data inside perf_mem_data_src structure. Result in power9 system with patch changes: localhost:~/linux/tools/perf # ./perf mem report | grep Remote 0.01% 1 252 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff7f25eb90 anon HitM N/A No N/A 0 0 0.01% 1 220 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff77776d90 anon HitM N/A No N/A 0 0 0.01% 1 220 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff817d9410 anon HitM N/A No N/A 0 0 Fixes: 79e96f8f930d ("powerpc/perf: Export memory hierarchy info to user space") Signed-off-by: Kajol Jain <kjain@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20211006140654.298352-5-kjain@linux.ibm.com
2021-10-19s390: update defconfigsHeiko Carstens2-3/+13
Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-19samples: add s390 support for ftrace direct call samplesHeiko Carstens1-0/+1
Add s390 support for ftrace direct call samples, which also enables ftrace direct call selftests within ftrace selftests. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lore.kernel.org/r/20211012133802.2460757-5-hca@linux.ibm.com Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-19samples: add HAVE_SAMPLE_FTRACE_DIRECT config optionHeiko Carstens1-0/+1
Add HAVE_SAMPLE_FTRACE_DIRECT config option which can be selected by architectures which have support for ftrace direct call samples. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lore.kernel.org/r/20211012133802.2460757-4-hca@linux.ibm.com Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-19s390: make STACK_FRAME_OVERHEAD available via asm-offsets.hHeiko Carstens1-0/+1
Make STACK_FRAME_OVERHEAD available via asm-offsets.h. This allows to add s390 specific asm code to e.g. ftrace samples, without requiring to add random header files, which might cause all sort of problems on other architectures. asm-offsets.h can be assumed to be non-problematic. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lore.kernel.org/r/20211012133802.2460757-3-hca@linux.ibm.com Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-19s390/ftrace: add HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALL supportHeiko Carstens3-6/+30
This is the s390 variant of commit 562955fe6a55 ("ftrace/x86: Add register_ftrace_direct() for custom trampolines"). Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lore.kernel.org/r/20211012133802.2460757-2-hca@linux.ibm.com Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-19x86/sme: Use #define USE_EARLY_PGTABLE_L5 in mem_encrypt_identity.cTom Lendacky1-0/+9
When runtime support for converting between 4-level and 5-level pagetables was added to the kernel, the SME code that built pagetables was updated to use the pagetable functions, e.g. p4d_offset(), etc., in order to simplify the code. However, the use of the pagetable functions in early boot code requires the use of the USE_EARLY_PGTABLE_L5 #define in order to ensure that the proper definition of pgtable_l5_enabled() is used. Without the #define, pgtable_l5_enabled() is #defined as cpu_feature_enabled(X86_FEATURE_LA57). In early boot, the CPU features have not yet been discovered and populated, so pgtable_l5_enabled() will return false even when 5-level paging is enabled. This causes the SME code to always build 4-level pagetables to perform the in-place encryption. If 5-level paging is enabled, switching to the SME pagetables results in a page-fault that kills the boot. Adding the #define results in pgtable_l5_enabled() using the __pgtable_l5_enabled variable set in early boot and the SME code building pagetables for the proper paging level. Fixes: aad983913d77 ("x86/mm/encrypt: Simplify sme_populate_pgd() and sme_populate_pgd_large()") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: <stable@vger.kernel.org> # 4.18.x Link: https://lkml.kernel.org/r/2cb8329655f5c753905812d951e212022a480475.1634318656.git.thomas.lendacky@amd.com
2021-10-19x86/sev: Carve out HV call's return value verificationBorislav Petkov1-24/+29
Carve out the verification of the HV call return value into a separate helper and make it more readable. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/YVbYWz%2B8J7iMTJjc@zn.tnic
2021-10-19arm64: Add HWCAP for self-synchronising virtual counterMarc Zyngier4-1/+5
Since userspace can make use of the CNTVSS_EL0 instruction, expose it via a HWCAP. Suggested-by: Will Deacon <will@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211017124225.3018098-18-maz@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-19arm64: Add handling of CNTVCTSS trapsMarc Zyngier2-0/+17
Since CNTVCTSS obey the same control bits as CNTVCT, add the necessary decoding to the hook table. Note that there is no known user of this at the moment. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211017124225.3018098-17-maz@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-19arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0Marc Zyngier2-8/+27
CNTPCTSS_EL0 and CNTVCTSS_EL0 are alternatives to the usual CNTPCT_EL0 and CNTVCT_EL0 that do not require a previous ISB to be synchronised (SS stands for Self-Synchronising). Use the ARM64_HAS_ECV capability to control alternative sequences that switch to these low(er)-cost primitives. Note that the counter access in the VDSO is for now left alone until we decide whether we want to allow this. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211017124225.3018098-16-maz@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-19arm64: Add a capability for FEAT_ECVMarc Zyngier2-0/+11
Add a new capability to detect the Enhanced Counter Virtualization feature (FEAT_ECV). Reviewed-by: Oliver Upton <oupton@google.com> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211017124225.3018098-15-maz@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-19Merge branch 'timers/drivers/armv8.6_arch_timer' of https://git.linaro.org/people/daniel.lezcano/linux into for-next/8.6-timersWill Deacon2-44/+45
Pull Arm architected timer driver rework from Marc (via Daniel) so that we can add the Armv8.6 support on top. Link: https://lore.kernel.org/r/d0c55386-2f7f-a940-45bb-d80ae5e0f378@linaro.org * 'timers/drivers/armv8.6_arch_timer' of https://git.linaro.org/people/daniel.lezcano/linux: clocksource/drivers/arch_arm_timer: Move workaround synchronisation around clocksource/drivers/arm_arch_timer: Fix masking for high freq counters clocksource/drivers/arm_arch_timer: Drop unnecessary ISB on CVAL programming clocksource/drivers/arm_arch_timer: Remove any trace of the TVAL programming interface clocksource/drivers/arm_arch_timer: Work around broken CVAL implementations clocksource/drivers/arm_arch_timer: Advertise 56bit timer to the core code clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL clocksource/drivers/arm_arch_timer: Fix MMIO base address vs callback ordering issue clocksource/drivers/arm_arch_timer: Move drop _tval from erratum function names clocksource/drivers/arm_arch_timer: Move system register timer programming over to CVAL clocksource/drivers/arm_arch_timer: Extend write side of timer register accessors to u64 clocksource/drivers/arm_arch_timer: Drop CNT*_TVAL read accessors clocksource/arm_arch_timer: Add build-time guards for unhandled register accesses
2021-10-19ARM: 9141/1: only warn about XIP address when not compile testingArnd Bergmann1-1/+1
In randconfig builds, we sometimes come across this warning: arm-linux-gnueabi-ld: XIP start address may cause MPU programming issues While this is helpful for actual systems to figure out why it fails, the warning does not provide any benefit for build testing, so guard it in a check for CONFIG_COMPILE_TEST, which is usually set on randconfig builds. Fixes: 216218308cfb ("ARM: 8713/1: NOMMU: Support MPU in XIP configuration") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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