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2021-10-12KVM: arm64: Fix reporting of endianess when the access originates at EL0Marc Zyngier1-1/+4
We currently check SCTLR_EL1.EE when computing the address of a faulting guest access. However, the fault could have occured at EL0, in which case the right bit to check would be SCTLR_EL1.E0E. This is pretty unlikely to cause any issue in practice: You'd have to have a guest with a LE EL1 and a BE EL0 (or the other way around), and have mapped a device into the EL0 page tables. Good luck with that! Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Link: https://lore.kernel.org/r/20211012112312.1247467-1-maz@kernel.org
2021-10-12Merge tag 'ti-k3-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dtArnd Bergmann26-123/+1652
Devicetree changes for TI K3 platforms for v5.16 merge window: * New Platforms: - AM654: Siemens IOT2050 PG2 boards - J721E: Low cost SK board * New features: - mmc aliases introduced - AM64 ICSSG nodes, mcu pinctrl added * Fixes: - Schema fixups for pcie, thermal zones - Fixup to include board specific property for J721e-evm and j7200-evm - Misc fixups including cleaning up order in Makefile * tag 'ti-k3-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (24 commits) arm64: dts: ti: k3-j721e-sk: Add DDR carveout memory nodes arm64: dts: ti: k3-j721e-sk: Add IPC sub-mailbox nodes arm64: dts: ti: Add support for J721E SK dt-bindings: arm: ti: Add compatible for J721E SK arm64: dts: ti: iot2050: Add support for product generation 2 boards arm64: dts: ti: iot2050: Prepare for adding 2nd-generation boards dt-bindings: arm: ti: Add bindings for Siemens IOT2050 PG2 boards arm64: dts: ti: iot2050: Add/enabled mailboxes and carve-outs for R5F cores arm64: dts: ti: iot2050: Disable SR2.0-only PRUs arm64: dts: ti: iot2050: Flip mmc device ordering on Advanced devices arm64: dts: ti: k3-j7200-common-proc-board: Add j7200-evm compatible arm64: dts: ti: k3-j721e-common-proc-board: Add j721e-evm compatible dt-bindings: arm: ti: Add missing compatibles for j721e/j7200 evms arm64: dts: ti: Makefile: Collate AM64 platforms together arm64: dts: ti: k3-am64-main: Add ICSSG nodes arm64: dts: ti: k3-am65: Relocate thermal-zones to SoC specific location arm64: dts: ti: ti-k3*: Introduce aliases for mmc nodes arm64: dts: ti: k3-am65-main: Cleanup "ranges" property in "pcie" DT node arm64: dts: ti: j7200-main: Add *max-virtual-functions* for pcie-ep DT node arm64: dts: ti: j7200-main: Fix "bus-range" upto 256 bus number for PCIe ... Link: https://lore.kernel.org/r/20211012120817.beqhp4tygnf3xyi5@wireless Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12arm64: dts: exynos: add minimal support for exynosautov9 sadk boardChanho Park2-1/+58
SADK(Samsung Automotive Development Kit) is the development kit to evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two 256GB Samsung UFS. This patch enables only serial console and ufs0 device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211012002314.38965-4-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-12arm64: dts: exynos: add initial support for exynosautov9 SoCChanho Park2-0/+1490
Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211012002314.38965-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-12s390: fix strrchr() implementationRoberto Sassu1-7/+6
Fix two problems found in the strrchr() implementation for s390 architectures: evaluate empty strings (return the string address instead of NULL, if '\0' is passed as second argument); evaluate the first character of non-empty strings (the current implementation stops at the second). Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Cc: stable@vger.kernel.org Reported-by: Heiko Carstens <hca@linux.ibm.com> (incorrect behavior with empty strings) Signed-off-by: Roberto Sassu <roberto.sassu@huawei.com> Link: https://lore.kernel.org/r/20211005120836.60630-1-roberto.sassu@huawei.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-12arm64: ftrace: use function_nocfi for _mcount as wellSumit Garg1-1/+1
Commit 800618f955a9 ("arm64: ftrace: use function_nocfi for ftrace_call") only fixed address of ftrace_call but address of _mcount needs to be fixed as well. Use function_nocfi() to get the actual address of _mcount function as with CONFIG_CFI_CLANG, the compiler replaces function pointers with jump table addresses which breaks dynamic ftrace as the address of _mcount is replaced with the address of _mcount.cfi_jt. With mainline, this won't be a problem since by default CONFIG_DYNAMIC_FTRACE_WITH_REGS=y with Clang >= 10 as it supports -fpatchable-function-entry and CFI requires Clang 12 but for consistency we should add function_nocfi() for _mcount as well. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Sami Tolvanen <samitolvanen@google.com> Link: https://lore.kernel.org/r/20211011125059.3378646-1-sumit.garg@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-12arm64: asm: setup.h: export common variablesAnders Roxell1-0/+6
When building the kernel with sparse enabled 'C=1' the following warnings can be seen: arch/arm64/kernel/setup.c:58:13: warning: symbol '__fdt_pointer' was not declared. Should it be static? arch/arm64/kernel/setup.c:84:25: warning: symbol 'boot_args' was not declared. Should it be static? Rework so the variables are exported, since these two variable are created and used in setup.c, also used in head.S. Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Link: https://lore.kernel.org/r/20211007195601.677474-1-anders.roxell@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2021-10-12powerpc/perf: Expose instruction and data address registers as part of extended regsAthira Rajeev2-4/+11
Patch adds support to include Sampled Instruction Address Register (SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended registers. Update the definition of PERF_REG_PMU_MASK_300/31 and PERF_REG_EXTENDED_MAX to include these SPR's. Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Reviewed-by: Daniel Axtens <dja@axtens.net> Reviewed-by: Kajol Jain<kjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211007065505.27809-4-atrajeev@linux.vnet.ibm.com
2021-10-12powerpc/perf: Refactor the code definition of perf reg extended maskAthira Rajeev1-8/+13
PERF_REG_PMU_MASK_300 and PERF_REG_PMU_MASK_31 defines the mask value for extended registers. Current definition of these mask values uses hex constant and does not use registers by name, making it less readable. Patch refactor the macro values by or'ing together the actual register value constants. Also include PERF_REG_EXTENDED_MAX as part of enum definition. Suggested-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Reviewed-by: Kajol Jain<kjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211007065505.27809-2-atrajeev@linux.vnet.ibm.com
2021-10-12Merge tag 'at91-soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/socArnd Bergmann1-0/+9
AT91 SoC #1 for 5.16: - Documentation for sama7g5 and lan966 families - Kconfig entry for lan966 new SoC. * tag 'at91-soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: add basic support for new SoC family lan966 dt-bindings: arm: at91: Document lan966 pcb8291 and pcb8290 boards ARM: at91: Documentation: add lan966 family ARM: at91: Documentation: add sama7g5 family Link: https://lore.kernel.org/r/20211011124650.17218-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12Merge tag 'omap-for-v5.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/socArnd Bergmann18-4292/+6
SoC changes for omaps for v5.16 Few non-urgent comment typo fixes and few changes to drop unused auxdata. Then a series of changes to drop some a pile of old unused defines. These can be now dropped for the SoCs that have been updated to use devicetree data with drivers/clock and drivers/soc device drivers. * tag 'omap-for-v5.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Drop unused CM defines for am3 ARM: OMAP2+: Drop unused CM and SCRM defines for omap4 ARM: OMAP2+: Drop unused CM and SCRM defines for omap5 ARM: OMAP2+: Drop unused CM defines for dra7 ARM: OMAP2+: Drop unused PRM defines for am3 ARM: OMAP2+: Drop unused PRM defines for am4 ARM: OMAP2+: Drop unused PRM defines for omap4 ARM: OMAP2+: Drop unused PRM defines for omap5 ARM: OMAP2+: Drop unused PRM defines for dra7 ARM: OMAP2+: Fix comment typo ARM: OMAP2+: Fix typo in some comments ARM: OMAP2+: Drop unused old auxdata for dra7x_evm_mmc_quirk() ARM: OMAP2+: Drop old unused omap5_uevm_legacy_init() Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12Merge tag 'tegra-for-5.16-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfigsArnd Bergmann1-0/+5
arm64: tegra: Default configuration changes for v5.16-rc1 This enables drivers for the various audio processors found on Tegra210 and later. * tag 'tegra-for-5.16-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable few Tegra210 based AHUB drivers Link: https://lore.kernel.org/r/20211008201132.1678814-8-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-12ARM: dts: aspeed: Add TYAN S7106 BMC machineOskar Senft2-1/+490
The TYAN S7106 is a server platform with an ASPEED AST2500 BMC. Signed-off-by: Oskar Senft <osk@google.com> Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210909004920.1634322-1-osk@google.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-12ARM: dts: aspeed: rainier: Add power-config-full-load gpioAdriana Kobylak1-0/+13
Add the power-config-full-load described in: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#power-config-full-load The power-config-full-load gpio is designed to be used to specify how many power supplies the system should have, in rainier it is 2 or 4. If enough power supplies fail so that the system no longer has redundancy (no longer n+1), the hardware will signal to the Onboard Chip Controller that the system may be oversubscribed, and performance may need to be reduced so the system can maintain it's powered on state. Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211005192226.213539-1-anoo@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-11Merge tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dtArnd Bergmann8-20/+69
ARM: tegra: Device tree changes for v5.16-rc1 This contains various cleanup patches to 32-bit ARM Tegra device trees and enables USB OTG mode on the Nexus 7. * tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Remove useless usb-ehci compatible string ARM: tegra: Remove unused backlight-boot-off property ARM: tegra: nexus7: Enable USB OTG mode ARM: tegra: Add new properties to USB PHY device-tree nodes ARM: tegra: Update Broadcom Bluetooth device-tree nodes ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometer Link: https://lore.kernel.org/r/20211008201132.1678814-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Revert "arm64: dts: Add support for Unisoc's UMS512"Arnd Bergmann4-1253/+1
The patch uses the "dt-bindings/clock/sprd,ums512-clk.h header, which is not merged yet. This caused a build regression, and it means the patch was not ready to get merged anyway. This reverts commit 23410de5796cd49abb3f9b6d377822e18298e0a0. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dtArnd Bergmann12-7/+512
AT91 DT #1 for 5.16: - Addition of a new variant in the sama5d2 family: the sama5d29 with significant updates being CAN and Ethernet controllers; - Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were maintained up to this moment, separately, in OpenWrt tree; - Two more boards gained I2C bus recovery support; - Tse850 updated with one Ethernet fix; - Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support. * tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: dts: sama5d29: Add dtsi file for sama5d29 ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support ARM: dts: at91: tse850: the emac<->phy interface is rmii ARM: dts: at91: add Exegin Q5xR5 board dt-bindings: ARM: at91: document exegin q5xr5 board dt-bindings: add vendor prefix for exegin ARM: dts: at91: add CalAmp LMU5000 board dt-bindings: ARM: at91: document CalAmp LMU5000 board dt-bindings: add vendor prefix for calamp ARM: dts: at91: at91sam9260: add pinctrl label ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support ARM: dts: at91: sama7g5ek: enable ADC on the board ARM: dts: at91: sama7g5: add node for the ADC ARM: dts: at91: sama5d27_wlsom1: add wifi device Link: https://lore.kernel.org/r/20211011123438.16562-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'omap-for-v5.16/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dtArnd Bergmann5-11/+36
Devicetree changes for omaps for v5.16 These changes configure devices for am335x and dra7, and fixes various devicetree check warnings for gta04: - Update am335x-pocketbeagle to use pinconf-single - A series of devicetree warning fixes for omap3 and gta04 - Configure bb2d Vivante GC 2D Accelerator for dra7 * tag 'omap-for-v5.16/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7: add entry for bb2d module arm: dts: omap3-gta04: cleanup led node names arm: dts: omap3-gta04a4: accelerometer irq fix arm: dts: omap3-gta04a5: fix missing sensor supply arm: dts: omap3-gta04: fix missing sensor supply arm: dts: omap3-gta04: cleanup LCD definition ARM: dts: omap3: fix cpu thermal label name ARM: dts: am335x-pocketbeagle: switch to pinconf-single Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com-3 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'v5.15-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dtArnd Bergmann5-25/+85
mt7623: add USB nodes mt7629: update PCIe node to new format * tag 'v5.15-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: arm: Add MT6589 Fairphone 1 ARM: dts: mediatek: Update MT7629 PCIe node for new format arm: dts: mt7623: add otg nodes for bpi-r2 arm: dts: mt7623: add musb device nodes Link: https://lore.kernel.org/r/7135d46f-5fb9-b46d-96d4-3b38548fe23e@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dtArnd Bergmann11-15/+6416
arm64: tegra: Device tree changes for v5.16-rc1 This enables additional interrupts on the Tegra194 GPIO controller for better load balancing and/or virtualization, adds audio support on Jetson TX2 NX, enables the NVDEC video decoder on Tegra186 and later and enables more audio processors that are found on Tegra210 and later. Various cleanups across the board top things off. * tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix pcie-ep DT nodes arm64: tegra: Remove useless usb-ehci compatible string arm64: tegra: Extend APE audio support on Jetson platforms arm64: tegra: Add few AHUB devices for Tegra210 and later arm64: tegra: Remove unused backlight-boot-off property arm64: tegra: Add NVDEC to Tegra186/194 device trees arm64: tegra: Add new USB PHY properties on Tegra132 arm64: tegra: Update HDA card name on Jetson TX2 NX arm64: tegra: Audio graph sound card for Jetson TX2 NX arm64: tegra: Add additional GPIO interrupt entries on Tegra194 Link: https://lore.kernel.org/r/20211008201132.1678814-7-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11arm64: dts: Add support for Unisoc's UMS512Chunyan Zhang4-1/+1253
Add basic DT to support Unisoc's UMS512, with this patch, the board ums512-1h10 can run into console. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20211008034533.343167-3-zhang.lyra@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11s390/cmm: use string_upper() instead of open coded variantAndy Shevchenko1-7/+4
Use string_upper() from string helper module instead of open coded variant. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211001130201.72545-1-andriy.shevchenko@linux.intel.com [hca@linux.ibm.com: removed hunk which converts extmem.c] Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ptrace: add function argument access APIHeiko Carstens2-0/+20
Add regs_get_kernel_argument() which returns Nth argument of a function call. This enables ftrace kprobe events to access kernel function arguments via $argN syntax. This is the s390 variant of commit a823c35ff2ed ("arm64: ptrace: Add function argument access API"). Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Steffen Maier <maier@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ptrace: fix coding styleHeiko Carstens1-2/+1
Reported-by: Steffen Maier <maier@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ftrace: provide separate ftrace_caller/ftrace_regs_caller implementationsHeiko Carstens2-13/+29
ftrace_regs_caller is an alias to ftrace_caller - making ftrace_caller quite heavyweight. Split the function and provide an ftrace_caller implementation which comes with fewer instructions. Especially getting rid of 'stosm' on each function entry should help here, e.g. to have less performance impact on live patched functions. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ftrace: add ftrace_instruction_pointer_set() helper functionHeiko Carstens2-3/+9
Add ftrace_instruction_pointer_set() helper function to match x86. See commit 2860cd8a2353 ("livepatch: Use the default ftrace_ops instead of REGS when ARGS is available"). Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ftrace: add HAVE_DYNAMIC_FTRACE_WITH_ARGS supportHeiko Carstens2-0/+10
Add HAVE_DYNAMIC_FTRACE_WITH_ARGS support similar to commit 02a474ca266a ("ftrace/x86: Allow for arguments to be passed in to ftrace_regs by default"). s390's ftrace implementation always provides all registers with pt_regs, therefore this is trivial. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/jump_label: add __init_or_module annotationHeiko Carstens1-2/+3
Add missing __init_or_module to arch_jump_label_transform_static(). Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/jump_label: rename __jump_label_transform()Heiko Carstens1-6/+6
Trivial patch just to get rid of the leading underscores. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/jump_label: make use of HAVE_JUMP_LABEL_BATCHHeiko Carstens2-0/+15
Specify HAVE_JUMP_LABEL_BATCH in header file. This allows to make use of the arch_jump_label_transform_queue()/arch_jump_label_transform_apply() mechanism. However unlike on x86, which currently is the only user of this mechanism, the to be patched instructions are still directly modified. The only difference to before is that serialization is only done after all instructions have been modified. This way the number of serialization/synchronization events is reduced. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ftrace: add missing serialization for graph caller patchingHeiko Carstens1-0/+2
CPUs must be serialized also when ftrace_graph_caller gets patched. This is missing since ftrace function graph support was added on s390. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/ftrace: use text_poke_sync_lock()Heiko Carstens1-6/+6
Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/jump_label: use text_poke_sync()Heiko Carstens1-6/+2
Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390: introduce text_poke_sync()Heiko Carstens2-0/+36
Introduce a text_poke_sync() similar to what x86 has. This can be used to execute a serializing instruction on all CPUs (including the current one). Note: according to the Principles of Operation an IPI (= interrupt) will already serialize a CPU, however it is better to be explicit. In addition on_each_cpu() makes sure that also the current CPU get serialized - just to make sure that possible preemption can prevent some theoretical case where a CPU will not be serialized. Therefore text_poke_sync() has to be used whenever code got modified, just to avoid to rely on implicit serialization. Also introduce text_poke_sync_lock() which will also disable CPU hotplug, to prevent that any CPU is just going online with a prefetched old version of a modified instruction. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/barrier: factor out bcr_serialize()Heiko Carstens1-10/+14
Factor out bcr_serialize() inline assembly function which describes what the bcr instruction is used for. Use bcr_serialize() like before in mb(), but also in upcoming changes. Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/test_unwind: convert to KUnitMete Durlu2-73/+98
Modified stack unwinder self tests to use kunit framework. The functionality stayed the same but the output format is now in tap13 format. Reviewed-by: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Mete Durlu <meted@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11s390/debug: fix kernel-doc warningsRandy Dunlap1-1/+1
Fix kernel-doc warning due to incorrect parameter name in kernel-doc function notation: ../arch/s390/include/asm/debug.h:484: warning: Function parameter or member 'pages' not described in 'DEFINE_STATIC_DEBUG_INFO' ../arch/s390/include/asm/debug.h:484: warning: Excess function parameter 'pages_per_area' description in 'DEFINE_STATIC_DEBUG_INFO' Fixes: d72541f94512 ("s390/debug: add early tracing support") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: linux-s390@vger.kernel.org Cc: Peter Oberparleiter <oberpar@linux.ibm.com> Link: https://lore.kernel.org/r/20211005051657.16714-1-rdunlap@infradead.org Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-10-11arm64/hugetlb: fix CMA gigantic page order for non-4K PAGE_SIZEMike Kravetz1-1/+1
For non-4K PAGE_SIZE configs, the largest gigantic huge page size is CONT_PMD_SHIFT order. On arm64 with 64K PAGE_SIZE, the gigantic page is 16G. Therefore, one should be able to specify 'hugetlb_cma=16G' on the kernel command line so that one gigantic page can be allocated from CMA. However, when adding such an option the following message is produced: hugetlb_cma: cma area should be at least 8796093022208 MiB This is because the calculation for non-4K gigantic page order is incorrect in the arm64 specific routine arm64_hugetlb_cma_reserve(). Fixes: abb7962adc80 ("arm64/hugetlb: Reserve CMA areas for gigantic pages on 16K and 64K configs") Cc: <stable@vger.kernel.org> # 5.9.x Signed-off-by: Mike Kravetz <mike.kravetz@oracle.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20211005202529.213812-1-mike.kravetz@oracle.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-10-11x86/Kconfig: Do not enable AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT automaticallyBorislav Petkov1-1/+0
This Kconfig option was added initially so that memory encryption is enabled by default on machines which support it. However, devices which have DMA masks that are less than the bit position of the encryption bit, aka C-bit, require the use of an IOMMU or the use of SWIOTLB. If the IOMMU is disabled or in passthrough mode, the kernel would switch to SWIOTLB bounce-buffering for those transfers. In order to avoid that, 2cc13bb4f59f ("iommu: Disable passthrough mode when SME is active") disables the default IOMMU passthrough mode so that devices for which the default 256K DMA is insufficient, can use the IOMMU instead. However 2, there are cases where the IOMMU is disabled in the BIOS, etc. (think the usual hardware folk "oops, I dropped the ball there" cases) or a driver doesn't properly use the DMA APIs or a device has a firmware or hardware bug, e.g.: ea68573d408f ("drm/amdgpu: Fail to load on RAVEN if SME is active") However 3, in the above GPU use case, there are APIs like Vulkan and some OpenGL/OpenCL extensions which are under the assumption that user-allocated memory can be passed in to the kernel driver and both the GPU and CPU can do coherent and concurrent access to the same memory. That cannot work with SWIOTLB bounce buffers, of course. So, in order for those devices to function, drop the "default y" for the SME by default active option so that users who want to have SME enabled, will need to either enable it in their config or use "mem_encrypt=on" on the kernel command line. [ tlendacky: Generalize commit message. ] Fixes: 7744ccdbc16f ("x86/mm: Add Secure Memory Encryption (SME) support") Reported-by: Paul Menzel <pmenzel@molgen.mpg.de> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Cc: <stable@vger.kernel.org> Link: https://lkml.kernel.org/r/8bbacd0e-4580-3194-19d2-a0ecad7df09c@molgen.mpg.de
2021-10-11Merge tag 'amlogic-arm64-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dtArnd Bergmann15-13/+1091
Amlogic ARM64 DT changes for v5.16: - New Boards (with bindings): - Radxa Zero - Jethub D1 & H1 home automation controllers - Misc Changes: - add Ethernet PHY reset line for ODROID-C4/HC4 - add audio playback nodes to rbox-pro - Fix the pwm regulator supply properties - meson-g12b-odroid-n2: add missing 5v regulator gpio * tag 'amlogic-arm64-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: meson-g12b-odroid-n2: add 5v regulator gpio arm64: dts: meson-sm1: Fix the pwm regulator supply properties arm64: dts: meson-g12b: Fix the pwm regulator supply properties arm64: dts: meson-g12a: Fix the pwm regulator supply properties arm64: dts: meson: add audio playback to rbox-pro arm64: dts: meson-axg: add support for JetHub D1 arm64: dts: meson-gxl: add support for JetHub H1 dt-bindings: vendor-prefixes: add jethome prefix dt-bindings: arm: amlogic: add bindings for Jethub D1/H1 arm64: dts: amlogic: add support for Radxa Zero dt-bindings: arm: amlogic: add support for Radxa Zero arm64: dts: meson: sm1: add Ethernet PHY reset line for ODROID-C4/HC4 Link: https://lore.kernel.org/r/cc0a3af0-b1b1-dbe1-f553-cf58a1c63d0b@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'zynqmp-dt-for-v5.16-v2' of https://github.com/Xilinx/linux-xlnx into arm/dtArnd Bergmann5-0/+936
arm64: dts: ZynqMP DT changes for v5.16-v2 - Add support for Kria SOM board * tag 'zynqmp-dt-for-v5.16-v2' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Add support for Xilinx Kria SOM board Link: https://lore.kernel.org/r/9815867c-ffbb-fc9d-64b9-badee5e2862b@xilinx.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11sparc: Add missing "FORCE" target when using if_changedKees Cook1-4/+4
Fix observed warning: /builds/linux/arch/sparc/boot/Makefile:35: FORCE prerequisite is missing Fixes: e1f86d7b4b2a ("kbuild: warn if FORCE is missing for if_changed(_dep,_rule) and filechk") Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Nicolas Schier <n.schier@avm.de> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2021-10-11KVM: arm64: Handle protected guests at 32 bitsFuad Tabba1-0/+34
Protected KVM does not support protected AArch32 guests. However, it is possible for the guest to force run AArch32, potentially causing problems. Add an extra check so that if the hypervisor catches the guest doing that, it can prevent the guest from running again by resetting vcpu->arch.target and returning ARM_EXCEPTION_IL. If this were to happen, The VMM can try and fix it by re- initializing the vcpu with KVM_ARM_VCPU_INIT, however, this is likely not possible for protected VMs. Adapted from commit 22f553842b14 ("KVM: arm64: Handle Asymmetric AArch32 systems") Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-12-tabba@google.com
2021-10-11KVM: arm64: Trap access to pVM restricted featuresFuad Tabba1-0/+57
Trap accesses to restricted features for VMs running in protected mode. Access to feature registers are emulated, and only supported features are exposed to protected VMs. Accesses to restricted registers as well as restricted instructions are trapped, and an undefined exception is injected into the protected guests, i.e., with EC = 0x0 (unknown reason). This EC is the one used, according to the Arm Architecture Reference Manual, for unallocated or undefined system registers or instructions. Only affects the functionality of protected VMs. Otherwise, should not affect non-protected VMs when KVM is running in protected mode. Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-11-tabba@google.com
2021-10-11KVM: arm64: Move sanitized copies of CPU featuresFuad Tabba2-6/+2
Move the sanitized copies of the CPU feature registers to the recently created sys_regs.c. This consolidates all copies in a more relevant file. No functional change intended. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-10-tabba@google.com
2021-10-11KVM: arm64: Initialize trap registers for protected VMsFuad Tabba7-1/+209
Protected VMs have more restricted features that need to be trapped. Moreover, the host should not be trusted to set the appropriate trapping registers and their values. Initialize the trapping registers, i.e., hcr_el2, mdcr_el2, and cptr_el2 at EL2 for protected guests, based on the values of the guest's feature id registers. No functional change intended as trap handlers introduced in the previous patch are still not hooked in to the guest exit handlers. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-9-tabba@google.com
2021-10-11KVM: arm64: Add handlers for protected VM System RegistersFuad Tabba8-1/+737
Add system register handlers for protected VMs. These cover Sys64 registers (including feature id registers), and debug. No functional change intended as these are not hooked in yet to the guest exit handlers introduced earlier. So when trapping is triggered, the exit handlers let the host handle it, as before. Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-8-tabba@google.com
2021-10-11KVM: arm64: Simplify masking out MTE in feature id regFuad Tabba1-8/+2
Simplify code for hiding MTE support in feature id register when MTE is not enabled/supported by KVM. No functional change intended. Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-7-tabba@google.com
2021-10-11KVM: arm64: Add missing field descriptor for MDCR_EL2Fuad Tabba1-0/+1
It's not currently used. Added for completeness. No functional change intended. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-6-tabba@google.com
2021-10-11KVM: arm64: Pass struct kvm to per-EC handlersFuad Tabba3-4/+4
We need struct kvm to check for protected VMs to be able to pick the right handlers for them in subsequent patches. Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211010145636.1950948-5-tabba@google.com
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