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2022-08-29arm64: dts: qcom: align SPMI PMIC regulators node name with dtschemaKrzysztof Kozlowski2-2/+2
Bindings expect regulators node name to be "regulators": qcom/sdm630-sony-xperia-nile-voyager.dtb: pmic@3: 'pm660l-regulators' does not match any of the regexes Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220828084341.112146-8-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: align SPMI PMIC ADC node name with dtschemaKrzysztof Kozlowski1-1/+1
Bindings expect VADC node name to be "adc": pmic@0: 'vadc@3100' does not match any of the regexes Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220828084341.112146-7-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: pmk8350: drop interrupt-names from ADCKrzysztof Kozlowski1-2/+0
The SPMI PMIC VADC and Thermal Monitoring ADC have only one interrupt line and their bindings do not allow interrupt-names. None of other variants use them, so drop it from DTSI. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220828084341.112146-6-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: pmk8350: drop incorrect io-channel-rangesKrzysztof Kozlowski1-1/+0
Since commit 044b32fa5229 ("dt-bindings:iio:qcom-spmi-vadc drop incorrect io-channel-ranges from example") the io-channel-ranges are not allowed in the Qualcomm SPMI PMIC ADC and anyway they are not correct for IIO provider. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220828084341.112146-5-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7280: Update gpu opp tableAkhil P Oommen1-2/+10
On the lite sku where GPU Fmax is 550Mhz, voting for a slightly higher bandwidth at the highest gpu opp helps to improve "Manhattan offscreen" score by 10%. Update the gpu opp table such that this is applicable only on SKUs which has 550Mhz as GPU Fmax. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220829011035.1.Ie3564662150e038571b7e2779cac7229191cf3bf@changeid
2022-08-29arm64: dts: qcom: sc7280-qcard: Add alias 'wifi0'Matthias Kaehlcke1-0/+1
Add the alias 'wifi0' for the WiFi interface on the Qcard. The alias is needed by the BIOS which patches the WiFi MAC address read from the VPD (Vital Product Data) into the device tree. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220829094435.1.I4534cf408373478dd6e84dc8b9ddd0d4e1a3f143@changeid
2022-08-29arm64: dts: qcom: sc7280: move USB wakeup-source propertyJohan Hovold1-1/+2
Move the USB-controller wakeup-source property to the dwc3 glue node to match the updated binding. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220802152642.2516-1-johan+linaro@kernel.org
2022-08-29arm64: dts: qcom: thinkpad-x13s: Fix firmware locationSteev Klimaszewski1-2/+2
The firmware for the Lenovo Thinkpad X13s has been submitted, accepted and merged upstream, so update to the correct path. Signed-off-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220817231236.3971-1-steev@kali.org
2022-08-29arm64: dts: qcom: sm8150: Fix fastrpc iommu valuesBhupesh Sharma1-16/+8
Fix the 'memory access' related crash seen while running Hexagon SDK example applications on the cdsp dsp available on sm8150 SoC based boards: qcom_q6v5_pas 8300000.remoteproc: fatal error received: EX:kernel:0x0:frpck_0_0:0xf5:PC=0xc020ceb0 This crash is caused by incorrect IOMMU SID values being used in the fastrpc node. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819053945.4114430-1-bhupesh.sharma@linaro.org
2022-08-29arm64: dts: qcom: sm8250: move DSI opp table to the dsi0 nodeDmitry Baryshkov1-19/+19
It makes no sense to have the OPP table for the DSI controllers in the DSI1 PHY node. Move it to more logical dsi0 device node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220822191138.316912-1-dmitry.baryshkov@linaro.org
2022-08-29arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clockEric Biggers1-4/+9
Add the registers and clock for the Inline Crypto Engine (ICE) to the device tree node for the UFS host controller on sm8450. This makes ufs_qcom support inline encryption when CONFIG_SCSI_UFS_CRYPTO=y. The address and size of the register range, and the minimum and maximum frequency of the ICE core clock, all match the values used downstream. I've validated this on an SM8450 HDK using the 'encrypt' group of xfstests on ext4 with MOUNT_OPTIONS="-o inlinecrypt". Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220826071244.185584-1-ebiggers@kernel.org
2022-08-29arm64: dts: qcom: sc7280-herobrine: Don't enable the USB 2.0 portMatthias Kaehlcke1-12/+0
The USB 2.0 port of sc7280 is currently not used by any herobrine board. Delete the device tree entries that enable it. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220826084813.1.I8c9a771fcf4d1cfb6e8e0ef17a153143af9a644d@changeid
2022-08-29arm64: dts: qcom: sc7180-trogdor: Keep pm6150_adc enabled for TZStephen Boyd2-4/+0
There's still a thermal zone using pm6150_adc in the pm6150.dtsi file, pm6150_thermal. It's not super obvious because it indirectly uses the adc through an iio channel in pm6150_temp. Let's keep this enabled on lazor and coachz so that reading the temperature of the pm6150_thermal zone continues to work. Otherwise we get -EINVAL when reading the zone, and I suspect the PMIC temperature trip doesn't work properly so we don't shutdown when the PMIC overheats. Cc: Matthias Kaehlcke <mka@chromium.org> Fixes: b8d1e3d33487 ("arm64: dts: qcom: sc7180-trogdor: Delete ADC config for unused thermistors") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220827004901.511543-1-swboyd@chromium.org
2022-08-29arm64: dts: qcom: pm8350c: Drop PWM reg declarationBryan O'Donoghue1-2/+1
The PWM is a part of the SPMI PMIC block and maps several different addresses within the SPMI block. It is not accurate to describe as pwm@reg as a result. Fixes: 5be66d2dc887 ("arm64: dts: qcom: pm8350c: Add pwm support") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220828132648.3624126-3-bryan.odonoghue@linaro.org
2022-08-29arm64: dts: qcom: sc7280: Add support for zoglinBob Moragues1-1/+1
Zoglin is a Hoglin Chromebook with SPI Flash reduced from 64MB to 8MB. Zoglin is identical to Hoglin except for the SPI Flash. The actual SPI Flash is dynamically probed at and not specified in DTS. Signed-off-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220728143215.v3.2.I7d57fb9c4806a8b3fe3501c766b64f4987c271ef@changeid
2022-08-29arm64: dts: qcom: msm8996-xiaomi-*: Add LEDsYassine Oudjana2-0/+84
Add LEDs found on the Xiaomi MSM8996 devices. The devices share a status RGB LED mounted on the front, as well as a PWM-driven IR LED for remote control (sometimes known as an IR blaster). The Mi Note 2 has an additional pair of white LEDs used as backlights for the touchkeys driven by the PM8994 LPG block. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220728180120.97968-1-y.oudjana@protonmail.com
2022-08-29arm64: dts: qcom: use GPIO flags for tlmmKrzysztof Kozlowski10-12/+14
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include gpio.h header if this is first usage of that flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220802153947.44457-4-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845-db845c: drop gpios from CCI I2C sensorsKrzysztof Kozlowski1-4/+0
The OV7251 and OV8856 camera sensor bindings do not allow property "gpios" and Linux driver does not parse it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220802153947.44457-3-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845-db845c: drop power-domains from CCI I2C sensorsKrzysztof Kozlowski1-4/+0
The Camera Control Interface I2C controller device node belongs to TITAN_TOP_GDSC power domain, so its children do not need to specify it again. The OV7251 and OV8856 camera sensor bindings do not allow power-domains. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220802153947.44457-2-krzysztof.kozlowski@linaro.org
2022-08-29ARM: dts: qcom: use GPIO flags for tlmmKrzysztof Kozlowski5-7/+10
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs. Include gpio.h header if this is first usage of that flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220802153947.44457-5-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sa8295p-adp: disallow regulator mode switchesJohan Hovold1-11/+0
Do not allow the RPMh regulators to switch to low-power mode with an exception for the UFS regulators (l3c, l6c, l10c and l17c) as UFS supports an idle mode. This specifically avoids having regulators be but in low-power mode when only some consumers specify loads while the actual total load really warrants high-power mode. Fixes: 519183af39b2 ("arm64: dts: qcom: add SA8540P and ADP") Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220803121942.30236-4-johan+linaro@kernel.org
2022-08-29arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: disallow regulator mode switchesJohan Hovold1-10/+0
Do not allow the RPMh regulators to switch to low-power mode. This specifically avoids having regulators be but in low-power mode when only some consumers specify loads while the actual total load really warrants high-power mode. Fixes: 32c231385ed4 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree") Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220803121942.30236-3-johan+linaro@kernel.org
2022-08-29arm64: dts: qcom: sc8280xp-crd: disallow regulator mode switchesJohan Hovold1-9/+0
Do not allow the RPMh regulators to switch to low-power mode with an exception for the UFS regulators (l7c and l3d) as UFS supports an idle mode. This specifically avoids having regulators be but in low-power mode when only some consumers specify loads while the actual total load really warrants high-power mode. Fixes: ccd3517faf18 ("arm64: dts: qcom: sc8280xp: Add reference device") Link: https://lore.kernel.org/all/YtkrDcjTGhpaU1e0@hovoldconsulting.com Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220803121942.30236-2-johan+linaro@kernel.org
2022-08-29arm64: dts: qcom: sc7280: Update lpasscore nodeSatya Priya1-2/+2
To maintain consistency with other lpass nodes(lpass_audiocc, lpass_aon and lpass_hm), update lpasscore to lpass_core. Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers") Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1660107909-27947-4-git-send-email-quic_c_skakit@quicinc.com
2022-08-29arm64: dts: qcom: sc7280: Update lpassaudio clock controller for resetsTaniya Das1-0/+1
The lpass audio supports TX/RX/WSA block resets. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1660107909-27947-3-git-send-email-quic_c_skakit@quicinc.com
2022-08-29arm64: dts: qcom: sc7280: Cleanup the lpasscc nodeSatya Priya1-3/+2
Remove "cc" regmap from lpasscc node which is overlapping with the lpass_aon regmap. Fixes: 422a295221bb ("arm64: dts: qcom: sc7280: Add clock controller nodes") Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1660107909-27947-2-git-send-email-quic_c_skakit@quicinc.com
2022-08-29ARM: dts: qcom: msm8660-surf: move fixed regulator out of socKrzysztof Kozlowski1-9/+7
Fixed regulators, like stub for SDCC Power, are not part of SoC, so they should be outside of the soc node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220810080516.166866-4-krzysztof.kozlowski@linaro.org
2022-08-29ARM: dts: qcom: msm8660: override nodes by labelKrzysztof Kozlowski1-21/+20
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. The pre/post DTBS are the same. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220810080516.166866-3-krzysztof.kozlowski@linaro.org
2022-08-29ARM: dts: qcom: msm8226: override nodes by labelKrzysztof Kozlowski1-4/+2
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. The pre/post DTBS are the same. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220810080516.166866-2-krzysztof.kozlowski@linaro.org
2022-08-29ARM: dts: qcom: msm8960: override nodes by labelKrzysztof Kozlowski2-284/+283
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. The pre/post DTBS are the same. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220810080516.166866-1-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sm6350: Add GPI DMA nodesLuca Weiss1-0/+59
Add nodes for the gpi_dma0 and gpi_dma1 which are (optionally) used for various i2c busses based on the qup firmware configuration. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812082721.1125759-4-luca.weiss@fairphone.com
2022-08-29arm64: dts: qcom: sdm845: Add the RPMh stats nodeAbel Vesa1-0/+5
SDM845 is a special case compared to the other platforms that use RPMh stats, since it only has 2 stats (aosd and cxsd), while the others have a 3rd one (ddr). So lets add the node but with a SDM845 dedicated compatible to make the driver aware of the different stats config. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812101240.1869605-3-abel.vesa@linaro.org
2022-08-29arm64: dts: qcom: sdm845: Reduce reg size for aoss_qmpAbel Vesa1-1/+1
Like on the other platforms that provide RPMh stats, on SDM845, the aoss_qmp reg size needs to be reduced to its actual size of 0x400, otherwise it will overlap with the RPMh stats reg base, node that will be added later on. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812101240.1869605-1-abel.vesa@linaro.org
2022-08-29arm64: dts: qcom: pm6150l: add missing adc channelsLuca Weiss1-0/+19
Add the missing adc channels and add pre-scaling property to die_temp channel, as per downstream dts. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220812114614.1195679-1-luca.weiss@fairphone.com
2022-08-29arm64: dts: qcom: sm8150: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sm8150-mtp.dtb: hwlock: 'reg' is a required property qcom/sm8150-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-17-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sm8150: split TCSR halt regs out of mutexKrzysztof Kozlowski1-1/+6
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-16-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm630: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'reg' is a required property qcom/sdm636-sony-xperia-ganges-mermaid.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-15-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm630: split TCSR halt regs out of mutexKrzysztof Kozlowski1-1/+6
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-14-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: qcs404: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-13-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sdm845-shift-axolotl.dtb: hwlock: 'reg' is a required property qcom/sdm845-shift-axolotl.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-12-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845: split TCSR halt regs out of mutexKrzysztof Kozlowski1-2/+7
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-11-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7280: split TCSR halt regs out of mutexKrzysztof Kozlowski1-7/+12
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. This also describes more accurately the devices and their IO address space, and allows to remove incorrect syscon compatible from TCSR mutex: qcom/sc7280-herobrine-crd.dtb: hwlock@1f40000: compatible: ['qcom,tcsr-mutex', 'syscon'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-10-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'reg' is a required property qcom/sc7180-trogdor-wormdingler-rev1-inx.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-9-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: split TCSR halt regs out of mutexKrzysztof Kozlowski1-4/+9
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-8-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sc7180: add missing TCSR syscon compatibleKrzysztof Kozlowski1-1/+1
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-7-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8998: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'reg' is a required property qcom/msm8998-asus-novago-tp370ql.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-6-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8998: split TCSR halt regs out of mutexKrzysztof Kozlowski1-2/+7
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-5-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8996: switch TCSR mutex to MMIOKrzysztof Kozlowski1-8/+3
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'reg' is a required property qcom/msm8996-xiaomi-natrium.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-4-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: msm8996: split TCSR halt regs out of mutexKrzysztof Kozlowski1-4/+9
The TCSR halt regs are next to TCSR mutex (in one address block called TCSR_MUTEX), so before converting the TCSR mutex into device with address space, we need to split the halt regs to its own syscon device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-3-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: sdm845-xiaomi-polaris: Fix sde_dsi_active pinctrlGeert Uytterhoeven1-1/+1
"make dtbs_check" says: bias-disable: boolean property with value b'\x00\x00\x00\x00' Fix this by dropping the offending value. Fixes: be497abe19bf08fb ("arm64: dts: qcom: Add support for Xiaomi Mi Mix2s") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/629afd26008c2b1ba5822799ea7ea5b5271895e8.1660903997.git.geert+renesas@glider.be