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2020-11-12xtensa: add support for TIF_NOTIFY_SIGNALJens Axboe3-4/+8
Wire up TIF_NOTIFY_SIGNAL handling for xtensa. Thanks to Max Filippov <jcmvbkbc@gmail.com> for making the asm correct. Cc: linux-xtensa@linux-xtensa.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-11-12arm: add support for TIF_NOTIFY_SIGNALJens Axboe4-6/+11
Wire up TIF_NOTIFY_SIGNAL handling for arm. Cc: linux-arm-kernel@lists.infradead.org Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-11-12ARM: 9024/1: Drop useless cast of "u64" to "long long"Geert Uytterhoeven1-1/+1
As "u64" is equivalent to "unsigned long long", there is no need to cast a "u64" parameter for printing it using the "0x%08llx" format specifier. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-12ARM: 9023/1: Spelling s/mmeory/memory/Geert Uytterhoeven1-1/+1
Fix a misspelling of the word "memory". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-12ARM: 9022/1: Change arch/arm/lib/mem*.S to use WEAK instead of .weakFangrui Song3-6/+3
Commit d6d51a96c7d6 ("ARM: 9014/2: Replace string mem* functions for KASan") add .weak directives to memcpy/memmove/memset to avoid collision with KASAN interceptors. This does not work with LLVM's integrated assembler (the assembly snippet `.weak memcpy ... .globl memcpy` produces a STB_GLOBAL memcpy while GNU as produces a STB_WEAK memcpy). LLVM 12 (since https://reviews.llvm.org/D90108) will error on such an overridden symbol binding. Use the appropriate WEAK macro instead. Link: https://github.com/ClangBuiltLinux/linux/issues/1190 -- Fixes: d6d51a96c7d6 ("ARM: 9014/2: Replace string mem* functions for KASan") Reported-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Fangrui Song <maskray@google.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Tested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-11-12s390/mm: remove unused clear_user_asce()Heiko Carstens1-7/+0
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-11-12s390/cpum_sf.c: fix file permission for cpum_sfb_sizeThomas Richter1-1/+1
This file is installed by the s390 CPU Measurement sampling facility device driver to export supported minimum and maximum sample buffer sizes. This file is read by lscpumf tool to display the details of the device driver capabilities. The lscpumf tool might be invoked by a non-root user. In this case it does not print anything because the file contents can not be read. Fix this by allowing read access for all users. Reading the file contents is ok, changing the file contents is left to the root user only. For further reference and details see: [1] https://github.com/ibm-s390-tools/s390-tools/issues/97 Fixes: 69f239ed335a ("s390/cpum_sf: Dynamically extend the sampling buffer if overflows occur") Cc: <stable@vger.kernel.org> # 3.14 Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-11-12s390: update defconfigsHeiko Carstens1-0/+1
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-11-12arm64: mm: don't assume struct page is always 64 bytesArd Biesheuvel2-5/+5
Commit 8c96400d6a39be7 simplified the page-to-virt and virt-to-page conversions, based on the assumption that struct page is always 64 bytes in size, in which case we can use a single signed shift to perform the conversion (provided that the vmemmap array is placed appropriately in the kernel VA space) Unfortunately, this assumption turns out not to hold, and so we need to revert part of this commit, and go back to an affine transformation. Given that all the quantities involved are compile time constants, this should not make any practical difference. Fixes: 8c96400d6a39 ("arm64: mm: make vmemmap region a projection of the linear region") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20201110180511.29083-1-ardb@kernel.org Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-11-12ARM: dts: aspeed: Add Facebook Galaxy100 (AST2400) BMCTao Ren2-0/+58
Add initial version of device tree for Facebook Galaxy100 (AST2400) BMC. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201111232330.30843-5-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-12ARM: dts: aspeed: wedge100: Use common dtsiTao Ren1-104/+14
Simplify the Wedge100 device tree by using the common dtsi. In addition this enables the second firmware flash, and turns on the "i2c-mux-idle-disconnect" flag for I2C switch 7-0070. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201111232330.30843-4-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-12ARM: dts: aspeed: wedge40: Use common dtsiTao Ren1-111/+1
Simplify the Wedge40 device tree by using the common dtsi. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201111232330.30843-3-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-12ARM: dts: aspeed: Common dtsi for Facebook AST2400 Network BMCsTao Ren1-0/+117
This common descirption is included by all Facebook AST2400 Network BMC platforms to minimize duplicated device entries across Facebook Network BMC device trees. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201111232330.30843-2-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-11ARM: dts: BCM5301X: Move CRU devices to the CRU nodeRafał Miłecki1-25/+26
Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or "Central Resource Unit"). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrlVivek Unune1-22/+4
Now that we have a pin controller, use that instead of manuplating the mdio/mdc pins directly. i.e. we no longer require the mdio-mii-mux Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709xVivek Unune2-1/+10
BCM47094 version of pinmux uses different compatible and supports MDIO pinmux pins. Hence, use the correct compatible string and defines the MDIO pins group. Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Linksys EA9500 add fixed partitionsVivek Unune1-0/+41
This router has dual paritions to store trx firmware image and dual partitions for nvram. The second one in each of these cases acts as a backup store. When tested with OpenWrt, the default partition parser causes two issues: 1. It labels both nvram partitions as nvram. In factory, second one is labeled devinfo. 2. It parses second trx image and tries to create second 'linux' partition and fails with - cannot create duplicate 'linux' partition The following patch works around both of these issues. Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5310X: Harmonize xHCI DT nodes nameSerge Semin1-1/+1
In accordance with the Generic xHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Harmonize EHCI/OHCI DT nodes nameSerge Semin2-4/+4
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-11ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7Vivek Unune1-0/+24
Add ports 5 and 7 which are connected to gmac cores 1 & 2. These will be disabled for now. Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-12ARM: dts: aspeed: amd-ethanolx: Add GPIO line namesKonstantin Aladyshev1-0/+44
Add GPIO line names for AMD EthanolX customer reference board. It populates AST2500 GPIO lines (A0-A7 to AC0-AC7) with AMD EthanolX designated names. Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com> Link: https://lore.kernel.org/r/20201111132133.1253-1-aladyshev22@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-11MIPS: Loongson64: SMP: Fix up play_dead jump indicatorTiezhu Yang1-1/+2
In play_dead function, the whole 64-bit PC mailbox was used as a indicator to determine if the master core had written boot jump information. However, after we introduced CSR mailsend, the hardware will not guarante an atomic write for the 64-bit PC mailbox. Thus we have to use the lower 32-bit which is written at the last as the jump indicator instead. Signed-off-by: Lu Zeng <zenglu@loongson.cn> Signed-off-by: Jun Yi <yijun@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPUTiezhu Yang2-23/+107
Loongson 3A4000+ CPU has per-core Mail_Send register to send mail, there is no need to maintain register address of each core and node, just simply specify cpu number. Signed-off-by: Lu Zeng <zenglu@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11MIPS: Loongson64: Set IPI_Enable register per core by itselfTiezhu Yang1-2/+2
In the current code, for example, core 1 sets Core[0, 1, 2, 3]_IPI_Enalbe register and core 2, 3 do the same thing on the 1-way Loongson64 platform, this is not necessary. Set IPI_Enable register per core by itself to avoid duplicate operations and make the logic more clear. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11MIPS: Loongson64: Set the field ELPA of CP0_PAGEGRAIN only onceTiezhu Yang1-15/+2
The field ELPA of CP0_PAGEGRAIN register is set at the beginning of the kernel entry point in kernel-entry-init.h, no need to set it again in numa.c, we can remove enable_lpa() and only print the related information. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3Tiezhu Yang2-11/+0
The field LPA of CP0_CONFIG3 register is read only for Loongson64, so the write operations are meaningless, remove them. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11arm64: dts: fsl-ls1028a-kontron-sl28: specify in-band mode for ENETCMichael Walle1-0/+1
Since commit 71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX") the network port of the Kontron sl28 board is broken. After the migration to phylink the device tree has to specify the in-band-mode property. Add it. Fixes: 71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX") Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20201109110436.5906-1-michael@walle.cc Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-11MIPS: remove GCC < 4.9 supportNick Desaulniers1-8/+1
Remove a tautology; since commit 0bddd227f3dc ("Documentation: update for gcc 4.9 requirement") which raised the minimally supported version of GCC to 4.9, this case is always true. Link: https://github.com/ClangBuiltLinux/linux/issues/427 Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-11mips: Remove #include <uapi/asm/types.h> from <asm/types.h>Geert Uytterhoeven1-1/+0
Everything in arch/mips/include/uapi/asm/types.h is protected by "#ifndef __KERNEL__", so it's unused for kernelspace. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-11-12openrisc: fix trap for debugger breakpoint signallingStafford Horne1-3/+1
I have been working on getting native Linux GDB support working for the OpenRISC port. The trap signal handler here was wrong in a few ways. During trap handling address (from the EEAR register) is not set by the CPU, so it is not correct to use here. We want to use trap as a break-point so use TRAP_BRKPT. Adding 4 to the pc was incorrect and causing GDB to think the breakpoint was not hit. Fixing these allows GDB to work now. Signed-off-by: Stafford Horne <shorne@gmail.com>
2020-11-12openrisc: add support for LiteXFilip Kokosinski2-0/+73
This adds support for a basic LiteX-based SoC with a mor1kx soft CPU. Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> [shorne: Merged in soc-cntl patch, removed CROSS_COMPILE, sort MAINT.] Signed-off-by: Stafford Horne <shorne@gmail.com>
2020-11-11parisc/uapi: Use Kbuild logic to provide <asm/types.h>Geert Uytterhoeven1-7/+0
Uapi <asm-generic/types.h> just includes <asm-generic/int-ll64.h> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Helge Deller <deller@gmx.de>
2020-11-11arm64: dts: qcom: sc7180: Assign numbers to eMMC and SDDouglas Anderson1-0/+2
After many years of struggle, commit fa2d0aa96941 ("mmc: core: Allow setting slot index via device tree alias") finally allows the use of aliases to number SD/MMC slots. Let's do that for sc7180 SoCs so that if eMMC and SD are both used they have consistent numbers across boots and kernel changes. Picking numbers can be tricky. Do we call these "1" and "2" to match the name in documentation or "0" and "1" with the assertion that we should always start at 0 and count up? While the "start counting at 0" makes sense if there are not already well-defined numbers for all sd/mmc controllers, in the case of sc7180 there _are_ well defined numbers. IMO it is less confusing to use those and match the docs. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20201111073652.1.Ia5bccd9eab7d74ea1ea9a7780e3cdbf662f5a464@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-11parisc: Make user stack size configurableHelge Deller2-7/+23
On parisc we need to initialize the memory layout for the user stack at process start time to a fixed size, which up until now was limited to the size as given by CONFIG_MAX_STACK_SIZE_MB at compile time. This hard limit was too small and showed problems when compiling ruby2.7, qmlcachegen and some Qt packages. This patch changes two things: a) It increases the default maximum stack size to 100MB. b) Users can modify the stack hard limit size with ulimit and then newly forked processes will use the given stack size which can even be bigger than the default 100MB. Reported-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
2020-11-11parisc: Use _TIF_USER_WORK_MASK in entry.SHelge Deller1-2/+2
The constant _TIF_USER_WORK_MASK will get extended by additional flags in the future, so check against the bits set in this mask - with the exception of _TIF_NEED_RESCHED which was tested a few lines above. Signed-off-by: Helge Deller <deller@gmx.de>
2020-11-11parisc: Drop loops_per_jiffy from per_cpu structHelge Deller2-4/+2
There is no need to keep a loops_per_jiffy value per cpu. Drop it. Signed-off-by: Helge Deller <deller@gmx.de>
2020-11-11x86/fpu: Make kernel FPU protection RT friendlyThomas Gleixner1-2/+16
Non RT kernels need to protect FPU against preemption and bottom half processing. This is achieved by disabling bottom halfs via local_bh_disable() which implictly disables preemption. On RT kernels this protection mechanism is not sufficient because local_bh_disable() does not disable preemption. It serializes bottom half related processing via a CPU local lock. As bottom halfs are running always in thread context on RT kernels disabling preemption is the proper choice as it implicitly prevents bottom half processing. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201027101349.588965083@linutronix.de
2020-11-11x86/fpu: Simplify fpregs_[un]lock()Thomas Gleixner1-2/+3
There is no point in disabling preemption and then disabling bottom halfs. Just disabling bottom halfs is sufficient as it implicitly disables preemption on !RT kernels. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201027101349.455380473@linutronix.de
2020-11-11x86/platform/uv: Drop last traces of uv_flush_tlb_othersJiri Slaby1-10/+0
Commit 39297dde7390 ("x86/platform/uv: Remove UV BAU TLB Shootdown Handler") removed uv_flush_tlb_others. Its declaration was removed also from asm/uv/uv.h. But only for the CONFIG_X86_UV=y case. The inline definition (!X86_UV case) is still in place. So remove this implementation with everything what was added to support uv_flush_tlb_others: * include of asm/tlbflush.h * forward declarations of struct cpumask, mm_struct, and flush_tlb_info Signed-off-by: Jiri Slaby <jslaby@suse.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Mike Travis <mike.travis@hpe.com> Acked-by: Steve Wahl <steve.wahl@hpe.com> Link: https://lore.kernel.org/r/20201109093653.2042-1-jslaby@suse.cz
2020-11-11ARM: dts: ux500: skomer: Pull down SDI2 FBCLKLinus Walleij1-0/+10
The feedback clock on SDI2 needs to be pulled down on this machine. Link: https://lore.kernel.org/r/20201111002513.2271351-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-11KVM: s390: remove diag318 reset codeCollin Walling1-2/+0
The diag318 data must be set to 0 by VM-wide reset events triggered by diag308. As such, KVM should not handle resetting this data via the VCPU ioctls. Fixes: 23a60f834406 ("s390/kvm: diagnose 0x318 sync and reset") Signed-off-by: Collin Walling <walling@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Link: https://lore.kernel.org/r/20201104181032.109800-1-walling@linux.ibm.com
2020-11-11KVM: s390: pv: Mark mm as protected after the set secure parameters and improve cleanupJanosch Frank3-2/+5
We can only have protected guest pages after a successful set secure parameters call as only then the UV allows imports and unpacks. By moving the test we can now also check for it in s390_reset_acc() and do an early return if it is 0. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Fixes: 29b40f105ec8 ("KVM: s390: protvirt: Add initial vm and cpu lifecycle handling") Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2020-11-11ARM: dts: am437x-l4: fix compatible for cpsw switch dt nodeGrygorii Strashko1-1/+1
Fix compatible the new CPSW switchdev DT node to avoid probing of legacy CPSW driver which fails: [ 2.781009] cpsw 4a100000.switch: invalid resource Fixes: 7bf8f37aea82 ("ARM: dts: am437x-l4: add dt node for new cpsw switchdev driver") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-10arm64: dts: ipq8074: Fix dma node nameVinod Koul1-2/+2
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-10-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: ipq6018: Fix dma node nameVinod Koul1-2/+2
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-9-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: msm8998: Fix dma node nameVinod Koul1-1/+1
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-8-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: msm8996: Fix dma node nameVinod Koul1-1/+1
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-7-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: msm8994: Fix dma node nameVinod Koul1-2/+2
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-6-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: msm8916: Fix dma node nameVinod Koul1-1/+1
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-5-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: qcs404: Fix dma node nameVinod Koul1-2/+2
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-4-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>