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2022-07-17um/drivers: Kconfig: Fix indentationJuerg Haefliger1-27/+27
The convention for indentation seems to be a single tab. Help text is further indented by an additional two whitespaces. Fix the lines that violate these rules. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2022-07-17um: Kconfig: Fix indentationJuerg Haefliger1-1/+1
The convention for indentation seems to be a single tab. Help text is further indented by an additional two whitespaces. Fix the lines that violate these rules. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2022-07-17Merge tag 'x86_urgent_for_v5.19_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds5-5/+19
Pull x86 fixes from Borislav Petkov: - Improve the check whether the kernel supports WP mappings so that it can accomodate a XenPV guest due to how the latter is setting up the PAT machinery - Now that the retbleed nightmare is public, here's the first round of fallout fixes: * Fix a build failure on 32-bit due to missing include * Remove an untraining point in espfix64 return path * other small cleanups * tag 'x86_urgent_for_v5.19_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/bugs: Remove apostrophe typo um: Add missing apply_returns() x86/entry: Remove UNTRAIN_RET from native_irq_return_ldt x86/bugs: Mark retbleed_strings static x86/pat: Fix x86_has_pat_wp() x86/asm/32: Fix ANNOTATE_UNRET_SAFE use on 32-bit
2022-07-17MIPS: BMIPS: Utilize cfe_die() for invalid DTBFlorian Fainelli2-1/+14
If we were not specified a correct DTB, we will not be able to print anything useful with panic() which requires a working console of some sort. Utilize cfe_die() to callback into the CFE default UART and print some useful diagnostics. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-07-17MIPS: CFE: Add cfe_die()Florian Fainelli2-1/+69
Add a cfe_die() implementation which is useful when the kernel does an early panic and no console is registered. This allows us to print useful diagnostics such as an invalid DTB having been configured/selected. Since the BMIPS_GENERIC kernel can be built with support for multiple processors, we need to do a runtime determination of the type of CPU that we are executing on to perform the appropriate XKS01 disabling. Since cfe_init() + cfe_die() could be conceivably called at very early stages of the kernel boot, before cpu_probe(), we do not rely on the structure(s) populated by cpu_probe(). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-07-17Merge branch kvm-arm64/sysreg-cleanup-5.20 into kvmarm-master/nextMarc Zyngier10-592/+538
* kvm-arm64/sysreg-cleanup-5.20: : . : Long overdue cleanup of the sysreg userspace access, : with extra scrubbing on the vgic side of things. : From the cover letter: : : "Schspa Shi recently reported[1] that some of the vgic code interacting : with userspace was reading uninitialised stack memory, and although : that read wasn't used any further, it prompted me to revisit this part : of the code. : : Needless to say, this area of the kernel is pretty crufty, and shows a : bunch of issues in other parts of the KVM/arm64 infrastructure. This : series tries to remedy a bunch of them: : : - Sanitise the way we deal with sysregs from userspace: at the moment, : each and every .set_user/.get_user callback has to implement its own : userspace accesses (directly or indirectly). It'd be much better if : that was centralised so that we can reason about it. : : - Enforce that all AArch64 sysregs are 64bit. Always. This was sort of : implied by the code, but it took some effort to convince myself that : this was actually the case. : : - Move the vgic-v3 sysreg userspace accessors to the userspace : callbacks instead of hijacking the vcpu trap callback. This allows : us to reuse the sysreg infrastructure. : : - Consolidate userspace accesses for both GICv2, GICv3 and common code : as much as possible. : : - Cleanup a bunch of not-very-useful helpers, tidy up some of the code : as we touch it. : : [1] https://lore.kernel.org/r/m2h740zz1i.fsf@gmail.com" : . KVM: arm64: Get rid or outdated comments KVM: arm64: Descope kvm_arm_sys_reg_{get,set}_reg() KVM: arm64: Get rid of find_reg_by_id() KVM: arm64: vgic: Tidy-up calls to vgic_{get,set}_common_attr() KVM: arm64: vgic: Consolidate userspace access for base address setting KVM: arm64: vgic-v2: Add helper for legacy dist/cpuif base address setting KVM: arm64: vgic: Use {get,put}_user() instead of copy_{from.to}_user KVM: arm64: vgic-v2: Consolidate userspace access for MMIO registers KVM: arm64: vgic-v3: Consolidate userspace access for MMIO registers KVM: arm64: vgic-v3: Use u32 to manage the line level from userspace KVM: arm64: vgic-v3: Convert userspace accessors over to FIELD_GET/FIELD_PREP KVM: arm64: vgic-v3: Make the userspace accessors use sysreg API KVM: arm64: vgic-v3: Push user access into vgic_v3_cpu_sysregs_uaccess() KVM: arm64: vgic-v3: Simplify vgic_v3_has_cpu_sysregs_attr() KVM: arm64: Get rid of reg_from/to_user() KVM: arm64: Consolidate sysreg userspace accesses KVM: arm64: Rely on index_to_param() for size checks on userspace access KVM: arm64: Introduce generic get_user/set_user helpers for system registers KVM: arm64: Reorder handling of invariant sysregs from userspace KVM: arm64: Add get_reg_by_id() as a sys_reg_desc retrieving helper Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Get rid or outdated commentsMarc Zyngier1-5/+0
Once apon a time, the 32bit KVM/arm port was the reference, while the arm64 version was the new kid on the block, without a clear future... This was a long time ago. "The times, they are a-changing." Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Descope kvm_arm_sys_reg_{get,set}_reg()Marc Zyngier2-3/+2
Having kvm_arm_sys_reg_get_reg and co in kvm_host.h gives the impression that these functions are free to be called from anywhere. Not quite. They really are tied to out internal sysreg handling, and they would be better off in the sys_regs.h header, which is private. kvm_host.h could also get a bit of a diet, so let's just do that. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Get rid of find_reg_by_id()Marc Zyngier2-16/+0
This helper doesn't have a user anymore, let's get rid of it. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic: Tidy-up calls to vgic_{get,set}_common_attr()Marc Zyngier1-52/+26
The userspace accessors have an early call to vgic_{get,set}_common_attr() that makes the code hard to follow. Move it to the default: clause of the decoding switch statement, which results in a nice cleanup. This requires us to move the handling of the pending table into the common handling, even if it is strictly a GICv3 feature (it has the benefit of keeping the whole control group handling in the same function). Also cleanup vgic_v3_{get,set}_attr() while we're at it, deduplicating the calls to vgic_v3_attr_regs_access(). Suggested-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic: Consolidate userspace access for base address settingMarc Zyngier1-44/+31
Align kvm_vgic_addr() with the rest of the code by moving the userspace accesses into it. kvm_vgic_addr() is also made static. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v2: Add helper for legacy dist/cpuif base address settingMarc Zyngier2-9/+34
We carry a legacy interface to set the base addresses for GICv2. As this is currently plumbed into the same handling code as the modern interface, it limits the evolution we can make there. Add a helper dedicated to this handling, with a view of maybe removing this in the future. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic: Use {get,put}_user() instead of copy_{from.to}_userMarc Zyngier1-3/+3
Tidy-up vgic_get_common_attr() and vgic_set_common_attr() to use {get,put}_user() instead of the more complex (and less type-safe) copy_{from,to}_user(). Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v2: Consolidate userspace access for MMIO registersMarc Zyngier1-22/+17
Align the GICv2 MMIO accesses from userspace with the way the GICv3 code is now structured. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Consolidate userspace access for MMIO registersMarc Zyngier1-66/+37
For userspace accesses to GICv3 MMIO registers (and related data), vgic_v3_{get,set}_attr are littered with {get,put}_user() calls, making it hard to audit and reason about. Consolidate all userspace accesses in vgic_v3_attr_regs_access(), making the code far simpler to audit. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Use u32 to manage the line level from userspaceMarc Zyngier5-8/+12
Despite the userspace ABI clearly defining the bits dealt with by KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO as a __u32, the kernel uses a u64. Use a u32 to match the userspace ABI, which will subsequently lead to some simplifications. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Convert userspace accessors over to FIELD_GET/FIELD_PREPMarc Zyngier1-33/+27
The GICv3 userspace accessors are all about dealing with conversion between fields from architectural registers and internal representations. However, and owing to the age of this code, the accessors use a combination of shift/mask that is hard to read. It is nonetheless easy to make it better by using the FIELD_{GET,PREP} macros that solely rely on a mask. This results in somewhat nicer looking code, and is probably easier to maintain. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Make the userspace accessors use sysreg APIMarc Zyngier1-188/+248
The vgic-v3 sysreg accessors have been ignored as the rest of the sysreg internal API was evolving, and are stuck with the .access method (which is normally reserved to the guest's own access) for the userspace accesses (which should use the .set/.get_user() methods). Catch up with the program and repaint all the accessors so that they fit into the normal userspace model, and plug the result into the helpers that have been introduced earlier. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Push user access into vgic_v3_cpu_sysregs_uaccess()Marc Zyngier3-35/+24
In order to start making the vgic sysreg access from userspace similar to all the other sysregs, push the userspace memory access one level down into vgic_v3_cpu_sysregs_uaccess(). The next step will be to rely on the sysreg infrastructure to perform this task. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: vgic-v3: Simplify vgic_v3_has_cpu_sysregs_attr()Marc Zyngier3-12/+13
Finding out whether a sysreg exists has little to do with that register being accessed, so drop the is_write parameter. Also, the reg pointer is completely unused, and we're better off just passing the attr pointer to the function. This result in a small cleanup of the calling site, with a new helper converting the vGIC view of a sysreg into the canonical one (this is purely cosmetic, as the encoding is the same). Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Get rid of reg_from/to_user()Marc Zyngier1-24/+6
These helpers are only used by the invariant stuff now, and while they pretend to support non-64bit registers, this only serves as a way to scare the casual reviewer... Replace these helpers with our good friends get/put_user(), and don't look back. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Consolidate sysreg userspace accessesMarc Zyngier2-103/+61
Until now, the .set_user and .get_user callbacks have to implement (directly or not) the userspace memory accesses. Although this gives us maximem flexibility, this is also a maintenance burden, making it hard to audit, and I'd feel much better if it was all located in a single place. So let's do just that, simplifying most of the function signatures in the process (the callbacks are now only concerned with the data itself, and not with userspace). Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Rely on index_to_param() for size checks on userspace accessMarc Zyngier1-6/+0
index_to_param() already checks that we use 64bit accesses for all registers accessed from userspace. However, we have extra checks in other places (such as index_to_params), which is pretty confusing. Get rid off these redundant checks. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Introduce generic get_user/set_user helpers for system registersMarc Zyngier2-22/+44
The userspace access to the system registers is done using helpers that hardcode the table that is looked up. extract some generic helpers from this, moving the handling of hidden sysregs into the core code. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Reorder handling of invariant sysregs from userspaceMarc Zyngier1-6/+12
In order to allow some further refactor of the sysreg helpers, move the handling of invariant sysreg to occur before we handle all the other ones. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Add get_reg_by_id() as a sys_reg_desc retrieving helperMarc Zyngier3-17/+23
find_reg_by_id() requires a sys_reg_param as input, which most users provide as a on-stack variable, but don't make any use of the result. Provide a helper that doesn't have this requirement and simplify the callers (all but one). Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17Merge branch kvm-arm64/misc-5.20 into kvmarm-master/nextMarc Zyngier4-10/+10
* kvm-arm64/misc-5.20: : . : Misc fixes for 5.20: : : - Tidy up the hyp/nvhe Makefile : : - Fix functions pointlessly returning a void value : : - Fix vgic_init selftest to handle the GICv3-on-v3 case : : - Fix hypervisor symbolisation when CONFIG_RANDOMIZE_BASE=y : . KVM: arm64: Fix hypervisor address symbolization KVM: arm64: selftests: Add support for GICv2 on v3 KVM: arm64: Don't return from void function KVM: arm64: nvhe: Add intermediates to 'targets' instead of extra-y KVM: arm64: nvhe: Rename confusing obj-y Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-07-17KVM: arm64: Fix hypervisor address symbolizationKalesh Singh1-2/+2
With CONFIG_RANDOMIZE_BASE=y vmlinux addresses will resolve incorrectly from kallsyms. Fix this by adding the KASLR offset before printing the symbols. Fixes: 6ccf9cb557bd ("KVM: arm64: Symbolize the nVHE HYP addresses") Reported-by: Fuad Tabba <tabba@google.com> Signed-off-by: Kalesh Singh <kaleshsingh@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220715235824.2549012-1-kaleshsingh@google.com
2022-07-16ARM: dts: qcom: msm8974: Disable remoteprocs by defaultStephan Gerhold3-0/+8
The remoteproc configuration in qcom-msm8974.dtsi is incomplete because it lacks the regulator supplies that should be added in the board DT files. Some of the msm8974 boards are currently missing the regulator supplies and should have the remoteprocs disabled to avoid making use of the incomplete configuration. This also fixes dtbs_check warnings after moving "qcom,msm8974-mss-pil" to DT schema, which rightfully complains that the -supply properties are missing for some boards: qcom-apq8074-dragonboard.dtb: remoteproc@fc880000: 'pll-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'mss-supply' is a required property From schema: remoteproc/qcom,msm8916-mss-pil.yaml remoteproc@fc880000: 'oneOf' conditional failed, one must be fixed: 'power-domains' is a required property 'power-domain-names' is a required property, or 'cx-supply' is a required property 'mx-supply' is a required property Cc: Luca Weiss <luca@z3ntu.xyz> Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Fixes: f300826d27be ("ARM: dts: qcom-msm8974: Sort and clean up nodes") Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220712124421.3129206-4-stephan.gerhold@kernkonzept.com
2022-07-16ARM: dts: qcom: ipq8064: add missing smem compatibleChristian Marangi1-0/+3
Add missing smem compatible and hwlocks phandle for ipq8064 dtsi smem node. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707102040.1859-3-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add missing hwlockChristian Marangi1-0/+7
Add missing hwlock for ipq8064 dtsi provided by qcom,sfpb-mutex. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Moved the node inside /soc] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707102040.1859-2-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add speedbin efuse nvmem nodeChristian Marangi1-0/+3
Add speedbin efuse nvmem cell needed for the opp table for the CPU freqs. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-10-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: fix and add some missing gsbi nodeChristian Marangi1-1/+53
Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing gsbi7 i2c node and gsbi1 node. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-8-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: reduce pci IO size to 64KChristian Marangi1-3/+3
The current value for pci IO is problematic for ath10k wifi card commonly connected to ipq8064 SoC. The current value is probably a typo and is actually uncommon to find 1MB IO space even on a x86 arch. Also with recent changes to the pci driver, pci1 and pci2 now fails to function as any connected device fails any reg read/write. Reduce this to 64K as it should be more than enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT hardcoded for the ARM arch. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-7-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: disable usb phy by defaultChristian Marangi1-0/+4
Disable usb phy by default. When the usb phy were pushed, half of them were flagged as disabled by mistake. Correctly disable all usb phy and enable them only if a device actually use them. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-6-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmacChristian Marangi1-4/+4
Add missing snps,dwmac compatible for gmac ipq8064 dtsi. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-5-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulatorsChristian Marangi1-0/+37
Add specific ipq8064 dtsi with smb208 rpm regulators. Qcom advise to use this configuration but it's not mandatory and OEM can decide to implement their own regulators. smb208 regulators are used to scale CPU voltage, L2 cache voltage and Ubi32 cores. There regulators are controlled by rpm and to correctly works gsbi4-i2c require to be NEVER disabled or rpm will reject any regulator change request. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-4-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add gsbi6 missing definitionChristian Marangi1-0/+43
Add gsbi6 missing definition for ipq8064. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: ipq8064: add multiple missing pin definitionChristian Marangi3-15/+32
Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Drop i2c4_pins node from ipq8064-ap148 dts as it's now moved to ipq8064 dtsi. Drop mdio0_pins node from ipq8064-rb3011 dts as it's now moved to ipq8064 dtsi. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707010943.20857-2-ansuelsmth@gmail.com
2022-07-16ARM: dts: qcom: msm8974-hammerhead: Add notification LEDAndré Almeida1-0/+30
Nexus 5 has a RGB LED connected to the TRILED and hence channels 7, 6 and 5 of the LPG. Add a node describing this. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: André Almeida <andrealmeid@collabora.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505164336.13210-1-luca@z3ntu.xyz
2022-07-16ARM: dts: qcom: msm8974-FP2: Add notification LEDLuca Weiss1-0/+30
FP2 has a RGB LED connected to the TRILED and hence channels 7, 6 and 5 of the LPG. Add a node describing this. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505163029.6541-1-luca@z3ntu.xyz
2022-07-16ARM: dts: qcom: msm8974-sony: Enable LPGBjorn Andersson2-0/+60
Both Castor and Honami has RGB LEDs driven by the PM8941 LPG, define these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20220713212309.130230-3-bjorn.andersson@linaro.org
2022-07-16ARM: dts: qcom: Add LPG node to pm8941Bjorn Andersson1-0/+10
The PM8941 contains 8 LPG channels, as well as TRILED and LUT blocks. Add a node for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20220713212309.130230-2-bjorn.andersson@linaro.org
2022-07-16ARM: dts: qcom: sdx65: reorder USB interruptsJohan Hovold1-4/+6
Three SoCs did not follow the interrupt order specified by the USB controller binding. While keeping the non-SuperSpeed interrupts together seems natural, reorder the interrupts to match the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> [bjorn: Split out from arm64 patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
2022-07-16arm64: dts: qcom: reorder USB interruptsJohan Hovold2-16/+24
Three SoCs did not follow the interrupt order specified by the USB controller binding. While keeping the non-SuperSpeed interrupts together seems natural, reorder the interrupts to match the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> [bjorn: Omitted sdx65 part from this patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
2022-07-16arm64: dts: qcom: sc7280: reorder USB interruptsJohan Hovold1-7/+8
Only one of the USB controllers supports SuperSpeed and have an SS PHY wakeup interrupt. Reorder the interrupts so that they match the updated binding which specifically has the optional interrupt last. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-4-johan+linaro@kernel.org
2022-07-16arm64: dts: qcom: sc8280xp: fix USB interruptsJohan Hovold1-5/+9
The two single-port SC8280XP USB controllers do not have an hs_phy_irq interrupt. Instead they have a pwr_event interrupt which is distinct from the former and not yet supported by the driver. Fix the USB node interrupt names so that they match the devicetree binding. Also fix the pwr_event interrupt of the second controller which should be 811 as noticed by Andrew Halaney. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-3-johan+linaro@kernel.org
2022-07-16arm64: dts: qcom: sc8280xp: fix USB clock order and namingJohan Hovold1-8/+8
Fix the USB controller clock order and naming so that they match the devicetree binding. Note that the driver currently simply enables all clocks in the order that they are specified in the devicetree. Reordering the clocks as per the binding means that the only explicit ordering constraint found in the vendor driver, that cfg_noc should be enabled before the core_clk, is now honoured. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-2-johan+linaro@kernel.org
2022-07-16Merge tag 'arm-soc/for-5.20/soc-part2' of https://github.com/Broadcom/stblinux into arm/socArnd Bergmann1-3/+1
This pull request contains Broadcom ARM-based SoCs Kconfig updates for 5.20, second part, please pull the following: - Rafal spells out what the BCA acronym means - Florian removes the forced thermal subsystem selection done by ARCH_BCM_NSP * tag 'arm-soc/for-5.20/soc-part2' of https://github.com/Broadcom/stblinux: ARM: bcmbca: Include full family name in Kconfig ARM: bcm: NSP: Removed forced thermal selection Link: https://lore.kernel.org/r/20220715221642.297536-4-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-16Merge tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann3-2/+24
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.20, second part, please pull the following: - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000, he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle we can remove ARCH_BCM4908 and continue to have make oldconfig work. Finally he spells out what BCA means to make it clearer * tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Include full family name in Kconfig arm64: make ARCH_BCM4908 select ARCH_BCMBCA arm64: dts: Add base DTS file for bcmbca device Asus GT-AX6000 Link: https://lore.kernel.org/r/20220715221642.297536-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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