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2020-07-13ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSPSuman Anna1-0/+30
The CMA reserved memory nodes have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. These nodes are assigned to the respective rproc device nodes, and both the IPU and DSP remote processors are enabled for all these boards. The current CMA pools and sizes are defined statically for each device. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add aliases for rproc nodesSuman Anna1-0/+2
Add aliases for the DSP and IPU remoteproc processor nodes common to all OMAP4 boards. The aliases uses the stem "rproc". The aliases can be overridden, if needed, in the respective board files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add IPU DT nodeSuman Anna1-0/+12
The DT node for the Dual-Cortex M3 IPU processor sub-system has been added for OMAP4 SoCs. The L2RAM memory region information has been added to the node through the 'reg' and 'reg-names' properties. The node has the 'iommus', 'clocks', 'resets', 'mboxes' and 'firmware' properties also added, and is disabled for now. It should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Update the DSP nodeSuman Anna1-4/+11
The compatible property for the DSP node is updated to match the OMAP remoteproc bindings. The node is moved from the soc node to the ocp node to better reflect the connectivity from MPU side. The node is updated with the 'ti,bootreg', 'clocks', 'resets', 'iommus', 'mboxes' and 'firmware' properties. Note that the node does not have any 'reg' or 'reg-names' properties since it doesn't have any L2 RAM memory, but only Unicaches. The node is disabled for now, and should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5: Add timer_sys_ck clocks for timersSuman Anna2-22/+33
The commit d41e53040926 ("clk: ti: omap5: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes except for the always-on timers 1 and 12. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add timer_sys_ck clocks for timersSuman Anna2-22/+33
The commit 1c7de9f27a65 ("clk: ti: omap4: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: am335x-pocketbeagle: set default mux for gpio pinsDrew Fustini1-0/+125
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358 balls with gpio lines, and these pins are not used for any other peripherals by default. These GPIO lines are unclaimed and could be used by userspace program through the gpiod ABI. This patch adds a "default" state in the am33xx_pinmux node and sets the mux for those pins to gpio (mode 7) and input enable. The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown" pinconf properties are also set for each pin per the ball reset state in section 4.2 of the datasheet [0]. This is the AM335x pin control register format in Table 9-60 [1]: bit attribute value ---------------------------------- 31-7 reserved 0 on reset 6 slew { 0: fast, 1: slow } 5 rx_active { 0: rx disable, 1: rx enabled } 4 pu_typesel { 0: pulldown select, 1: pullup select } 3 puden { 0: pud enable, 1: disabled } 2 mode 3 bits to selec mode 0 to 7 1 mode 0 mode The values for the bias pinconf properties are derived as follows: pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>; pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >; 2^5 2^4 2^3 2^2 2^1 2^0 | 0x20 0x10 0x08 0x04 0x02 0x01 | --------------------------------------------------| input x 1 0 x x x | 0x10 enabled x 1 0 x x x | 0x10 disabled x 0 0 x x x | 0x00 mask x 1 1 x x x | 0x18 pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>; pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >; 2^5 2^4 2^3 2^2 2^1 2^0 | 0x20 0x10 0x08 0x04 0x02 0x01 | --------------------------------------------------| input x 0 0 x x x | 0x00 enabled x 0 0 x x x | 0x00 disabled x 1 0 x x x | 0x10 mask x 1 1 x x x | 0x18 [0] http://www.ti.com/lit/ds/symlink/am3358.pdf [1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13spi: imx/fsl-lpspi: Convert to GPIO descriptorsLinus Walleij11-91/+69
This converts the two Freescale i.MX SPI drivers Freescale i.MX (CONFIG_SPI_IMX) and Freescale i.MX LPSPI (CONFIG_SPI_FSL_LPSPI) to use GPIO descriptors handled in the SPI core for GPIO chip selects whether defined in the device tree or a board file. The reason why both are converted at the same time is that they were both using the same platform data and platform device population helpers when using board files intertwining the code so this gives a cleaner cut. The platform device creation was passing a platform data container from each boardfile down to the driver using struct spi_imx_master from <linux/platform_data/spi-imx.h>, but this was only conveying the number of chipselects and an int * array of the chipselect GPIO numbers. The imx27 and imx31 platforms had code passing the now-unused platform data when creating the platform devices, this has been repurposed to pass around GPIO descriptor tables. The platform data struct that was just passing an array of integers and number of chip selects for the GPIO lines has been removed. The number of chipselects used to be passed from the board file, because this number also limits the number of native chipselects that the platform can use. To deal with this we just augment the i.MX (CONFIG_SPI_IMX) driver to support 3 chipselects if the platform does not define "num-cs" as a device property (such as from the device tree). This covers all the legacy boards as these use <= 3 native chip selects (or GPIO lines, and in that case the number of chip selects is determined by the core from the number of available GPIO lines). Any new boards should use device tree, so this is a reasonable simplification to cover all old boards. The LPSPI driver never assigned the number of chipselects and thus always fall back to the core default of 1 chip select if no GPIOs are defined in the device tree. The Freescale i.MX driver was already partly utilizing the SPI core to obtain the GPIO numbers from the device tree, so this completes the transtion to let the core handle all of it. All board files and the core i.MX boardfile registration code is augmented to account for these changes. This has been compile-tested with the imx_v4_v5_defconfig and the imx_v6_v7_defconfig. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Robin Gong <yibin.gong@nxp.com> Cc: Trent Piepho <tpiepho@impinj.com> Cc: Clark Wang <xiaoning.wang@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Link: https://lore.kernel.org/r/20200625200252.207614-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-13ARM: OMAP2+: Drop legacy platform data for am4 dwc3Tony Lindgren2-61/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. [tony@atomide.com: fixed typo for am3 vs am4] Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13arm64: tegra: norrin: Add missing panel power supplyThierry Reding1-0/+1
This panel supply is always on, so this does happen to work by accident. Make sure to properly hook up the power supply to model the dependency correctly and so that the panel continues to operate properly even if the supply is not always on. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple regulators busThierry Reding9-790/+660
The standard way to do this is to list out the regulators at the top- level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple clocks busThierry Reding6-66/+24
The standard way to do this is to list out the clocks at the top-level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove undocumented battery-name propertyThierry Reding2-2/+0
battery-name is not a documented property, so drop it to avoid validation failures. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Enable XUSB on NorrinThierry Reding2-42/+246
Use the XUSB controller instead of the legacy EHCI controller to enable USB 3.0 support. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann14-4/+254
This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.9 please pull the following: - Rafal specifies the switch ports for various Luxul devices (XAP-1410, XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150) - Krzysztof fixes the L2 cache controller node name to conform to dtschema - Maxime introduces two new clock providers for Raspberry Pi 4, one to support firmware based clocks and another one for the DVP block feeding into the two HDMI blocks. * tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: bcm: Align L2 cache-controller nodename with dtschema ARM: dts: BCM5301X: Specify switch ports for Luxul devices ARM: dts: bcm2711: Add HDMI DVP ARM: dts: bcm2711: Add firmware clocks node Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13arm64: defconfig: enable CONFIG_FSL_ENETC_QOSMichael Walle1-0/+1
Now that we have the needed network scheduler, we can enable the ENETC hardware support. $ scripts/bloat-o-meter old-vmlinux vmlinux add/remove: 19/2 grow/shrink: 12/0 up/down: 12852/-16 (12836) [..] Total: Before=20428273, After=20441109, chg +0.06% Link: https://lore.kernel.org/r/20200707223114.16355-2-michael@walle.cc Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13arm64: defconfig: enable TSN features for ENETC and similiar hardwareMichael Walle1-0/+12
Newer network cards and switches support offloading of certain packet scheduling, classifying and actions onto the hardware itself. For example, time-aware and credit based schedulers. To use this feature we have to enable the corresponding modules. Please note, that this will also enable NET_SCHED and NET_CLS_ACT as builtin because there is no module option. The enabled modules should get us a good foundation. $ scripts/bloat-o-meter old-vmlinux vmlinux add/remove: 446/215 grow/shrink: 48/31 up/down: 78445/-11519 (66926) [..] Total: Before=20452567, After=20519493, chg +0.33% Link: https://lore.kernel.org/r/20200707223114.16355-1-michael@walle.cc Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dtArnd Bergmann6-54/+335
Device tree changes for omaps for v5.9 merge window This series of changes configures the GPIO line names for am335x beaglebone black and pocketbeagle to make it easier to configure the pins. To make use of the pins, we also add the gpio-ranges for am335x. We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then there are two non-urgent dtschema validator warning fixes. * tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-pocketbeagle: add gpio-line-names ARM: dts: am335x-boneblack: add gpio-line-names ARM: dts: am33xx-l4: add gpio-ranges ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs ARM: dts: am: Align L2 cache-controller nodename with dtschema ARM: dts: omap: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dtArnd Bergmann8-10/+26
UniPhier ARM64 SoC DT updates for v5.9 - add missing interrupts property to support card serial - fix node names to follow the DT schema - add clock-names and reset-names to pcie-phy * tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy arm64: dts: uniphier: Rename ethphy node to ethernet-phy arm64: dts: uniphier: give fixed port number to support card serial arm64: dts: uniphier: add interrupts to support card serial Link: https://lore.kernel.org/r/CAK7LNARK4SKhSW-xwgc3vq7FO7N864jPgzm8NtsGOv8wVFVyBQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13Merge tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dtArnd Bergmann11-28/+73
UniPhier ARM SoC DT updates for v5.9 - add missing interrupts property to support card serial - fix node names to follow the DT schema - add PCIe endpoint and PHY nodes for Pro5 SoC - simplify device hierarchy of support-card.dtsi * tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: simplify support-card node structure ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5 ARM: dts: uniphier: Rename ethphy node to ethernet-phy ARM: dts: uniphier: give fixed port number to support card serial ARM: dts: uniphier: rename support card serial node to fix schema warning ARM: dts: uniphier: add interrupts to support card serial Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-13ARM: dts: imx6ull: add MYiR MYS-6ULX SBCParthiban Nallathambi3-0/+257
Add support for the MYiR imx6ULL based single board computer equipped with on board 256MB NAND & RAM. The board also provides expansion header for expansion board, but this commit adds only support for SBC. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-spb4: Add node for switch watchdogChris Healy1-0/+19
Add I2C child node for switch watchdog present on SPB4 Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: colibri-imx6: remove pinctrl-names orphanPhilippe Schenker1-1/+0
This is not necessary without a pinctrl-0 statement. Remove this orphan. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi filesUwe Kleine-König68-53/+116
The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseXAndrew Lunn1-10/+10
The SFF soldered onto the board expect the ports to use 1000BaseX. It makes no sense to have the ports set to SGMII, since they don't even support that mode. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseXChris Healy1-1/+1
The SFF soldered onto the board expects the port to use 1000BaseX. It makes no sense to have the port set to SGMII, since it doesn't even support that mode. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ZII: update MDIO speed and preambleChris Healy6-0/+12
Update MDIO configuration with ZII devices to fully utilize MDIO endpoint capabilities. All devices support 12.5MHz clock and don't require MDIO preable. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vfxxx: Add node for CAAMAndrey Smirnov1-0/+22
Add node for CAAM device in NXP Vybrid SoC. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabresd: enable sataRichard Zhu1-0/+4
Enable SATA on iMX6QP SABRESD board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qp-sabreauto: enable sataRichard Zhu1-0/+4
Enable SATA on iMX6QP SABREAUTO board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic RVT boardOleksij Rempel2-0/+185
Protonic RVT is an internal development platform for a wireless ISObus Virtual Terminal based on COTS tablets, and the predecessor of the WD2 platform. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic VT7 boardOleksij Rempel2-0/+412
The Protonic VT7 is a mid-class ISObus Virtual Terminal with a 7 inch touchscreen display. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic WD2 boardOleksij Rempel2-0/+189
Add support for the Protonic WD2 board, which is an internal development platform for low-cost agricultural Virtual Terminals based on COTS tablets and web applications. It inherits from the PRTI6Q base class. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: add Protonic PRTI6Q boardOleksij Rempel3-0/+707
Protonic PRTI6Q is a development board and a base class for different specific customer application boards based on the i.MX6 family of SoCs, developed by Protonic Holland. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6ul: Add ASRC device nodeShengjiu Wang1-0/+25
Add ASRC device node. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski5-5/+5
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: vf610: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache@40006000: $nodename:0: 'l2-cache@40006000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add MQS supportShengjiu Wang4-0/+62
Add MQS support. As the pin conflict with usdhc2, then need to add a separate dts. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: ls1021a: add ftm_alarm0 DT nodeBiwen Li1-0/+15
The patch add ftm_alarm0 DT node - add rcpm node - add ftm_alarm0 node - aliases ftm_alarm0 as rtc1 Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add cs42888 sound card supportShengjiu Wang2-0/+79
Complete the ESAI node and Add cs42888 sound card support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sabreauto: Add SPDIF supportShengjiu Wang1-0/+21
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx-sdb: Add SPDIF supportShengjiu Wang1-0/+23
Add SPDIF support. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sx: Enable ASRC deviceShengjiu Wang1-8/+18
Add compatible string, update the clock table, add fsl,asrc-rate and fsl,asrc-width property. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13arm64: dts: ls1028a-qds: Add DSPI flash nodesXiaowei Bao1-0/+85
Add the DSPI flash nodes into fsl-ls1028a-qds.dts Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx53-ppd: alarm LEDs use kernel LED interfaceIan Ray1-9/+40
Use kernel LED interface for the alarm LEDs. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Samu Nuutamo <samu.nuutamo@vincit.fi> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6sll: Make ssi node name same as other platformsShengjiu Wang1-3/+3
In imx6sll.dtsi, the ssi node name is different with other platforms (imx6qdl, imx6sl, imx6sx), but the sound/soc/fsl/fsl-asoc-card.c machine driver needs to check ssi node name for audmux configuration, then different ssi node name causes issue on imx6sll platform. So we change ssi node name to make all platforms have same name. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCsAnson Huang5-17/+17
Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change esdhc node name on i.MX2/i.MX3/i.MX5 SoCsAnson Huang5-17/+17
Change i.MX2/i.MX3/i.MX5 SoCs esdhc node name from esdhc to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: Change sdhci node name on i.MX27/i.MX31 SoCsAnson Huang2-5/+5
Change i.MX27/i.MX31 node name from sdhci to mmc to be compliant with yaml schema, it requires the nodename to be "mmc". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx6qdl: Remove invalid interrupt for GPC nodeAnson Huang1-2/+1
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, so remove it from GPC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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