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2020-07-06Merge tag 'tags/bcm2835-dt-next-2020-07-06' into devicetree/nextFlorian Fainelli2-0/+20
Maxime Ripard introduces two new clock providers into RPi4's device tree: - The first one based on the enhancements made to clk-raspberrypi, which is now registered trough DT and provides control over the whole range of firmware based clocks. - The second one based on the new clk-bcm2711-dvp driver, which gates the clocks and reset signals that feed into RPi4's HDMI0/1 blocks. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-06ARM: dts: bcm: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski4-4/+4
Fix dtschema validator warnings like: l2-cache@22000: $nodename:0: 'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-06ARM: dts: BCM5301X: Specify switch ports for Luxul devicesRafał Miłecki8-0/+230
All those devices use standard BCM53011 (rev 5) or BCM53012 (rev 0). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-07-07kbuild: remove cc-option test of -ffreestandingMasahiro Yamada3-3/+3
Some Makefiles already pass -ffreestanding unconditionally. For example, arch/arm64/lib/Makefile, arch/x86/purgatory/Makefile. No problem report so far about hard-coding this option. So, we can assume all supported compilers know -ffreestanding. I confirmed GCC 4.8 and Clang manuals document this option. Get rid of cc-option from -ffreestanding. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2020-07-07kbuild: remove cc-option test of -fno-stack-protectorMasahiro Yamada17-31/+21
Some Makefiles already pass -fno-stack-protector unconditionally. For example, arch/arm64/kernel/vdso/Makefile, arch/x86/xen/Makefile. No problem report so far about hard-coding this option. So, we can assume all supported compilers know -fno-stack-protector. GCC 4.8 and Clang support this option (https://godbolt.org/z/_HDGzN) Get rid of cc-option from -fno-stack-protector. Remove CONFIG_CC_HAS_STACKPROTECTOR_NONE, which is always 'y'. Note: arch/mips/vdso/Makefile adds -fno-stack-protector twice, first unconditionally, and second conditionally. I removed the second one. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
2020-07-06Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds13-29/+60
Pull kvm fixes from Paolo Bonzini: "Bugfixes and a one-liner patch to silence a sparse warning" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: arm64: Stop clobbering x0 for HVC_SOFT_RESTART KVM: arm64: PMU: Fix per-CPU access in preemptible context KVM: VMX: Use KVM_POSSIBLE_CR*_GUEST_BITS to initialize guest/host masks KVM: x86: Mark CR4.TSD as being possibly owned by the guest KVM: x86: Inject #GP if guest attempts to toggle CR4.LA57 in 64-bit mode kvm: use more precise cast and do not drop __user KVM: x86: bit 8 of non-leaf PDPEs is not reserved KVM: X86: Fix async pf caused null-ptr-deref KVM: arm64: vgic-v4: Plug race between non-residency and v4.1 doorbell KVM: arm64: pvtime: Ensure task delay accounting is enabled KVM: arm64: Fix kvm_reset_vcpu() return code being incorrect with SVE KVM: arm64: Annotate hyp NMI-related functions as __always_inline KVM: s390: reduce number of IO pins to 1
2020-07-06x86/entry: Rename idtentry_enter/exit_cond_rcu() to idtentry_enter/exit()Andy Lutomirski5-43/+53
They were originally called _cond_rcu because they were special versions with conditional RCU handling. Now they're the standard entry and exit path, so the _cond_rcu part is just confusing. Drop it. Also change the signature to make them more extensible and more foolproof. No functional change -- it's pure refactoring. Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/247fc67685263e0b673e1d7f808182d28ff80359.1593795633.git.luto@kernel.org
2020-07-06Merge tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/driversArnd Bergmann1-9/+11
SoC attributes update for v5.9 1. Addition of ARM SMCCC ARCH_SOC_ID support 2. Usage of the custom soc attribute groups already supported in the infrastucture instead of device_create_file which eliminates the need for any cleanup when soc is unregistered 3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of direct __ATTR * tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: smccc: Add ARCH_SOC_ID support ARM: OMAP2: Use custom soc attribute group instead of device_create_file ARM: OMAP2: Switch to use DEVICE_ATTR_RO() soc: ux500: Use custom soc attribute group instead of device_create_file soc: ux500: Switch to use DEVICE_ATTR_RO() soc: integrator: Use custom soc attribute group instead of device_create_file soc: integrator: Switch to use DEVICE_ATTR_RO() soc: realview: Use custom soc attribute group instead of device_create_file soc: realview: Switch to use DEVICE_ATTR_RO() Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-06Merge tag 's390-5.8-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linuxLinus Torvalds7-26/+105
Pull s390 fixes from Heiko Carstens: - Initialize jump labels before early command line parsing in order to make init_on_alloc and init_on_free options work - Fix vfio-ccw build error due to missing include - Prevent callchain data collection with hardware sampling, since the callchains simply do not exist - Prevent multiple registrations of the same zPCI function - Update defconfigs * tag 's390-5.8-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: vfio-ccw: Fix a build error due to missing include of linux/slab.h s390: update defconfigs s390/cpum_sf: prohibit callchain data collection s390/setup: init jump labels before command line parsing s390/maccess: add no DAT mode to kernel_write s390/pci: fix enabling a reserved PCI function
2020-07-06Merge tag 'kvmarm-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-masterPaolo Bonzini2-5/+13
KVM/arm fixes for 5.8, take #3 - Disable preemption on context-switching PMU EL0 state happening on system register trap - Don't clobber X0 when tearing down KVM via a soft reset (kexec)
2020-07-06ARM: dts: bcm2711: Add HDMI DVPMaxime Ripard1-0/+15
Now that we have a driver for the DVP, let's add its DT node. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/e22222ca7f41b960e9bb1a31e0dd2de95b8c0cd1.1591867332.git-series.maxime@cerno.tech
2020-07-06Merge tag 'renesas-arm-dt-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dtArnd Bergmann27-161/+1687
Renesas ARM DT updates for v5.9 - Increase support for the Renesas RZ/G1H SoC on the iWave RainboW Qseven board (G21D), and its camera expansion board, - IPMMU support for R-Car M3-W+, - Support for Rev.3.0/4.0 of the HopeRun HiHope RZ/G2M and RZ/G2N boards, - Minor fixes and improvements. * tag 'renesas-arm-dt-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (36 commits) ARM: dts: r8a7778: Enable IRLM setup via DT arm64: dts: renesas: Add HiHope RZ/G2N Rev2.0/3.0/4.0 board with idk-1110wr display arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 sub board support arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 board with idk-1110wr display arm64: dts: renesas: hihope-rzg2-ex: Separate out lvds specific nodes into common file arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 sub board support arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board support arm64: dts: renesas: Add HiHope RZ/G2M[N] Rev.3.0/4.0 specific into common file arm64: dts: renesas: hihope-common: Separate out Rev.2.0 specific into hihope-rev2.dtsi file arm64: dts: renesas: r8a774b1-hihope-rzg2n[-ex]: Rename HiHope RZ/G2N boards arm64: dts: renesas: r8a774a1-hihope-rzg2m[-ex/-ex-idk-1110wr]: Rename HiHope RZ/G2M boards arm64: dts: renesas: r8a77961: Add IPMMU nodes ARM: dts: r8a7742: Add MSIOF[0123] support ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add device tree for camera DB ARM: dts: r8a7742: Add CMT SoC specific support ARM: dts: r8a7742: Add thermal device to DT ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec ARM: dts: r8a7742: Add audio support ... Link: https://lore.kernel.org/r/20200703120642.5128-3-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-06Merge tag 'renesas-arm-defconfig-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfigArnd Bergmann3-5/+18
Renesas ARM defconfig updates for v5.9 - Refresh shmobile_defconfig for v5.8-rc1 - Enable additional support for Renesas platforms to shmobile_defconfig, multi_v7_defconfig, and the arm64 defconfig. * tag 'renesas-arm-defconfig-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: defconfig: Enable additional support for Renesas platforms ARM: multi_v7_defconfig: Enable additional support for Renesas platforms ARM: shmobile: defconfig: Enable RZ/A1H RTC support ARM: shmobile: defconfig: Enable ADV7612 CEC support ARM: shmobile: defconfig: Enable RZ/A1 CEU support ARM: shmobile: defconfig: Enable RZ/A watchdog support ARM: shmobile: defconfig: Enable CAT9554 support ARM: shmobile: defconfig: Enable DA9063 ONKEY support ARM: shmobile: defconfig: Refresh for v5.8-rc1 Link: https://lore.kernel.org/r/20200703120642.5128-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-06ARM: configs: sunxi: Enable LimaMaxime Ripard1-0/+1
Lima is fairly stable now, so let's enable it by default. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-7-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Add DRM output-related optionsMaxime Ripard1-0/+7
We're missing a bunch of options related to the DRM driver options (panels, HDMI, CEC) that seems useful. Let's add them in the defconfig. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-5-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Enable ASoC optionsMaxime Ripard1-0/+3
Most of our ASoC drivers were left out of the defconfig. Let's add them. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-6-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Enable CedrusMaxime Ripard1-0/+4
Let's enable the staging related options and Cedrus in our defconfig. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-4-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Enable the deinterlace and rotation enginesMaxime Ripard1-0/+3
We've had drivers for the deinterlace and rotation engines for a while now, let's enable them in the defconfig. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-3-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Enable the CSI driversMaxime Ripard1-0/+4
We've had CSI drivers for the older and newer SoCs for a while now, let's enable them in the defconfig. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200705091904.42795-2-maxime@cerno.tech Acked-by: Chen-Yu Tsai <wens@csie.org>
2020-07-06ARM: configs: sunxi: Run savedefconfigMaxime Ripard1-15/+7
We haven't run savedefconfig for a while and some options have moved around. In order to ease the patch application / conflict resolution, let's run it. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200705091904.42795-1-maxime@cerno.tech
2020-07-06powerpc: Drop CONFIG_MTD_M25P80 in 85xx-hw.configBin Meng1-1/+0
Drop CONFIG_MTD_M25P80 that was removed in commit b35b9a10362d ("mtd: spi-nor: Move m25p80 code in spi-nor.c") Signed-off-by: Bin Meng <bin.meng@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1588394694-517-1-git-send-email-bmeng.cn@gmail.com
2020-07-06ARM: dts sunxi: Relax a bit the CMA pool allocation rangeMaxime Ripard3-3/+3
The hardware codec on the A10, A10s, A13 and A20 needs buffer in the first 256MB of RAM. This was solved by setting the CMA pool at a fixed address in that range. However, in recent kernels there's something else that comes in and reserve some range that end up conflicting with our default pool requirement, and thus makes its reservation fail. The video codec will then use buffers from the usual default pool, outside of the range it can access, and will fail to decode anything. Since we're only concerned about that 256MB, we can however relax the allocation to just specify the range that's allowed, and not try to enforce a specific address. Fixes: 5949bc5602cc ("ARM: dts: sun4i-a10: Add Video Engine and reserved memory nodes") Fixes: 960432010156 ("ARM: dts: sun5i: Add Video Engine and reserved memory nodes") Fixes: c2a641a74850 ("ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes") Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200704130829.34297-1-maxime@cerno.tech
2020-07-06KVM: arm64: Stop clobbering x0 for HVC_SOFT_RESTARTAndrew Scull1-4/+7
HVC_SOFT_RESTART is given values for x0-2 that it should installed before exiting to the new address so should not set x0 to stub HVC success or failure code. Fixes: af42f20480bf1 ("arm64: hyp-stub: Zero x0 on successful stub handling") Cc: stable@vger.kernel.org Signed-off-by: Andrew Scull <ascull@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200706095259.1338221-1-ascull@google.com
2020-07-06KVM: arm64: PMU: Fix per-CPU access in preemptible contextMarc Zyngier1-1/+6
Commit 07da1ffaa137 ("KVM: arm64: Remove host_cpu_context member from vcpu structure") has, by removing the host CPU context pointer, exposed that kvm_vcpu_pmu_restore_guest is called in preemptible contexts: [ 266.932442] BUG: using smp_processor_id() in preemptible [00000000] code: qemu-system-aar/779 [ 266.939721] caller is debug_smp_processor_id+0x20/0x30 [ 266.944157] CPU: 2 PID: 779 Comm: qemu-system-aar Tainted: G E 5.8.0-rc3-00015-g8d4aa58b2fe3 #1374 [ 266.954268] Hardware name: amlogic w400/w400, BIOS 2020.04 05/22/2020 [ 266.960640] Call trace: [ 266.963064] dump_backtrace+0x0/0x1e0 [ 266.966679] show_stack+0x20/0x30 [ 266.969959] dump_stack+0xe4/0x154 [ 266.973338] check_preemption_disabled+0xf8/0x108 [ 266.977978] debug_smp_processor_id+0x20/0x30 [ 266.982307] kvm_vcpu_pmu_restore_guest+0x2c/0x68 [ 266.986949] access_pmcr+0xf8/0x128 [ 266.990399] perform_access+0x8c/0x250 [ 266.994108] kvm_handle_sys_reg+0x10c/0x2f8 [ 266.998247] handle_exit+0x78/0x200 [ 267.001697] kvm_arch_vcpu_ioctl_run+0x2ac/0xab8 Note that the bug was always there, it is only the switch to using percpu accessors that made it obvious. The fix is to wrap these accesses in a preempt-disabled section, so that we sample a coherent context on trap from the guest. Fixes: 435e53fb5e21 ("arm64: KVM: Enable VHE support for :G/:H perf event modifiers") Cc:: Andrew Murray <amurray@thegoodpenguin.co.uk> Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-07-06ARM: OMAP2: Use custom soc attribute group instead of device_create_fileSudeep Holla1-4/+8
Commit c31e73121f4c ("base: soc: Handle custom soc information sysfs entries") introduced custom soc attribute group in soc_device_attribute structure but there are no users treewide. While trying to understand the motivation and tried to use it, it was found lot of existing custom attributes can moved to use it instead of device_create_file. Though most of these never remove/cleanup the custom attribute as they never call soc_device_unregister, using these custom attribute group eliminate the need for any cleanup as the driver infrastructure will take care of that. Let us remove device_create_file and start using the custom attribute group in soc_device_attribute. Link: https://lore.kernel.org/r/20200523170859.50003-9-sudeep.holla@arm.com Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06ARM: OMAP2: Switch to use DEVICE_ATTR_RO()Sudeep Holla1-6/+4
Move device attributes to DEVICE_ATTR_RO() as that would make things a lot more "obvious" what is happening over the existing __ATTR usage. Link: https://lore.kernel.org/r/20200523170859.50003-8-sudeep.holla@arm.com Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-07-06arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8VOndrej Jirman1-1/+1
Some outputs from the RTL8723CS are connected to the PL port (BT_WAKE_AP), which runs at 1.8V. When BT_WAKE_AP is high, the PL pin this signal is connected to is overdriven, and the whole PL port's voltage rises somewhat. This results in changing voltage on the R_PWM pin (PL10), which is the cause for backlight flickering very noticeably when typing on a Bluetooth keyboard, because backlight intensity is highly sensitive to the voltage of the R_PWM pin. Limit the maximum WiFi/BT I/O voltage to 1.8V to avoid overdriving the PL port pins via BT and WiFi IO port signals. WiFi and BT functionality is unaffected by this change. This completely stops the backlight flicker when using bluetooth. Fixes: 91f480d40942 ("arm64: dts: allwinner: Add initial support for Pine64 PinePhone") Signed-off-by: Ondrej Jirman <megous@megous.com> Link: https://lore.kernel.org/r/20200703194842.111845-4-megous@megous.com Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-07-06arm64: dts: allwinner: Add support for PinePhone revision 1.2Ondrej Jirman3-1/+42
Revision 1.2 should be the final production version of the PinePhone. It has most of the known HW quirks fixed. Interrupt to the magnetometer is routed correctly, in this revision. The bulk of the changes are in how modem and the USB-C HDMI bridge chip is powered and where the signals from the modem are connected. Also backlight intensity seemingly behaves differently, than on the 1.1 and 1.0 boards, and the PWM duty cycle where backlight starts to work is 10% (as tested on 2 1.2 PinePhones I have access to). Signed-off-by: Ondrej Jirman <megous@megous.com> Link: https://lore.kernel.org/r/20200703194842.111845-3-megous@megous.com Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-07-05KVM: arm64: Rename HSR to ESRGavin Shan7-60/+60
kvm/arm32 isn't supported since commit 541ad0150ca4 ("arm: Remove 32bit KVM host support"). So HSR isn't meaningful since then. This renames HSR to ESR accordingly. This shouldn't cause any functional changes: * Rename kvm_vcpu_get_hsr() to kvm_vcpu_get_esr() to make the function names self-explanatory. * Rename variables from @hsr to @esr to make them self-explanatory. Note that the renaming on uapi and tracepoint will cause ABI changes, which we should avoid. Specificly, there are 4 related source files in this regard: * arch/arm64/include/uapi/asm/kvm.h (struct kvm_debug_exit_arch::hsr) * arch/arm64/kvm/handle_exit.c (struct kvm_debug_exit_arch::hsr) * arch/arm64/kvm/trace_arm.h (tracepoints) * arch/arm64/kvm/trace_handle_exit.h (tracepoints) Signed-off-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Andrew Scull <ascull@google.com> Link: https://lore.kernel.org/r/20200630015705.103366-1-gshan@redhat.com
2020-07-05KVM: arm64: Drop long gone function parameter documentationPeng Hao1-1/+0
update_vmid() just has one parameter "vmid".The other parameter "kvm" is no longer used. Signed-off-by: Peng Hao <richard.peng@oppo.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200701120709.388377-1-richard.peng@oppo.com
2020-07-05x86/ldt: use "pr_info_once()" instead of open-coding it badlyLinus Torvalds1-10/+1
Using a mutex for "print this warning only once" is so overdesigned as to be actively offensive to my sensitive stomach. Just use "pr_info_once()" that already does this, although in a (harmlessly) racy manner that can in theory cause the message to be printed twice if more than one CPU races on that "is this the first time" test. [ If somebody really cares about that harmless data race (which sounds very unlikely indeed), that person can trivially fix printk_once() by using a simple atomic access, preferably with an optimistic non-atomic test first before even bothering to treat the pointless "make sure it is _really_ just once" case. A mutex is most definitely never the right primitive to use for something like this. ] Yes, this is a small and meaningless detail in a code path that hardly matters. But let's keep some code quality standards here, and not accept outrageously bad code. Link: https://lore.kernel.org/lkml/CAHk-=wgV9toS7GU3KmNpj8hCS9SeF+A0voHS8F275_mgLhL4Lw@mail.gmail.com/ Cc: Andy Lutomirski <luto@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-07-05x86/entry/32: Fix XEN_PV build dependencyIngo Molnar1-2/+2
xenpv_exc_nmi() and xenpv_exc_debug() are only defined on 64-bit kernels, but they snuck into the 32-bit build via <asm/identry.h>, causing the link to fail: ld: arch/x86/entry/entry_32.o: in function `asm_xenpv_exc_nmi': (.entry.text+0x817): undefined reference to `xenpv_exc_nmi' ld: arch/x86/entry/entry_32.o: in function `asm_xenpv_exc_debug': (.entry.text+0x827): undefined reference to `xenpv_exc_debug' Only use them on 64-bit kernels. Fixes: f41f0824224e: ("x86/entry/xen: Route #DB correctly on Xen PV") Cc: Andy Lutomirski <luto@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-05Merge tag 'x86-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds12-64/+196
Pull x86 fixes from Thomas Gleixner: "A series of fixes for x86: - Reset MXCSR in kernel_fpu_begin() to prevent using a stale user space value. - Prevent writing MSR_TEST_CTRL on CPUs which are not explicitly whitelisted for split lock detection. Some CPUs which do not support it crash even when the MSR is written to 0 which is the default value. - Fix the XEN PV fallout of the entry code rework - Fix the 32bit fallout of the entry code rework - Add more selftests to ensure that these entry problems don't come back. - Disable 16 bit segments on XEN PV. It's not supported because XEN PV does not implement ESPFIX64" * tag 'x86-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/ldt: Disable 16-bit segments on Xen PV x86/entry/32: Fix #MC and #DB wiring on x86_32 x86/entry/xen: Route #DB correctly on Xen PV x86/entry, selftests: Further improve user entry sanity checks x86/entry/compat: Clear RAX high bits on Xen PV SYSENTER selftests/x86: Consolidate and fix get/set_eflags() helpers selftests/x86/syscall_nt: Clear weird flags after each test selftests/x86/syscall_nt: Add more flag combinations x86/entry/64/compat: Fix Xen PV SYSENTER frame setup x86/entry: Move SYSENTER's regs->sp and regs->flags fixups into C x86/entry: Assert that syscalls are on the right stack x86/split_lock: Don't write MSR_TEST_CTRL on CPUs that aren't whitelisted x86/fpu: Reset MXCSR to default in kernel_fpu_begin()
2020-07-05KVM: arm64: vgic-its: Change default outer cacheability for {PEND, PROP}BASERAlexander Graf1-1/+1
PENDBASER and PROPBASER define the outer caching mode for LPI tables. The memory backing them may not be outer sharable, so we mark them as nC by default. This however, breaks Windows on ARM which only accepts SameAsInner or RaWaWb as values for outer cachability. We do today already allow the outer mode to be set to SameAsInner explicitly, so the easy fix is to default to that instead of nC for situations when an OS asks for a not fulfillable cachability request. This fixes booting Windows in KVM with vgicv3 and ITS enabled for me. Signed-off-by: Alexander Graf <graf@amazon.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200701140206.8664-1-graf@amazon.com
2020-07-05KVM: arm64: Lift instrumentation restrictions on VHEDavid Brazdil1-8/+0
With VHE and nVHE executable code completely separated, remove build config that disabled GCOV/KASAN/UBSAN/KCOV instrumentation for VHE as these now execute under the same memory mappings as the rest of the kernel. No violations are currently being reported by either KASAN or UBSAN. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-16-dbrazdil@google.com
2020-07-05KVM: arm64: Remove __hyp_text macro, use build rules insteadDavid Brazdil17-147/+132
With nVHE code now fully separated from the rest of the kernel, the effects of the __hyp_text macro (which had to be applied on all nVHE code) can be achieved with build rules instead. The macro used to: (a) move code to .hyp.text ELF section, now done by renaming .text using `objcopy`, and (b) `notrace` and `__noscs` would negate effects of CC_FLAGS_FTRACE and CC_FLAGS_SCS, respectivelly, now those flags are erased from KBUILD_CFLAGS (same way as in EFI stub). Note that by removing __hyp_text from code shared with VHE, all VHE code is now compiled into .text and without `notrace` and `__noscs`. Use of '.pushsection .hyp.text' removed from assembly files as this is now also covered by the build rules. For MAINTAINERS: if needed to re-run, uses of macro were removed with the following command. Formatting was fixed up manually. find arch/arm64/kvm/hyp -type f -name '*.c' -o -name '*.h' \ -exec sed -i 's/ __hyp_text//g' {} + Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-15-dbrazdil@google.com
2020-07-05KVM: arm64: Compile remaining hyp/ files for both VHE/nVHEDavid Brazdil4-44/+7
The following files in hyp/ contain only code shared by VHE/nVHE: vgic-v3-sr.c, aarch32.c, vgic-v2-cpuif-proxy.c, entry.S, fpsimd.S Compile them under both configurations. Deletions in image-vars.h reflect eliminated dependencies of nVHE code on the rest of the kernel. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-14-dbrazdil@google.com
2020-07-05KVM: arm64: Duplicate hyp/timer-sr.c for VHE/nVHEDavid Brazdil7-9/+19
timer-sr.c contains a HVC handler for setting CNTVOFF_EL2 and two helper functions for controlling access to physical counter. The former is used by both VHE/nVHE and is duplicated, the latter are used only by nVHE and moved to nvhe/timer-sr.c. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-13-dbrazdil@google.com
2020-07-05KVM: arm64: Split hyp/sysreg-sr.c to VHE/nVHEDavid Brazdil12-164/+191
sysreg-sr.c contains KVM's code for saving/restoring system registers, with some code shared between VHE/nVHE. These common routines are moved to a header file, VHE-specific code is moved to vhe/sysreg-sr.c and nVHE-specific code to nvhe/sysreg-sr.c. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-12-dbrazdil@google.com
2020-07-05KVM: arm64: Split hyp/debug-sr.c to VHE/nVHEDavid Brazdil7-74/+118
debug-sr.c contains KVM's code for context-switching debug registers, with some code shared between VHE/nVHE. These common routines are moved to a header file, VHE-specific code is moved to vhe/debug-sr.c and nVHE-specific code to nvhe/debug-sr.c. Functions are slightly refactored to move code hidden behind `has_vhe()` checks to the corresponding .c files. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-11-dbrazdil@google.com
2020-07-05KVM: arm64: Split hyp/switch.c to VHE/nVHEDavid Brazdil13-952/+1048
switch.c implements context-switching for KVM, with large parts shared between VHE/nVHE. These common routines are moved to a header file, VHE-specific code is moved to vhe/switch.c and nVHE-specific code is moved to nvhe/switch.c. Previously __kvm_vcpu_run needed a different symbol name for VHE/nVHE. This is cleaned up and the caller in arm.c simplified. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-10-dbrazdil@google.com
2020-07-05KVM: arm64: Duplicate hyp/tlb.c for VHE/nVHEDavid Brazdil6-100/+177
tlb.c contains code for flushing the TLB, with code shared between VHE/nVHE. Because common code is small, duplicate tlb.c and specialize each copy for VHE/nVHE. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-9-dbrazdil@google.com
2020-07-05KVM: arm64: Move hyp-init.S to nVHEAndrew Scull5-8/+10
hyp-init.S contains the identity mapped initialisation code for the non-VHE code that runs at EL2. It is only used for non-VHE. Adjust code that calls into this to use the prefixed symbol name. Signed-off-by: Andrew Scull <ascull@google.com> Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-8-dbrazdil@google.com
2020-07-05KVM: arm64: Build hyp-entry.S separately for VHE/nVHEDavid Brazdil8-17/+48
hyp-entry.S contains implementation of KVM hyp vectors. This code is mostly shared between VHE/nVHE, therefore compile it under both VHE and nVHE build rules. nVHE-specific host HVC handler is hidden behind __KVM_NVHE_HYPERVISOR__. Adjust code which selects which KVM hyp vecs to install to choose the correct VHE/nVHE symbol. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-7-dbrazdil@google.com
2020-07-05KVM: arm64: Handle calls to prefixed hyp functionsAndrew Scull3-3/+59
Once hyp functions are moved to a hyp object, they will have prefixed symbols. This change declares and gets the address of the prefixed version for calls to the hyp functions. To aid migration, the hyp functions that have not yet moved have their prefixed versions aliased to their non-prefixed version. This begins with all the hyp functions being listed and will reduce to none of them once the migration is complete. Signed-off-by: Andrew Scull <ascull@google.com> [David: Extracted kvm_call_hyp nVHE branches into own helper macros, added comments around symbol aliases.] Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-6-dbrazdil@google.com
2020-07-05KVM: arm64: Use build-time defines in has_vhe()David Brazdil1-3/+10
Build system compiles hyp code with macros specifying if the code belongs to VHE or nVHE. Use these macros to evaluate has_vhe() at compile time. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-5-dbrazdil@google.com
2020-07-05KVM: arm64: Add build rules for separate VHE/nVHE object filesDavid Brazdil4-3/+72
Add new folders arch/arm64/kvm/hyp/{vhe,nvhe} and Makefiles for building code that runs in EL2 under VHE/nVHE KVM, repsectivelly. Add an include folder for hyp-specific header files which will include code common to VHE/nVHE. Build nVHE code with -D__KVM_NVHE_HYPERVISOR__, VHE code with -D__KVM_VHE_HYPERVISOR__. Under nVHE compile each source file into a `.hyp.tmp.o` object first, then prefix all its symbols with "__kvm_nvhe_" using `objcopy` and produce a `.hyp.o`. Suffixes were chosen so that it would be possible for VHE and nVHE to share some source files, but compiled with different CFLAGS. The nVHE ELF symbol prefix is added to kallsyms.c as ignored. EL2-only symbols will never appear in EL1 stack traces. Due to symbol prefixing, add a section in image-vars.h for aliases of symbols that are defined in nVHE EL2 and accessed by kernel in EL1 or vice versa. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-4-dbrazdil@google.com
2020-07-05KVM: arm64: Move __smccc_workaround_1_smc to .rodataDavid Brazdil3-16/+33
This snippet of assembly is used by cpu_errata.c to overwrite parts of KVM hyp vector. Move it to its own source file and change its ELF section to .rodata. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-3-dbrazdil@google.com
2020-07-05KVM: arm64: Fix symbol dependency in __hyp_call_panic_nvheDavid Brazdil1-1/+1
__hyp_call_panic_nvhe contains inline assembly which did not declare its dependency on the __hyp_panic_string symbol. The static-declared string has previously been kept alive because of a use in __hyp_call_panic_vhe. Fix this in preparation for separating the source files between VHE and nVHE when the two users land in two different compilation units. The static variable otherwise gets dropped when compiling the nVHE source file, causing an undefined symbol linker error later. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200625131420.71444-2-dbrazdil@google.com
2020-07-05Merge tag 'mips_fixes_5.8_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds3-8/+11
Pull MIPS fixes from Thomas Bogendoerfer: - fix for missing hazard barrier - DT fix for ingenic - DT fix of GPHY names for lantiq - fix usage of smp_processor_id() while preemption is enabled * tag 'mips_fixes_5.8_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Do not use smp_processor_id() in preemptible code MIPS: Add missing EHB in mtc0 -> mfc0 sequence for DSPen MIPS: ingenic: gcw0: Fix HP detection GPIO. MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names