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2022-07-05arm64: dts: Add SFP node for TA 3.0 devicesSean Anderson3-0/+24
This adds an SFP node for Trust Architecture 3.0 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-05arm64: dts: layerscape: Add SFP node for TA 2.1 devicesSean Anderson3-0/+24
This adds an appropriate SFP node for Trust Architecture 2.1 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-05ARM: dts: layerscape: Add SFP node for TA 2.1 devicesSean Anderson1-0/+7
This adds an appropriate SFP node for Trust Architecture 2.1 devices. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-05ARM: dts: ux500: Drop unused i2c power domain supplyLinus Walleij1-5/+0
This regulator supply is replaced by the proper power domain. Reported-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220701225339.814962-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-07-04arm64: defconfig: Enable Allwinner built in CODECsMark Brown1-0/+3
Allwinner provide an audio CODEC as part of their SoCs which is used on a number of designs, enable the driver as part of defconfig in order to improve coverage of this in the various automated testing systems. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220701112213.1765599-1-broonie@kernel.org
2022-07-04arm64: dts: allwinner: a64: orangepi-win: Fix LED node nameSamuel Holland1-1/+1
"status" does not match any pattern in the gpio-leds binding. Rename the node to the preferred pattern. This fixes a `make dtbs_check` error. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702132816.46456-1-samuel@sholland.org
2022-07-04Merge tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds24-173/+251
Pull ARM SoC fixes from Arnd Bergmann: "Another set of minor patches for Arm DTS files and soc specific drivers: - More reference counting bug fixes for DT nodes, and other trivial code fixes - Multiple code fixes for the Arm SCMI firmware driver to improve compatibility with firmware implementations. - A patch series for at91 to address power management issues from using the wrong DT compatible properties. - A series of patches to fix pad settings for NXP imx8mp to leave the configuration untouched from the boot loader - Additional DT fixes for qualcomm and NXP platforms - A boot time fix for stm32mp15 DT - Konrad Dybcio becomes an additional reviewer for the Qualcomm platforms" * tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits) soc: qcom: smem: use correct format characters ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 ARM: dts: stm32: fix pwr regulators references to use scmi soc: ixp4xx/npe: Fix unused match warning ARM: at91: pm: Mark at91_pm_secure_init as __init ARM: at91: fix soc detection for SAM9X60 SiPs ARM: dts: at91: sama5d2_icp: fix eeprom compatibles ARM: dts: at91: sam9x60ek: fix eeprom compatible and size ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt ARM: at91: pm: use proper compatible for sama5d2's rtc arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo firmware: arm_scmi: Remove usage of the deprecated ida_simple_xxx API firmware: arm_scmi: Fix response size warning for OPTEE transport arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings ...
2022-07-04m68k: q40: Align '*' in commentsJiang Jian1-1/+1
The '*' in the comment is not aligned. Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Link: https://lore.kernel.org/r/20220621050627.13666-1-jiangjian@cdjrlc.com Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2022-07-04arm64: topology: Remove redundant setting of llc_id in CPU topologySudeep Holla1-14/+0
Since the cacheinfo LLC information is used directly in arch_topology, there is no need to parse and fetch the LLC ID information only for ACPI systems. Just drop the redundant parsing and setting of llc_id in CPU topology from ACPI PPTT. Link: https://lore.kernel.org/r/20220704101605.1318280-12-sudeep.holla@arm.com Cc: Will Deacon <will@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Ionela Voinescu <ionela.voinescu@arm.com> Tested-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Gavin Shan <gshan@redhat.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-07-04arm64: dts: rockchip: enable hdmi tx audio on rock-3aMichael Riesch1-0/+8
Enable the I2S0 controller and the hdmi-sound node on the Radxa ROCK3 Model A. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220614230354.3756364-2-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-07-04arm64: dts: rockchip: enable hdmi tx audio on rk3568-evb1-v10Michael Riesch1-0/+8
Enable the I2S0 controller and the hdmi-sound node on the Rockchip RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220614230354.3756364-1-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-07-04Merge tag 'omap-for-v5.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/socArnd Bergmann4-3/+9
SoC changes omaps for v5.20 merge window SoC changes omaps mostly for missing of_node_put() calls and cosmetic Kconfig changes. These can be all merged when suitable, there is no urgent need to merge this as fixes. * tag 'omap-for-v5.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Kconfig: Fix indentation ARM: OMAP2+: Fix refcount leak in omap3xxx_prm_late_init ARM: OMAP2+: pdata-quirks: Fix refcount leak bug ARM: OMAP2+: display: Fix refcount leak bug ARM: OMAP2+: Fix refcount leak in omapdss_init_of Link: https://lore.kernel.org/r/pull-1656918583-2801@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04Merge tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dtArnd Bergmann1-0/+4
Devicetree changes omaps for v5.20 merge window Just one devicetree change to add EEPROM regulator for BeagleBone Black. * tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black Link: https://lore.kernel.org/r/pull-1656918942-515224@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixesArnd Bergmann6-3/+71
STM32 DT fixes for v5.19, round 2 Highlights: ----------- -Fixes STM32MP15: - Add missing usbh clock and fix clk order for usbh to avoid PLL issue. - Fix SCMI version: use scmi regulator and update missing SCMI clocks to be able to correcly boot. * tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 ARM: dts: stm32: fix pwr regulators references to use scmi Link: https://lore.kernel.org/r/1259e082-a3a4-96a5-ec9c-05dbb893a746@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-04arm64: fix oops in concurrently setting insn_emulation sysctlshaibinzhang (张海斌)1-4/+5
emulation_proc_handler() changes table->data for proc_dointvec_minmax and can generate the following Oops if called concurrently with itself: | Unable to handle kernel NULL pointer dereference at virtual address 0000000000000010 | Internal error: Oops: 96000006 [#1] SMP | Call trace: | update_insn_emulation_mode+0xc0/0x148 | emulation_proc_handler+0x64/0xb8 | proc_sys_call_handler+0x9c/0xf8 | proc_sys_write+0x18/0x20 | __vfs_write+0x20/0x48 | vfs_write+0xe4/0x1d0 | ksys_write+0x70/0xf8 | __arm64_sys_write+0x20/0x28 | el0_svc_common.constprop.0+0x7c/0x1c0 | el0_svc_handler+0x2c/0xa0 | el0_svc+0x8/0x200 To fix this issue, keep the table->data as &insn->current_mode and use container_of() to retrieve the insn pointer. Another mutex is used to protect against the current_mode update but not for retrieving insn_emulation as table->data is no longer changing. Co-developed-by: hewenliang <hewenliang4@huawei.com> Signed-off-by: hewenliang <hewenliang4@huawei.com> Signed-off-by: Haibin Zhang <haibinzhang@tencent.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220128090324.2727688-1-hewenliang4@huawei.com Link: https://lore.kernel.org/r/9A004C03-250B-46C5-BF39-782D7551B00E@tencent.com Signed-off-by: Will Deacon <will@kernel.org>
2022-07-04powerpc/powernv: delay rng platform device creation until later in bootJason A. Donenfeld1-6/+10
The platform device for the rng must be created much later in boot. Otherwise it tries to connect to a parent that doesn't yet exist, resulting in this splat: [ 0.000478] kobject: '(null)' ((____ptrval____)): is not initialized, yet kobject_get() is being called. [ 0.002925] [c000000002a0fb30] [c00000000073b0bc] kobject_get+0x8c/0x100 (unreliable) [ 0.003071] [c000000002a0fba0] [c00000000087e464] device_add+0xf4/0xb00 [ 0.003194] [c000000002a0fc80] [c000000000a7f6e4] of_device_add+0x64/0x80 [ 0.003321] [c000000002a0fcb0] [c000000000a800d0] of_platform_device_create_pdata+0xd0/0x1b0 [ 0.003476] [c000000002a0fd00] [c00000000201fa44] pnv_get_random_long_early+0x240/0x2e4 [ 0.003623] [c000000002a0fe20] [c000000002060c38] random_init+0xc0/0x214 This patch fixes the issue by doing the platform device creation inside of machine_subsys_initcall. Fixes: f3eac426657d ("powerpc/powernv: wire up rng during setup_arch") Cc: stable@vger.kernel.org Reported-by: Sachin Sant <sachinp@linux.ibm.com> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Tested-by: Sachin Sant <sachinp@linux.ibm.com> [mpe: Change "of node" to "platform device" in change log] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220630121654.1939181-1-Jason@zx2c4.com
2022-07-04perf/x86/intel: Fix PEBS data source encoding for ADLKan Liang3-14/+45
The PEBS data source encoding for the e-core is different from the p-core. Add the pebs_data_source[] in the struct x86_hybrid_pmu to store the data source encoding for each type of the core. Add intel_pmu_pebs_data_source_grt() for the e-core. There is nothing changed for the data source encoding of the p-core, which still reuse the intel_pmu_pebs_data_source_skl(). Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support") Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20220629150840.2235741-2-kan.liang@linux.intel.com
2022-07-04perf/x86/intel: Fix PEBS memory access info encoding for ADLKan Liang3-33/+60
The PEBS memory access latency encoding for the e-core is slightly different from the p-core. The bit 4 is Lock, while the bit 5 is TLB access. Add a new flag to indicate the load/store latency event on a hybrid platform. Add a new function pointer to retrieve the latency data for a hybrid platform. Only implement the new flag and function for the e-core on ADL. Still use the existing PERF_X86_EVENT_PEBS_LDLAT/STLAT flag for the p-core on ADL. Factor out pebs_set_tlb_lock() to set the generic memory data source information of the TLB access and lock for both load and store latency. Move the intel_get_event_constraints() to ahead of the :ppp check, otherwise the new flag never gets a chance to be set for the :ppp events. Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support") Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20220629150840.2235741-1-kan.liang@linux.intel.com
2022-07-04ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15Fabrice Gasnier1-2/+2
The USBH composed of EHCI and OHCI controllers needs the PHY clock to be initialized first, before enabling (gating) them. The reverse is also required when going to suspend. So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL gets enabled 1st upon controller init. Upon suspend/resume, this also makes the clock to be disabled/re-enabled in the correct order. This fixes some IRQ storm conditions seen when going to low-power, due to PHY PLL being disabled before all clocks are cleanly gated. Fixes: 949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c") Fixes: db7be2cb87ae ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMIGabriel Fernandez1-0/+6
Delete the node fixed clock managed by secure world with SCMI. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 boardGabriel Fernandez2-0/+8
LSE clock is provided by SCMI. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: use the correct clock source for CEC on stm32mp151Gabriel Fernandez1-1/+1
The peripheral clock of CEC is not LSE but CEC. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: stm32: fix pwr regulators references to use scmiEtienne Carriere3-0/+54
Fixes stm32mp15*-scmi DTS files introduced in [1] to also access PWR regulators through SCMI service. This is needed since enabling secure only access to RCC clock and reset controllers also enables secure access only on PWR voltage regulators reg11, reg18 and usb33 hence these must also be accessed through SCMI Voltage Domain protocol. This change applies on commit [2] that already corrects issues from commit [1]. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Link: [1] https://lore.kernel.org/linux-arm-kernel/20220422150952.20587-7-alexandre.torgue@foss.st.com Link: [2] https://lore.kernel.org/linux-arm-kernel/20220613071920.5463-1-alexandre.torgue@foss.st.com Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-07-04ARM: dts: lan966x: Add mcan1 node.Kavyasree Kotagiri1-0/+15
Add the mcan1 node. By default, keep it disabled. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220627110552.26315-1-kavyasree.kotagiri@microchip.com
2022-07-04ARM: dts: am33xx: Fix MMCHS0 dma propertiesYuTong Chang1-2/+1
According to technical manual(table 11-24), the DMA of MMCHS0 should be direct mapped. Fixes: b5e509066074 ("ARM: DTS: am33xx: Use the new DT bindings for the eDMA3") Signed-off-by: YuTong Chang <mtwget@gmail.com> Message-Id: <20220620124146.5330-1-mtwget@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-07-04ARM: dts: at91: sama7g5: add reset-controller nodeClaudiu Beznea1-0/+7
Add reset controller node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220610092414.1816571-10-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: use generic name for reset controllerClaudiu Beznea11-11/+11
Use generic name for reset controller of AT91 devices to comply with DT specifications. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: sama5d2: fix compilation warningClaudiu Beznea5-2/+8
Fix the following compilation warning: arch/arm/boot/dts/sama5d2.dtsi:371.29-382.6: Warning (avoid_unnecessary_addr_size): /ahb/apb/ethernet@f8008000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property also defined at arch/arm/boot/dts/at91-sama5d2_icp.dts:353.8-363.3 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220615080633.1881196-2-claudiu.beznea@microchip.com
2022-07-04ARM: dts: at91: sama5d2: fix compilation warningClaudiu Beznea1-10/+10
Fix the following compilation warning: Warning (simple_bus_reg): /ahb/apb/resistive-touch: missing or empty reg/ranges property Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220615080633.1881196-1-claudiu.beznea@microchip.com
2022-07-03mm: hugetlb: kill set_huge_swap_pte_at()Qi Zheng2-20/+17
Commit e5251fd43007 ("mm/hugetlb: introduce set_huge_swap_pte_at() helper") add set_huge_swap_pte_at() to handle swap entries on architectures that support hugepages consisting of contiguous ptes. And currently the set_huge_swap_pte_at() is only overridden by arm64. set_huge_swap_pte_at() provide a sz parameter to help determine the number of entries to be updated. But in fact, all hugetlb swap entries contain pfn information, so we can find the corresponding folio through the pfn recorded in the swap entry, then the folio_size() is the number of entries that need to be updated. And considering that users will easily cause bugs by ignoring the difference between set_huge_swap_pte_at() and set_huge_pte_at(). Let's handle swap entries in set_huge_pte_at() and remove the set_huge_swap_pte_at(), then we can call set_huge_pte_at() anywhere, which simplifies our coding. Link: https://lkml.kernel.org/r/20220626145717.53572-1-zhengqi.arch@bytedance.com Signed-off-by: Qi Zheng <zhengqi.arch@bytedance.com> Acked-by: Muchun Song <songmuchun@bytedance.com> Cc: Mike Kravetz <mike.kravetz@oracle.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03mm: shrinkers: provide shrinkers with namesRoman Gushchin1-1/+1
Currently shrinkers are anonymous objects. For debugging purposes they can be identified by count/scan function names, but it's not always useful: e.g. for superblock's shrinkers it's nice to have at least an idea of to which superblock the shrinker belongs. This commit adds names to shrinkers. register_shrinker() and prealloc_shrinker() functions are extended to take a format and arguments to master a name. In some cases it's not possible to determine a good name at the time when a shrinker is allocated. For such cases shrinker_debugfs_rename() is provided. The expected format is: <subsystem>-<shrinker_type>[:<instance>]-<id> For some shrinkers an instance can be encoded as (MAJOR:MINOR) pair. After this change the shrinker debugfs directory looks like: $ cd /sys/kernel/debug/shrinker/ $ ls dquota-cache-16 sb-devpts-28 sb-proc-47 sb-tmpfs-42 mm-shadow-18 sb-devtmpfs-5 sb-proc-48 sb-tmpfs-43 mm-zspool:zram0-34 sb-hugetlbfs-17 sb-pstore-31 sb-tmpfs-44 rcu-kfree-0 sb-hugetlbfs-33 sb-rootfs-2 sb-tmpfs-49 sb-aio-20 sb-iomem-12 sb-securityfs-6 sb-tracefs-13 sb-anon_inodefs-15 sb-mqueue-21 sb-selinuxfs-22 sb-xfs:vda1-36 sb-bdev-3 sb-nsfs-4 sb-sockfs-8 sb-zsmalloc-19 sb-bpf-32 sb-pipefs-14 sb-sysfs-26 thp-deferred_split-10 sb-btrfs:vda2-24 sb-proc-25 sb-tmpfs-1 thp-zero-9 sb-cgroup2-30 sb-proc-39 sb-tmpfs-27 xfs-buf:vda1-37 sb-configfs-23 sb-proc-41 sb-tmpfs-29 xfs-inodegc:vda1-38 sb-dax-11 sb-proc-45 sb-tmpfs-35 sb-debugfs-7 sb-proc-46 sb-tmpfs-40 [roman.gushchin@linux.dev: fix build warnings] Link: https://lkml.kernel.org/r/Yr+ZTnLb9lJk6fJO@castle Reported-by: kernel test robot <lkp@intel.com> Link: https://lkml.kernel.org/r/20220601032227.4076670-4-roman.gushchin@linux.dev Signed-off-by: Roman Gushchin <roman.gushchin@linux.dev> Cc: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Cc: Dave Chinner <dchinner@redhat.com> Cc: Hillf Danton <hdanton@sina.com> Cc: Kent Overstreet <kent.overstreet@gmail.com> Cc: Muchun Song <songmuchun@bytedance.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03riscv/mm: fix build error while PAGE_TABLE_CHECK enabled without MMUYueHaibing1-1/+1
mm/page_table_check.c: In function `__page_table_check_pte_clear': mm/page_table_check.c:148:6: error: implicit declaration of function `pte_user_accessible_page'; did you mean `user_access_save'? [-Werror=implicit-function-declaration] if (pte_user_accessible_page(pte)) { ^~~~~~~~~~~~~~~~~~~~~~~~ user_access_save ARCH_SUPPORTS_PAGE_TABLE_CHECK should only enabled with MMU. Link: https://lkml.kernel.org/r/20220624085236.18544-1-yuehaibing@huawei.com Fixes: 3fee229a8eb9 ("riscv/mm: enable ARCH_SUPPORTS_PAGE_TABLE_CHECK") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Pasha Tatashin <pasha.tatashin@soleen.com> Cc: Tong Tiangen <tongtiangen@huawei.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03sh: convert nommu io{re,un}map() to static inline functionsGeert Uytterhoeven1-2/+6
Recently, nommu iounmap() was converted from a static inline function to a macro again, basically reverting commit 4580ba4ad2e6b8dd ("sh: Convert iounmap() macros to inline functions"). With -Werror, this leads to build failures like: drivers/iio/adc/xilinx-ams.c: In function `ams_iounmap_ps': drivers/iio/adc/xilinx-ams.c:1195:14: error: unused variable `ams' [-Werror=unused-variable] 1195 | struct ams *ams = data; | ^~~ Fix this by replacing the macros for ioremap() and iounmap() by static inline functions, based on <asm-generic/io.h>. Link: https://lkml.kernel.org/r/8d1b1766260961799b04035e7bc39a7f59729f72.1655708312.git.geert+renesas@glider.be Fixes: 13f1fc870dd74713 ("sh: move the ioremap implementation out of line") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2022-07-03Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixesArnd Bergmann7-9/+19
Qualcomm ARM64 DT fixes for v5.19 This removes duplicate includes in the sc7180-trogdor files, which accidentally ended up disabling nodes intended to be enabled. It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's interconnects property is updated to match the #interconnect-cells, avoiding sync_state issues and the GIC ITS is defined, to correct the references from the PCIe nodes. On SDM845 the display subsystem's AHB clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2 are correctly specified. Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC. * tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node arm64: dts: qcom: sm8450 add ITS device tree node arm64: dts: qcom: msm8994: Fix CPU6/7 reg values arm64: dts: qcom: sm8450: fix interconnects property of UFS node arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestar Link: https://lore.kernel.org/r/20220703030208.408109-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-02ARM: dts: qcom: Fix sdhci node names - use 'mmc@'Bhupesh Sharma6-11/+11
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Extracted from combined arm64 patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
2022-07-02Merge tag 'qcom-arm64-fixes-for-5.19' into arm64-for-5.20Bjorn Andersson7-9/+19
This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to handle the merge conflict related to the header file changes in sc7180-trogdor.
2022-07-02arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachablesStephen Boyd11-2/+33
Trogdor devices that have a detachable keyboard still have a non-detachable keyboard input device present because we include the cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file that every variant board includes. We do this because the keyboard-controller node also provides some buttons like the power button and volume buttons. Unfortunately, this means we register a keyboard input device that doesn't do anything on boards with a detachable keyboard. Change the node's compatible on detachables to the newly introduced "google,cros-ec-keyb-switches" compatible to indicate that there are only switches and no keyboard to register. Similarly, move the keyboard include that defines the keyboard-controller node out of sc7180-trogdor.dtsi to boards that actually have a keyboard so that the matrix properties are not defined on boards with the switches compatible. Future boards can either use the include approach or the node definition approach to describe a keyboard with possible switches or just some switches. Cc: Benson Leung <bleung@chromium.org> Cc: Guenter Roeck <groeck@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Hsin-Yi Wang <hsinyi@chromium.org> Cc: "Joseph S. Barrera III" <joebar@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220627212802.3593012-1-swboyd@chromium.org
2022-07-02arm64: dts: qcom: ipq8074: fix NAND node nameRobert Marko1-1/+1
Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220621120642.518575-1-robimarko@gmail.com
2022-07-02arm64: dts: qcom: msm8916: add xo clocks to rpmcc and a53pllDmitry Baryshkov1-0/+4
Both a53pll and rpmcc make use of xo as a clock parent. Add it to the respective device nodes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220620010519.1533364-1-dmitry.baryshkov@linaro.org
2022-07-02arm64: dts: qcom: msm8996: add second DSI interfaceDmitry Baryshkov1-0/+73
Add device nodes for the DSI1, second DSI interface found on MSM8996/APQ8096 platforms. For example on db820c it is routed to the secondary HS expansion connector. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220617103652.606250-1-dmitry.baryshkov@linaro.org
2022-07-02arm64: dts: qcom: add mdp_clk clock to the MDSS deviceDmitry Baryshkov1-2/+3
Add MDP_CLK ("core") clock to the mdss device to allow MDSS driver to access HW_REV/etc registers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220615135935.87381-5-dmitry.baryshkov@linaro.org
2022-07-02arm64: dts: qcom: sm8250: Enable per-process page tables.Emma Anholt1-1/+1
This is an SMMU for the adreno gpu, and adding this compatible lets the driver use per-fd page tables, which are required for security between GPU clients. Signed-off-by: Emma Anholt <emma@anholt.net> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [bjorn: Move arm,smmu-500 last, per Dmitry's request] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220614230136.3726047-2-emma@anholt.net
2022-07-02arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen pinctrlLin, Meng-Bo3-16/+8
A3, A5 and most of the Samsung phones with MSM8916 SoC use GPIO pin 13 for touchscreen interrupts. Add touchscreen pinctrl to a2015 common dtsi. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220610175332.104154-1-linmengbo0689@protonmail.com
2022-07-02arm64: dts: qcom: msm8996: drop phy-names from HDMI device nodeDmitry Baryshkov1-1/+0
The HDMI driver doesn't use the phy-names to identify the PHY. Different Qualcomm platforms have used different names for the PHY. So, we are deprecating phy-names propertty of the HDMI device and dropping them from existing DTs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220609122350.3157529-15-dmitry.baryshkov@linaro.org
2022-07-02arm64: dts: qcom: msm8994: add required ranges to OCMEMKrzysztof Kozlowski1-0/+1
The OCMEM bindings require ranges property. Fixes: 9d511d0a7926 ("arm64: dts: qcom: msm8994: Add OCMEM node") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-14-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sdm845: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski1-1/+1
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-13-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski1-1/+1
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-12-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sc7280: add simple-mfd to IMEMKrzysztof Kozlowski1-1/+1
The IMEM node has children (PIL) which should be instantiated with simple-mfd. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-11-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sc7180: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski1-1/+1
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-10-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: qcs404: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski1-1/+1
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-9-krzysztof.kozlowski@linaro.org
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