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2020-03-16KVM: Simplify kvm_free_memslot() and all its descendentsSean Christopherson11-46/+28
Now that all callers of kvm_free_memslot() pass NULL for @dont, remove the param from the top-level routine and all arch's implementations. No functional change intended. Tested-by: Christoffer Dall <christoffer.dall@arm.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Free arrays for old memslot when moving memslot's base gfnSean Christopherson1-0/+4
Explicitly free the metadata arrays (stored in slot->arch) in the old memslot structure when moving the memslot's base gfn is committed. This eliminates x86's dependency on kvm_free_memslot() being called when a memslot move is committed, and paves the way for removing the funky code in kvm_free_memslot() that conditionally frees structures based on its @dont param. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: Drop "const" attribute from old memslot in commit_memory_region()Sean Christopherson4-4/+4
Drop the "const" attribute from @old in kvm_arch_commit_memory_region() to allow arch specific code to free arch specific resources in the old memslot without having to cast away the attribute. Freeing resources in kvm_arch_commit_memory_region() paves the way for simplifying kvm_free_memslot() by eliminating the last usage of its @dont param. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: Drop kvm_arch_create_memslot()Sean Christopherson4-24/+0
Remove kvm_arch_create_memslot() now that all arch implementations are effectively nops. Removing kvm_arch_create_memslot() eliminates the possibility for arch specific code to allocate memory prior to setting a memslot, which sets the stage for simplifying kvm_free_memslot(). Cc: Janosch Frank <frankja@linux.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Allocate memslot resources during prepare_memory_region()Sean Christopherson1-4/+9
Allocate the various metadata structures associated with a new memslot during kvm_arch_prepare_memory_region(), which paves the way for removing kvm_arch_create_memslot() altogether. Moving x86's memory allocation only changes the order of kernel memory allocations between x86 and common KVM code. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: PPC: Move memslot memory allocation into prepare_memory_region()Sean Christopherson6-45/+25
Allocate the rmap array during kvm_arch_prepare_memory_region() to pave the way for removing kvm_arch_create_memslot() altogether. Moving PPC's memory allocation only changes the order of kernel memory allocations between PPC and common KVM code. No functional change intended. Acked-by: Paul Mackerras <paulus@ozlabs.org> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Allocate new rmap and large page tracking when moving memslotSean Christopherson1-0/+11
Reallocate a rmap array and recalcuate large page compatibility when moving an existing memslot to correctly handle the alignment properties of the new memslot. The number of rmap entries required at each level is dependent on the alignment of the memslot's base gfn with respect to that level, e.g. moving a large-page aligned memslot so that it becomes unaligned will increase the number of rmap entries needed at the now unaligned level. Not updating the rmap array is the most obvious bug, as KVM accesses garbage data beyond the end of the rmap. KVM interprets the bad data as pointers, leading to non-canonical #GPs, unexpected #PFs, etc... general protection fault: 0000 [#1] SMP CPU: 0 PID: 1909 Comm: move_memory_reg Not tainted 5.4.0-rc7+ #139 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 0.0.0 02/06/2015 RIP: 0010:rmap_get_first+0x37/0x50 [kvm] Code: <48> 8b 3b 48 85 ff 74 ec e8 6c f4 ff ff 85 c0 74 e3 48 89 d8 5b c3 RSP: 0018:ffffc9000021bbc8 EFLAGS: 00010246 RAX: ffff00617461642e RBX: ffff00617461642e RCX: 0000000000000012 RDX: ffff88827400f568 RSI: ffffc9000021bbe0 RDI: ffff88827400f570 RBP: 0010000000000000 R08: ffffc9000021bd00 R09: ffffc9000021bda8 R10: ffffc9000021bc48 R11: 0000000000000000 R12: 0030000000000000 R13: 0000000000000000 R14: ffff88827427d700 R15: ffffc9000021bce8 FS: 00007f7eda014700(0000) GS:ffff888277a00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007f7ed9216ff8 CR3: 0000000274391003 CR4: 0000000000162eb0 Call Trace: kvm_mmu_slot_set_dirty+0xa1/0x150 [kvm] __kvm_set_memory_region.part.64+0x559/0x960 [kvm] kvm_set_memory_region+0x45/0x60 [kvm] kvm_vm_ioctl+0x30f/0x920 [kvm] do_vfs_ioctl+0xa1/0x620 ksys_ioctl+0x66/0x70 __x64_sys_ioctl+0x16/0x20 do_syscall_64+0x4c/0x170 entry_SYSCALL_64_after_hwframe+0x44/0xa9 RIP: 0033:0x7f7ed9911f47 Code: <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 21 6f 2c 00 f7 d8 64 89 01 48 RSP: 002b:00007ffc00937498 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 0000000001ab0010 RCX: 00007f7ed9911f47 RDX: 0000000001ab1350 RSI: 000000004020ae46 RDI: 0000000000000004 RBP: 000000000000000a R08: 0000000000000000 R09: 00007f7ed9214700 R10: 00007f7ed92149d0 R11: 0000000000000246 R12: 00000000bffff000 R13: 0000000000000003 R14: 00007f7ed9215000 R15: 0000000000000000 Modules linked in: kvm_intel kvm irqbypass ---[ end trace 0c5f570b3358ca89 ]--- The disallow_lpage tracking is more subtle. Failure to update results in KVM creating large pages when it shouldn't, either due to stale data or again due to indexing beyond the end of the metadata arrays, which can lead to memory corruption and/or leaking data to guest/userspace. Note, the arrays for the old memslot are freed by the unconditional call to kvm_free_memslot() in __kvm_set_memory_region(). Fixes: 05da45583de9b ("KVM: MMU: large page support") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Move gpa_val and gpa_available into the emulator contextSean Christopherson3-11/+10
Move the GPA tracking into the emulator context now that the context is guaranteed to be initialized via __init_emulate_ctxt() prior to dereferencing gpa_{available,val}, i.e. now that seeing a stale gpa_available will also trigger a WARN due to an invalid context. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Add EMULTYPE_PF when emulation is triggered by a page faultSean Christopherson3-17/+30
Add a new emulation type flag to explicitly mark emulation related to a page fault. Move the propation of the GPA into the emulator from the page fault handler into x86_emulate_instruction, using EMULTYPE_PF as an indicator that cr2 is valid. Similarly, don't propagate cr2 into the exception.address when it's *not* valid. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: apic: remove unused function apic_lvt_vector()Miaohe Lin1-5/+0
The function apic_lvt_vector() is unused now, remove it. Signed-off-by: Miaohe Lin <linmiaohe@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: VMX: Add 'else' to split mutually exclusive caseMiaohe Lin1-5/+3
Each if branch in handle_external_interrupt_irqoff() is mutually exclusive. Add 'else' to make it clear and also avoid some unnecessary check. Signed-off-by: Miaohe Lin <linmiaohe@huawei.com> Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: eliminate some unreachable codeMiaohe Lin2-4/+0
These code are unreachable, remove them. Signed-off-by: Miaohe Lin <linmiaohe@huawei.com> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com> Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: x86: Fix print format and coding styleMiaohe Lin3-4/+3
Use %u to print u32 var and correct some coding style. Signed-off-by: Miaohe Lin <linmiaohe@huawei.com> Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16KVM: vmx: rewrite the comment in vmx_get_mt_maskChia-I Wu1-10/+17
Better reflect the structure of the code and metion why we could not always honor the guest. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Cc: Gurchetan Singh <gurchetansingh@chromium.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-16arm64: dts: meson: add thermal zones to meson gx devicesChristian Hewitt3-72/+95
Adapt and update current VIM2 thermal zones support so that zones are available on all meson GXBB/GXL/GXM devices - similar to changes made for G12A/G12B/SM1 devices. Suggested-by: Nick Xie <nick@khadas.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1584328854-28575-1-git-send-email-christianshewitt@gmail.com
2020-03-16arm64: dts: meson: khadas-vim3: move model to g12b-khadas-vim3 dtsiChristian Hewitt2-2/+2
The common meson-khadas-vim3.dtsi is now shared with VIM3L so move the VIM3 model name to meson-g12b-khadas-vim3.dtsi. meson-sm1-khadas-vim3l.dts contains the VIM3L model name. changes in v2 - fix typo in commit message Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1583378508-14312-1-git-send-email-christianshewitt@gmail.com
2020-03-16ARM: sa1111: Fix irq_retrigger callback return valueMarc Zyngier1-2/+5
The irq_retrigger callback is supposed to return 0 when retrigger has failed, and a non-zero value otherwise. Tell the core code that the driver has succedded in using the HW to retrigger the interrupt (if ever). Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200310184921.23552-4-maz@kernel.org
2020-03-16irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offlineAtish Patra1-1/+1
Currently, PLIC threshold is only initialized once in the beginning. However, threshold can be set to disabled if a CPU is marked offline with CPU hotplug feature. This will not allow to change the irq affinity to a CPU that just came online. Add PLIC specific CPU hotplug callbacks and enable the threshold when a CPU comes online. Take this opportunity to move the external interrupt enable code from trap init to PLIC driver as well. On cpu offline path, the driver performs the exact opposite operations i.e. disable the interrupt and the threshold. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20200302231146.15530-2-atish.patra@wdc.com
2020-03-16MIPS: c-r4k: Invalidate BMIPS5000 ZSCM prefetch linesKamal Dasu1-0/+29
Zephyr secondary cache is 256KB, 128B lines. 32B sectors. A secondary cache line can contain two instruction cache lines (64B), or four data cache lines (32B). Hardware prefetch Cache detects stream access, and prefetches ahead of processor access. Add support to invalidate BMIPS5000 cpu zephyr secondary cache module (ZSCM) on DMA from device so that data returned is coherent during DMA read operations. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-16MIPS: pass non-NULL dev_id on shared request_irq()afzal mohammed7-13/+14
Recently all usages of setup_irq() was replaced by request_irq(). request_irq() does a few sanity checks that were not done in setup_irq(), if they fail irq registration will fail. One of the check is to ensure that non-NULL dev_id is passed in the case of shared irq. This caused malta on qemu to hang. Fix it by passing handler as dev_id to all request_irq()'s that are shared. For sni, instead of passing non-NULL dev_id, remove shared irq flags. Fixes: ac8fd122e070 ("MIPS: Replace setup_irq() by request_irq()") Reported-by: Nathan Chancellor <natechancellor@gmail.com> Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-17arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channelKunihiko Hayashi3-10/+10
Currently common clock and reset IDs were used, however, each clock and reset ID should be used for each channel. Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-17ARM: dts: uniphier: Set SCSSI clock and reset IDs for each channelKunihiko Hayashi2-4/+4
Currently common clock and reset IDs were used, however, each clock and reset ID should be used for each channel. Pro5 and PXs2 are affected by this fix, but the SCSSI clock gate of Pro5 is common to all channels. Fixes: 92fa4f4cc2cd ("ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16arm64: dts: uniphier: Add nodes of thermal monitor and thermal zone for PXs3Kunihiko Hayashi1-0/+43
Add nodes of thermal monitor and thermal zone for UniPhier PXs3 SoC. The thermal monitor node is included in sysctrl. This patch gives the default value for PXs3 in the same way as LD20. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16arm64: dts: uniphier: Enable spi node for PXs3 reference boardKunihiko Hayashi1-0/+10
PXs3 reference board has 2 spi connectors. This enables spi0 and spi1, and adds aliases properties for each spi to determine device name assignments. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16ARM: dts: uniphier: Add USB3 controller nodes for Pro5Kunihiko Hayashi1-0/+148
Add USB3 controller nodes for Pro5 SoC and the boards. Pro5 SoC has 2 controllers. USB0 includes 1 SS-PHY and 1 HS-PHY, and USB1 includes 1 SS-PHY and 2 HS-PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16floppy: separate the FDC's base address from its registersWilly Tarreau1-1/+1
FDC registers FD_STATUS, FD_DATA, FD_DOR, FD_DIR and FD_DCR used to be defined relative to FD_IOPORT, which is the FDC's base address, itself a macro depending on the "fdc" local or global variable. This patch changes this so that the register macros above now only reference the address offset, and that the FDC's address is explicitly passed in each call to fd_inb() and fd_outb(), thus removing the macro. With this change there is no more implicit usage of the local/global "fdc" variable. One place in the ARM code used to check if the port was equal to FD_DOR, this was changed to testing the register by applying a mask to the port, as was already done in the sparc code. There are still occurrences of fd_inb() and fd_outb() in the PARISC code and these ones remain unaffected since they already used to work with a base address and a register offset. The sparc, m68k and parisc code could now be slightly cleaned up to benefit from the macro definitions above instead of the equivalent hard-coded values. Link: https://lore.kernel.org/r/20200301195555.11154-6-w@1wt.eu Cc: Ian Molton <spyro@f2s.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-03-16floppy: prepare ARM code to simplify base address separationWilly Tarreau1-16/+11
The fd_outb() macro on ARM relies on a special fd_setdor() macro when the register is FD_DOR and both will need to be changed to accept a separate base address. Let's just remerge them to simplify the change and make this code more easily reviewable. Link: https://lore.kernel.org/r/20200301195555.11154-4-w@1wt.eu Cc: Ian Molton <spyro@f2s.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-03-16floppy: remove incomplete support for second FDC from ARM codeWilly Tarreau1-9/+3
The ARM code was written with the apparent hope to one day support a second FDC except that the code was incomplete and only touches the first one, which is also reflected by N_FDC==1. However this made its fd_outb() macro artificially depend on the global or local "fdc" variable. Let's get rid of this and make it explicit it doesn't rely on this variable anymore. Link: https://lore.kernel.org/r/20200301195555.11154-3-w@1wt.eu Cc: Ian Molton <spyro@f2s.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-03-16floppy: remove dead code for drives scanning on ARMWilly Tarreau1-51/+0
On ARM, function fd_scandrives pre-dates Git era, is #ifed 0 out, not used, and cannot even compile since it references an fdc variable that's not declared anywhere (supposed to be the global one that we're turning to current_fdc apparently). There was also an ifdefde out include of mach/floppy.h that does not exist anymore either. Let's get rid of them since they complicate the fixing of the driver. Link: https://lore.kernel.org/r/20200301195555.11154-2-w@1wt.eu Cc: Ian Molton <spyro@f2s.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-03-16openrisc: use the generic in-place uncached DMA allocatorChristoph Hellwig2-45/+12
Switch openrisc to use the dma-direct allocator and just provide the hooks for setting memory uncached or cached. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-03-16dma-direct: provide a arch_dma_clear_uncached hookChristoph Hellwig1-0/+7
This allows the arch code to reset the page tables to cached access when freeing a dma coherent allocation that was set to uncached using arch_dma_set_uncached. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-03-16dma-direct: make uncached_kernel_address more generalChristoph Hellwig9-12/+14
Rename the symbol to arch_dma_set_uncached, and pass a size to it as well as allow an error return. That will allow reusing this hook for in-place pagetable remapping. As the in-place remap doesn't always require an explicit cache flush, also detangle ARCH_HAS_DMA_PREP_COHERENT from ARCH_HAS_DMA_SET_UNCACHED. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-03-16dma-direct: remove the cached_kernel_address hookChristoph Hellwig5-31/+3
dma-direct now finds the kernel address for coherent allocations based on the dma address, so the cached_kernel_address hooks is unused and can be removed entirely. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
2020-03-16arm64: dts: ls1028a: disable the felix switch by defaultMichael Walle4-1/+14
Disable the felix switch by default and enable it per board which are actually using it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8mp: Add snvs clock to powerkeyAnson Huang1-0/+2
SNVS powerkey driver needs snvs clock for proper clock management, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8mn: Add snvs clock to powerkeyAnson Huang1-0/+2
SNVS powerkey driver needs snvs clock for proper clock management, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: Add PCIe controller DT nodesXiaowei Bao1-0/+54
LS1028a implements 2 PCIe 3.0 controllers. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: add support for variant 2Michael Walle2-0/+69
Now that there is support for the Felix switch this variant can also be added. It features two external ports ethernet ports which are connected to the internal switch core. No direct connection to any of the enetc's is supported. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: expose switch ports in KBox A-230-LSMichael Walle1-0/+60
The KBox A-230-LS supports four external ports which are connected to the internal switch of the LS1028A via QSGMII. Now that the Felix switch is supported, add these ports in the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: ls1028a: sl28: fix on-board EEPROMSMichael Walle3-9/+17
The module itself has another EEPROM at 50h on I2C4. The EEPROM on the carriers is located at 57h on I2C3. Fix that in the device trees. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: freescale: sl28: add SPI flashMichael Walle2-0/+15
There is a SPI flash on this carrier connected to the third DSPI controller. Add it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8m: fix aips dts nodePeng Fan4-22/+30
Per binding doc fsl,aips-bus.yaml, compatible and reg is required. And for reg, the AIPS configuration space should be used, not all the AIPS bus space. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-15arm64: defconfig: Enable Qualcomm SDM845 audio configsBjorn Andersson1-0/+11
Enable soundwire, slimbus frameworks, the machine driver and the codec drivers for WCD934x and WSA881x used on varios SDM845 based designs. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200315050827.1575421-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-16ARM: dts: imx6q-marsboard: properly define rgmii PHYOleksij Rempel1-1/+15
The Atheros AR8035 PHY can be autodetected but can't use interrupt support provided on this board. Define MDIO bus and the PHY node to make it work properly. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: imx6dl-riotboard: properly define rgmii PHYOleksij Rempel1-1/+15
The Atheros AR8035 PHY can be autodetected but can't use interrupt support provided on this board. Define MDIO bus and the PHY node to make it work properly. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: imx51-zii-rdu1: set name prefix for TPA6130A2Lucas Stach1-2/+3
Set a sound name prefix for the HPA, as otherwise the sound controls naming will clash with the controls of the DAC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: imx6: RDU2: assign video PLL as input to LDBLucas Stach1-0/+7
Currently we don't ensure that the LDB is clocked from the video PLL and relied on the bootloader to do the correct setup. This isn't always true, in which case we would run with a vastly different video clock than the desired one. Fix this by assigning the proper parent to the LDB. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: vf: toradex: SPDX tags and copyright cleanupIgor Opaniuk7-265/+13
1. Replace boiler plate licenses texts with the SPDX license identifiers in Toradex Vybrid-based SoM device trees. 2. As X11 is identical to the MIT License, but with an extra sentence that prohibits using the copyright holders' names for advertising or promotional purposes without written permission, use MIT license instead of X11 ('s/X11/MIT/g'). 3. Replace "Toradex AG" with "Toradex" in the Copyright notice. 4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all new DTS files. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: imx7: toradex: use SPDX-License-IdentifierIgor Opaniuk6-90/+12
1. Replace boiler plate licenses texts with the SPDX license identifiers in Toradex i.MX7-based SoM device trees. 2. As X11 is identical to the MIT License, but with an extra sentence that prohibits using the copyright holders' names for advertising or promotional purposes without written permission, use MIT license instead of X11 ('s/X11/MIT/g'). 3. Replace "Toradex AG" with "Toradex" in the Copyright notice. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16ARM: dts: imx6: toradex: use SPDX-License-IdentifierIgor Opaniuk6-228/+12
1. Replace boiler plate licenses texts with the SPDX license identifiers in Toradex iMX6-based SoM device trees. 2. As X11 is identical to the MIT License, but with an extra sentence that prohibits using the copyright holders' names for advertising or promotional purposes without written permission, use MIT license instead of X11 ('s/X11/MIT/g'). 3. Replace "Toradex AG" with "Toradex" in the Copyright notice. 4. Use GPL2.0+ instead of GPL2.0, as it's used now by default for all new DTS files from Toradex. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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