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2020-03-13ia64: replace setup_irq() by request_irq()afzal mohammed6-80/+39
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). Changing 'ia64_native_register_percpu_irq' decleration to include 'irq_handler_t' as an argument type in arch/ia64/include/asm/hw_irq.h was causing build error - 'unknown type name 'irq_handler_t'' This was due to below header file sequence, + include/interrupt.h + include/hardirq.h + asm/hardirq.h + include/irq.h + asm/hw_irq.h [ 'ia64_native_register_percpu_irq' declared w/ 'irq_handler_t'] [ 'irq_handler_t' typedef'ed here in 'include/interrupt.h'] 'register_percpu_irq' defined to 'ia64_native_register_percpu_irq' is the one invoked by the caller, not the latter directly. This was done to support paravirtualization which was removed around 4 years back. And 'register_percpu_irq' is invoked only inside 'arch/ia64/kernel'. So 'register_percpu_irq' define to 'ia64_native_register_percpu_irq' is removed, instead 'ia64_native_register_percpu_irq' is renamed to 'register_precpu_irq()' & it is directly invoked. Also, 'register_precpu_irq()' is declared in a new header file 'irq.h' inside 'arch/ia64/kernel/', this header file is included by C files invoking 'register_percpu_irq()'. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2020-03-13arm: mach-dove: Mark dove_io_desc as __maybe_unusedVincenzo Frascino1-1/+1
Without this, we get the warnings below when CONFIG_MMU is disabled: linux/arch/arm/mach-dove/common.c:51:24: warning: ‘dove_io_desc’ defined but not used [-Wunused-variable] static struct map_desc dove_io_desc[] __initdata = { ^~~~~~~~~~~~ Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13ARM: orion: replace setup_irq() by request_irq()afzal mohammed1-7/+3
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13arm64: dts: marvell: espressobin: add ethernet aliasTomasz Maciej Nowak1-0/+6
The maker of this board and its variants, stores MAC address in U-Boot environment. Add alias for bootloader to recognise, to which ethernet node inject the factory MAC address. Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13arm64: dts: mcbin: support 2W SFP modulesRussell King1-0/+3
Allow the SFP cages to be used with 2W SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delayRussell King1-0/+1
If the mv88e6xxx DSA driver is built as a module, it causes the ethernet driver to re-probe when it's loaded. This in turn causes the gigabit PHY to be momentarily reset and reprogrammed. However, we attempt to reprogram the PHY immediately after deasserting reset, and the PHY ignores the writes. This results in the PHY operating in the wrong mode, and the copper link states down. Set a reset deassert delay of 10ms for the gigabit PHY to avoid this. Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-03-13x86/mm: Rename is_kernel_text to __is_kernel_textJiri Olsa1-5/+9
The kbuild test robot reported compile issue on x86 in one of the following patches that adds <linux/kallsyms.h> include into <linux/bpf.h>, which is picked up by init_32.c object. The problem is that <linux/kallsyms.h> defines global function is_kernel_text which colides with the static function of the same name defined in init_32.c: $ make ARCH=i386 ... >> arch/x86/mm/init_32.c:241:19: error: redefinition of 'is_kernel_text' static inline int is_kernel_text(unsigned long addr) ^~~~~~~~~~~~~~ In file included from include/linux/bpf.h:21:0, from include/linux/bpf-cgroup.h:5, from include/linux/cgroup-defs.h:22, from include/linux/cgroup.h:28, from include/linux/hugetlb.h:9, from arch/x86/mm/init_32.c:18: include/linux/kallsyms.h:31:19: note: previous definition of 'is_kernel_text' was here static inline int is_kernel_text(unsigned long addr) Renaming the init_32.c is_kernel_text function to __is_kernel_text. Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Song Liu <songliubraving@fb.com> Link: https://lore.kernel.org/bpf/20200312195610.346362-2-jolsa@kernel.org Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2020-03-13Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfDavid S. Miller1-4/+6
Alexei Starovoitov says: ==================== pull-request: bpf 2020-03-12 The following pull-request contains BPF updates for your *net* tree. We've added 12 non-merge commits during the last 8 day(s) which contain a total of 12 files changed, 161 insertions(+), 15 deletions(-). The main changes are: 1) Andrii fixed two bugs in cgroup-bpf. 2) John fixed sockmap. 3) Luke fixed x32 jit. 4) Martin fixed two issues in struct_ops. 5) Yonghong fixed bpf_send_signal. 6) Yoshiki fixed BTF enum. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-13arm64: kvm: hyp: use cpus_have_final_cap()Mark Rutland3-15/+15
The KVM hyp code is only run after system capabilities have been finalized, and thus all const cap checks have been patched. This is noted in in __cpu_init_hyp_mode(), where we BUG() if called too early: | /* | * Call initialization code, and switch to the full blown HYP code. | * If the cpucaps haven't been finalized yet, something has gone very | * wrong, and hyp will crash and burn when it uses any | * cpus_have_const_cap() wrapper. | */ Given this, the hyp code can use cpus_have_final_cap() and avoid generating code to check the cpu_hwcaps array, which would be unsafe to run in hyp context. This patch migrate the KVM hyp code to cpus_have_final_cap(), avoiding this redundant code generation, and making it possible to detect if we accidentally invoke this code too early. In the latter case, the BUG() in cpus_have_final_cap() will cause a hyp panic. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Julien Thierry <julien.thierry.kdev@gmail.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-03-13arm64: cpufeature: add cpus_have_final_cap()Mark Rutland1-11/+47
When cpus_have_const_cap() was originally introduced it was intended to be safe in hyp context, where it is not safe to access the cpu_hwcaps array as cpus_have_cap() did. For more details see commit: a4023f682739439b ("arm64: Add hypervisor safe helper for checking constant capabilities") We then made use of cpus_have_const_cap() throughout the kernel. Subsequently, we had to defer updating the static_key associated with each capability in order to avoid lockdep complaints. To avoid breaking kernel-wide usage of cpus_have_const_cap(), this was updated to fall back to the cpu_hwcaps array if called before the static_keys were updated. As the kvm hyp code was only called later than this, the fallback is redundant but not functionally harmful. For more details, see commit: 63a1e1c95e60e798 ("arm64/cpufeature: don't use mutex in bringup path") Today we have more users of cpus_have_const_cap() which are only called once the relevant static keys are initialized, and it would be beneficial to avoid the redundant code. To that end, this patch adds a new cpus_have_final_cap(), helper which is intend to be used in code which is only run once capabilities have been finalized, and will never check the cpus_hwcap array. This helps the compiler to generate better code as it no longer needs to generate code to address and test the cpus_hwcap array. To help catch misuse, cpus_have_final_cap() will BUG() if called before capabilities are finalized. In hyp context, BUG() will result in a hyp panic, but the specific BUG() instance will not be identified in the usual way. Comments are added to the various cpus_have_*_cap() helpers to describe the constraints on when they can be used. For clarity cpus_have_cap() is moved above the other helpers. Similarly the helpers are updated to use system_capabilities_finalized() consistently, and this is made __always_inline as required by its new callers. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-03-13ARM: debug: stm32: add UART early console support for STM32MP1Erwan Le Ray2-1/+16
Add support of early console for STM32MP1. Default UART instance is UART4, but other UART instances can be configured by setting physical and virtual base addresses in menuconfig. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: debug: stm32: add UART early console support for STM32H7Erwan Le Ray2-2/+15
Add support of early console for STM32H7. Default UART instance is USART1, but other UART instances can be configured by setting physical and virtual base addresses in menuconfig. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: debug: stm32: add UART early console configuration for STM32F7Erwan Le Ray1-3/+4
Early console is hardcoded on USART1 in current implementation. With this patch, default UART instance is USART1, but other UART instances can be configured by setting physical and virtual base addresses in menuconfig. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: debug: stm32: add UART early console configuration for STM32F4Erwan Le Ray2-8/+8
Early console is hardcoded on USART1 in current implementation. With this patch, default UART instance is USART1, but other UART instances can be configured by setting physical and virtual base addresses in menuconfig. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boardsYann Gautier1-1/+1
On those boards, as stated in schematics files, the regulator used for IOs is VDD. It was wrongly set to v3v3. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boardsYann Gautier3-0/+3
On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket. This is also the case on Avenger board. They don't support the Write Protect pin. The disable-wp is then added in the SD-cards sdmmc1 nodes. This avoids executing some code and a warning during driver probe. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boardsYann Gautier3-3/+3
The broken-cd properties are replaced with cd-gpios, with the correct GPIO to detect the card insertion. The GPIO lines require a pull-up. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boardsBenjamin Gaignard3-10/+0
Remove unused properties from stpmic node. The issues have been detected by running dtbs_check. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1Benjamin Gaignard1-1/+1
Rename stmfx joystick pins names according to yaml description. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add cpu clock-frequency property on stm32mp15xAhmad Fatoum2-0/+2
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their Cortex-A7 cores running at 650 MHz. Add the clock-frequency property to CPU nodes to avoid warnings about them missing. [1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html [2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html [3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157cAlain Volmat1-0/+6
Add the wakeup-source property in all i2c nodes of the SoC stm32mp157c so that those I2C controllers can become wakeup-source. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1Alain Volmat1-1/+2
Add the sleep state pinctrl entry for the i2c4 node of the stm32mp157c-ed1 board. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: dra7: Add bus_dma_limit for L3 busRoger Quadros1-0/+1
The L3 interconnect's memory map is from 0x0 to 0xffffffff. Out of this, System memory (SDRAM) can be accessed from 0x80000000 to 0xffffffff (2GB) DRA7 does support 4GB of SDRAM but upper 2GB can only be accessed by the MPU subsystem. Add the dma-ranges property to reflect the physical address limit of the L3 bus. Issues ere observed only with SATA on DRA7-EVM with 4GB RAM and CONFIG_ARM_LPAE enabled. This is because the controller supports 64-bit DMA and its driver sets the dma_mask to 64-bit thus resulting in DMA accesses beyond L3 limit of 2G. Setting the correct bus_dma_limit fixes the issue. Signed-off-by: Roger Quadros <rogerq@ti.com> Cc: stable@kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-13x86/vector: Remove warning on managed interrupt migrationPeter Xu1-6/+8
The vector management code assumes that managed interrupts cannot be migrated away from an online CPU. free_moved_vector() has a WARN_ON_ONCE() which triggers when a managed interrupt vector association on a online CPU is cleared. The CPU offline code uses a different mechanism which cannot trigger this. This assumption is not longer correct because the new CPU isolation feature which affects the placement of managed interrupts must be able to move a managed interrupt away from an online CPU. There are two reasons why this can happen: 1) When the interrupt is activated the affinity mask which was established in irq_create_affinity_masks() is handed in to the vector allocation code. This mask contains all CPUs to which the interrupt can be made affine to, but this does not take the CPU isolation 'managed_irq' mask into account. When the interrupt is finally requested by the device driver then the affinity is checked again and the CPU isolation 'managed_irq' mask is taken into account, which moves the interrupt to a non-isolated CPU if possible. 2) The interrupt can be affine to an isolated CPU because the non-isolated CPUs in the calculated affinity mask are not online. Once a non-isolated CPU which is in the mask comes online the interrupt is migrated to this non-isolated CPU In both cases the regular online migration mechanism is used which triggers the WARN_ON_ONCE() in free_moved_vector(). Case #1 could have been addressed by taking the isolation mask into account, but that would require a massive code change in the activation logic and the eventual migration event was accepted as a reasonable tradeoff when the isolation feature was developed. But even if #1 would be addressed, #2 would still trigger it. Of course the warning in free_moved_vector() was overlooked at that time and the above two cases which have been discussed during patch review have obviously never been tested before the final submission. So keep it simple and remove the warning. [ tglx: Rewrote changelog and added a comment to free_moved_vector() ] Fixes: 11ea68f553e2 ("genirq, sched/isolation: Isolate from handling managed interrupts") Signed-off-by: Peter Xu <peterx@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ming Lei <ming.lei@redhat.com> Link: https://lkml.kernel.org/r/20200312205830.81796-1-peterx@redhat.com
2020-03-13ARM: dts: Add devicetree for Samsung GT-S7710Linus Walleij2-1/+583
The Samsung GT-S7710 also known as XCover 2 or Skomer is a Ux500-based mobile phone. In the source code release from Samsung's open source site it is referred to as "Skomer". Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200307193627.4092-1-linus.walleij@linaro.org [Typographic fixups when applying] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-13ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1Alain Volmat1-2/+4
Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes of the stm32mp157c-ev1 board. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkxAlain Volmat1-1/+2
Add the sleep state pinctrl entry for the i2c4 node of the stm32mp15xx-dkx.dtsi Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boardsAlain Volmat1-0/+1
On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting the bus frequency to 400 KHz. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1Alain Volmat1-0/+1
On this board, the I2C4 bus has only a single slave (pmic) which supports I2C Fast Mode hence setting bus frequency to 400 KHz. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13cpuidle: tegra: Squash Tegra114 driver into the common driverDmitry Osipenko5-152/+4
Tegra20/30/114/124 SoCs have common idling states, thus there is no much point in having separate drivers for a similar hardware. This patch moves Tegra114/124 arch/ drivers into the common driver without any functional changes. The CC6 state is kept disabled on Tegra114/124 because the core Tegra PM code needs some more work in order to support that state. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13cpuidle: tegra: Squash Tegra30 driver into the common driverDmitry Osipenko4-131/+1
Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus share the same code paths, there is no point in having separate drivers for a similar hardware. This patch merely moves functionality of the old driver into the new, although the CC6 state is kept disabled for now since old driver had a rudimentary support for this state (allowing to enter into CC6 only when secondary CPUs are put offline), while new driver can provide a full-featured support. The new feature will be enabled by another patch. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidleDmitry Osipenko4-238/+2
The driver's code is refactored in a way that will make it easy to support Tegra30/114/124 SoCs by this unified driver later on. The current functionality is equal to the old Tegra20 driver, only the code's structure changed a tad. This is also a proper platform driver now. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Update sound node clocks in device treeSowjanya Komatineni11-11/+77
clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were previously erroneously provided by the clock and reset controller. clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210. This patch updates device tree sound node to use clk_out_1 from the PMC provider as mclk and uses assigned-clock properties to specify clock parents for clk_out_1 and extern1. Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Add clock-cells property to PMCSowjanya Komatineni4-4/+12
Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock. These clocks were erroneously provided by the clock and reset controller and are now provided by the PMC instead because that's where the primary controls are. This patch adds #clock-cells property with 1 clock specifier to the Tegra PMC node in device tree. Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctlNagarjuna Kristam1-6/+0
On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver rather than padctl driver. Remove the entry for the same. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: cpuidle: Remove unnecessary memory barrierDmitry Osipenko2-4/+0
There is no good justification for smp_rmb() after returning from LP2 because there are no memory operations that require SMP synchronization. Thus remove the confusing barrier. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: cpuidle: Make abort_flag atomicDmitry Osipenko1-4/+5
Replace memory accessors with atomic API just to make code consistent with the abort_barrier. The new variant may be even more correct now since atomic_read() will prevent compiler from generating wrong things like carrying abort_flag value in a register instead of re-fetching it from memory. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2Dmitry Osipenko1-2/+49
It is possible that something may go wrong with the secondary CPU, in that case it is much nicer to get a dump of the flow-controller state before hanging machine. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Make outer_disable() open-codedDmitry Osipenko1-3/+8
The outer_disable() of Tegra's suspend code is open-coded now since that helper produces spurious warning message about secondary CPUs being online when CPU enters into LP2 from cpuidle. The secondaries are actually halted by the cpuidle driver on entering into LP2 idle-state, but the online status is not touched by the cpuidle. This fixes a storm of warnings once LP2 idling state is enabled on Tegra30. The outer_disable() helper has sanity checks for interrupts and secondary CPUs being disabled and we are pretty confident about the interrupts state during of CPU idling / system suspend. The rail-off status check is added in this patch as equivalent for the "num_online_cpus() > 1". Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Rename some of the newly exposed PM functionsDmitry Osipenko5-18/+18
Rename some of the recently exposed PM functions, prefixing them with "tegra_pm_" in order to make the naming of the PM functions consistent. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13ARM: tegra: Expose PM functions required for new cpuidle driverDmitry Osipenko8-26/+8
The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/ directory and it will require all these exposed Tegra PM-core functions. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: fixup missing include rename] Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-13powerpc/vdso: remove deprecated VDS64_HAS_DESCRIPTORS referencesJoe Lawrence2-29/+0
The original 2005 patch that introduced the powerpc vdso, pre-git ("ppc64: Implement a vDSO and use it for signal trampoline") notes that: ... symbols exposed by the vDSO aren't "normal" function symbols, apps can't be expected to link against them directly, the vDSO's are both seen as if they were linked at 0 and the symbols just contain offsets to the various functions. This is done on purpose to avoid a relocation step (ppc64 functions normally have descriptors with abs addresses in them). When glibc uses those functions, it's expected to use it's own trampolines that know how to reach them. Despite that explanation, there remains dead #ifdef VDS64_HAS_DESCRIPTORS code-blocks that provide alternate function definitions that setup function descriptors. Since VDS64_HAS_DESCRIPTORS has been unused for all these years, we might as well finally remove it from the codebase. Signed-off-by: Joe Lawrence <joe.lawrence@redhat.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200224211848.26087-1-joe.lawrence@redhat.com
2020-03-13powerpc/32: Fix missing NULL pmd check in virt_to_kpte()Christophe Leroy1-1/+3
Commit 2efc7c085f05 ("powerpc/32: drop get_pteptr()"), replaced get_pteptr() by virt_to_kpte(). But virt_to_kpte() lacks a NULL pmd check and returns an invalid non NULL pointer when there is no page table. Reported-by: Nick Desaulniers <ndesaulniers@google.com> Fixes: 2efc7c085f05 ("powerpc/32: drop get_pteptr()") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/b1177cdfc6af74a3e277bba5d9e708c4b3315ebe.1583575707.git.christophe.leroy@c-s.fr
2020-03-13powerpc/kasan: Fix shadow memory protection with CONFIG_KASAN_VMALLOCChristophe Leroy1-7/+2
With CONFIG_KASAN_VMALLOC, new page tables are created at the time shadow memory for vmalloc area is unmapped. If some parts of the page table still have entries to the zero page shadow memory, the entries are wrongly marked RW. With CONFIG_KASAN_VMALLOC, almost the entire kernel address space is managed by KASAN. To make it simple, just create KASAN page tables for the entire kernel space at kasan_init(). That doesn't use much more space, and that's anyway already done for hash platforms. Fixes: 3d4247fcc938 ("powerpc/32: Add support of KASAN_VMALLOC") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/ef5248fc1f496c6b0dfdb59380f24968f25f75c5.1583513368.git.christophe.leroy@c-s.fr
2020-03-12Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller83-356/+504
Minor overlapping changes, nothing serious. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-12Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds1-0/+2
Pull networking fixes from David Miller: "It looks like a decent sized set of fixes, but a lot of these are one liner off-by-one and similar type changes: 1) Fix netlink header pointer to calcular bad attribute offset reported to user. From Pablo Neira Ayuso. 2) Don't double clear PHY interrupts when ->did_interrupt is set, from Heiner Kallweit. 3) Add missing validation of various (devlink, nl802154, fib, etc.) attributes, from Jakub Kicinski. 4) Missing *pos increments in various netfilter seq_next ops, from Vasily Averin. 5) Missing break in of_mdiobus_register() loop, from Dajun Jin. 6) Don't double bump tx_dropped in veth driver, from Jiang Lidong. 7) Work around FMAN erratum A050385, from Madalin Bucur. 8) Make sure ARP header is pulled early enough in bonding driver, from Eric Dumazet. 9) Do a cond_resched() during multicast processing of ipvlan and macvlan, from Mahesh Bandewar. 10) Don't attach cgroups to unrelated sockets when in interrupt context, from Shakeel Butt. 11) Fix tpacket ring state management when encountering unknown GSO types. From Willem de Bruijn. 12) Fix MDIO bus PHY resume by checking mdio_bus_phy_may_suspend() only in the suspend context. From Heiner Kallweit" * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (112 commits) net: systemport: fix index check to avoid an array out of bounds access tc-testing: add ETS scheduler to tdc build configuration net: phy: fix MDIO bus PM PHY resuming net: hns3: clear port base VLAN when unload PF net: hns3: fix RMW issue for VLAN filter switch net: hns3: fix VF VLAN table entries inconsistent issue net: hns3: fix "tc qdisc del" failed issue taprio: Fix sending packets without dequeueing them net: mvmdio: avoid error message for optional IRQ net: dsa: mv88e6xxx: Add missing mask of ATU occupancy register net: memcg: fix lockdep splat in inet_csk_accept() s390/qeth: implement smarter resizing of the RX buffer pool s390/qeth: refactor buffer pool code s390/qeth: use page pointers to manage RX buffer pool seg6: fix SRv6 L2 tunnels to use IANA-assigned protocol number net: dsa: Don't instantiate phylink for CPU/DSA ports unless needed net/packet: tpacket_rcv: do not increment ring index on drop sxgbe: Fix off by one in samsung driver strncpy size arg net: caif: Add lockdep expression to RCU traversal primitive MAINTAINERS: remove Sathya Perla as Emulex NIC maintainer ...
2020-03-12Revert "arm64: dts: sdm845: add IPA information"Alex Elder1-51/+0
This reverts commit 9cc5ae125f0eaee471bc87fb5cbf29385fd9272a. This commit: b303f9f0050b arm64: dts: sdm845: Redefine interconnect provider DT nodes found in the Qualcomm for-next tree removes/redefines the interconnect provider node(s) used for IPA. I'm not sure whether it technically conflicts with the IPA change to "sdm845.dtsi" in for-next, but it renders it broken. Revert this commit in the for-next tree, with the plan to incorporate it into the Qualcomm tree instead. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-12ARM: bcm2835-rpi-zero-w: Add missing pinctrl nameNick Hudson1-0/+1
Define the sdhci pinctrl state as "default" so it gets applied correctly and to match all other RPis. Fixes: 2c7c040c73e9 ("ARM: dts: bcm2835: Add Raspberry Pi Zero W") Signed-off-by: Nick Hudson <skrll@netbsd.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-12Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2-3/+9
Pull crypto fix from Herbert Xu: "Fix a build problem with x86/curve25519" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: x86/curve25519 - support assemblers with no adx support
2020-03-12x86/mm/kmmio: Use this_cpu_ptr() instead get_cpu_var() for kmmio_ctxSebastian Andrzej Siewior1-7/+3
Both call sites that access kmmio_ctx, access kmmio_ctx with interrupts disabled. There is no need to use get_cpu_var() which additionally disables preemption. Use this_cpu_ptr() to access the kmmio_ctx variable of the current CPU. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20200205143426.2592512-1-bigeasy@linutronix.de