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2022-06-30ARM: dts: qcom: msm8974: add dedicated IMEM compatibleKrzysztof Kozlowski1-1/+1
syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-5-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: apq8064-asus-nexus7: add dedicated IMEM compatibleKrzysztof Kozlowski1-1/+1
syscon compatible must be preceded with a specific compatible, to accurately describe the device. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-4-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: use generic sram as name for imem and ocmem nodesKrzysztof Kozlowski3-4/+4
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-3-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: ipq8064: add function to LED nodesKrzysztof Kozlowski1-0/+3
Add common LED property - the function - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-5-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: ipq8064-rb3011: add color to LED nodeKrzysztof Kozlowski1-0/+2
Add common LED property - the color - to LED node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-4-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: ipq4018-ap120c-ac: add function and color to LED nodesKrzysztof Kozlowski2-0/+13
Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-3-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: apq8060-ifc6410: add color to LED nodeKrzysztof Kozlowski1-0/+2
Add common LED property - the color - to LED node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-2-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: apq8060-dragonboard: add function and color to LED nodesKrzysztof Kozlowski1-0/+5
Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-1-krzysztof.kozlowski@linaro.org
2022-06-30ARM: dts: qcom: msm8974: re-add missing pinctrlLuca Weiss1-4/+26
As part of a recent cleanup commit, the pinctrl for a few uart and i2c nodes was removed. Adjust the names and/or add it back and assign it to the uart and i2c nodes. Fixes: 1dfe967ec7cf ("ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI") Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606160421.1641778-1-luca@z3ntu.xyz
2022-06-30bitops: wrap non-atomic bitops with a transparent macroAlexander Lobakin2-15/+15
In preparation for altering the non-atomic bitops with a macro, wrap them in a transparent definition. This requires prepending one more '_' to their names in order to be able to do that seamlessly. It is a simple change, given that all the non-prefixed definitions are now in asm-generic. sparc32 already has several triple-underscored functions, so I had to rename them ('___' -> 'sp32_'). Signed-off-by: Alexander Lobakin <alexandr.lobakin@intel.com> Reviewed-by: Marco Elver <elver@google.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Yury Norov <yury.norov@gmail.com>
2022-06-30bitops: unify non-atomic bitops prototypes across architecturesAlexander Lobakin7-111/+153
Currently, there is a mess with the prototypes of the non-atomic bitops across the different architectures: ret bool, int, unsigned long nr int, long, unsigned int, unsigned long addr volatile unsigned long *, volatile void * Thankfully, it doesn't provoke any bugs, but can sometimes make the compiler angry when it's not handy at all. Adjust all the prototypes to the following standard: ret bool retval can be only 0 or 1 nr unsigned long native; signed makes no sense addr volatile unsigned long * bitmaps are arrays of ulongs Next, some architectures don't define 'arch_' versions as they don't support instrumentation, others do. To make sure there is always the same set of callables present and to ease any potential future changes, make them all follow the rule: * architecture-specific files define only 'arch_' versions; * non-prefixed versions can be defined only in asm-generic files; and place the non-prefixed definitions into a new file in asm-generic to be included by non-instrumented architectures. Finally, add some static assertions in order to prevent people from making a mess in this room again. I also used the %__always_inline attribute consistently, so that they always get resolved to the actual operations. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Alexander Lobakin <alexandr.lobakin@intel.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Yury Norov <yury.norov@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Yury Norov <yury.norov@gmail.com>
2022-06-30ia64, processor: fix -Wincompatible-pointer-types in ia64_get_irr()Alexander Lobakin1-1/+1
test_bit(), as any other bitmap op, takes `unsigned long *` as a second argument (pointer to the actual bitmap), as any bitmap itself is an array of unsigned longs. However, the ia64_get_irr() code passes a ref to `u64` as a second argument. This works with the ia64 bitops implementation due to that they have `void *` as the second argument and then cast it later on. This works with the bitmap API itself due to that `unsigned long` has the same size on ia64 as `u64` (`unsigned long long`), but from the compiler PoV those two are different. Define @irr as `unsigned long` to fix that. That implies no functional changes. Has been hidden for 16 years! Fixes: a58786917ce2 ("[IA64] avoid broken SAL_CACHE_FLUSH implementations") Cc: stable@vger.kernel.org # 2.6.16+ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alexander Lobakin <alexandr.lobakin@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Yury Norov <yury.norov@gmail.com> Signed-off-by: Yury Norov <yury.norov@gmail.com>
2022-06-30ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UARTManivannan Sadhasivam1-1/+1
The trigger type should be LEVEL_HIGH. So fix it! Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220530080842.37024-2-manivannan.sadhasivam@linaro.org
2022-06-30riscv: Kconfig: Style cleanupsPalmer Dabbelt3-13/+12
The majority of the Kconfig files use a single tab for basic indentation and a single tab followed by two whitespaces for help text indentation. Fix the lines that don't follow this convention. While at it, add trailing comments to endif/endmenu statements for better readability. * 'riscv-kconfig_cleanups' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/palmer/linux: riscv: Kconfig.socs: Add comments riscv: Kconfig.erratas: Add comments riscv: Kconfig: Fix indentation and add comments
2022-06-30ARM: dts: qcom-msm8974: fix irq type on blsp2_uart1Luca Weiss1-1/+1
IRQ_TYPE_NONE is invalid, so use the correct interrupt type. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Fixes: b05f82b152c9 ("ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220522083618.17894-1-luca@z3ntu.xyz
2022-06-30riscv: Kconfig.socs: Add commentsJuerg Haefliger1-2/+2
Add trailing comments to endif and endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220520120232.148310-4-juergh@canonical.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-06-30riscv: Kconfig.erratas: Add commentsJuerg Haefliger1-1/+1
Add trailing comments to endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220520120232.148310-3-juergh@canonical.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-06-30riscv: Kconfig: Fix indentation and add commentsJuerg Haefliger1-10/+9
The convention for indentation seems to be a single tab. Help text is further indented by an additional two whitespaces. Fix the lines that violate these rules. While add it, add trailing comments to endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220520120232.148310-2-juergh@canonical.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-06-30Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski66-228/+320
drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c 9c5de246c1db ("net: sparx5: mdb add/del handle non-sparx5 devices") fbb89d02e33a ("net: sparx5: Allow mdb entries to both CPU and ports") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-30ARM: dts: qcom: msm8974: Add BAM DMUX Ethernet/IP deviceLuca Weiss1-0/+26
BAM DMUX is used as the network interface to the modem. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517203450.1155696-1-luca@z3ntu.xyz
2022-06-30s390/qdio: Fix spelling mistakeZhang Jiaming1-3/+3
Change 'defineable' to 'definable'. Change 'paramater' to 'parameter'. Signed-off-by: Zhang Jiaming <jiaming@nfschina.com> Reviewed-by: Benjamin Block <bblock@linux.ibm.com> Link: https://lore.kernel.org/r/20220623060543.12870-1-jiaming@nfschina.com Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-06-30s390/archrandom: simplify back to earlier design and initialize earlierJason A. Donenfeld3-224/+12
s390x appears to present two RNG interfaces: - a "TRNG" that gathers entropy using some hardware function; and - a "DRBG" that takes in a seed and expands it. Previously, the TRNG was wired up to arch_get_random_{long,int}(), but it was observed that this was being called really frequently, resulting in high overhead. So it was changed to be wired up to arch_get_random_ seed_{long,int}(), which was a reasonable decision. Later on, the DRBG was then wired up to arch_get_random_{long,int}(), with a complicated buffer filling thread, to control overhead and rate. Fortunately, none of the performance issues matter much now. The RNG always attempts to use arch_get_random_seed_{long,int}() first, which means a complicated implementation of arch_get_random_{long,int}() isn't really valuable or useful to have around. And it's only used when reseeding, which means it won't hit the high throughput complications that were faced before. So this commit returns to an earlier design of just calling the TRNG in arch_get_random_seed_{long,int}(), and returning false in arch_get_ random_{long,int}(). Part of what makes the simplification possible is that the RNG now seeds itself using the TRNG at bootup. But this only works if the TRNG is detected early in boot, before random_init() is called. So this commit also causes that check to happen in setup_arch(). Cc: stable@vger.kernel.org Cc: Harald Freudenberger <freude@linux.ibm.com> Cc: Ingo Franzki <ifranzki@linux.ibm.com> Cc: Juergen Christ <jchrist@linux.ibm.com> Cc: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Link: https://lore.kernel.org/r/20220610222023.378448-1-Jason@zx2c4.com Reviewed-by: Harald Freudenberger <freude@linux.ibm.com> Acked-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-06-30arch: microblaze: Remove unused "select HANDLE_DOMAIN_IRQ"Ying Sun1-1/+0
The "CONFIG_HANDLE_DOMAIN_IRQ" item has not been used right now. Remove the old unused selection in config MICROBLAZE. Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn> Link: https://lore.kernel.org/r/20220629080652.28029-1-sunying@nj.iscas.ac.cn Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-30arm64: dts: qcom: add SC8280XP platformBjorn Andersson1-0/+2141
Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks, interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and tsens. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220629041438.1352536-4-bjorn.andersson@linaro.org
2022-06-30arm64: dts: qcom: sm8450: Add interconnect requirements for SCMSibi Sankar1-0/+1
Add interconnects requirements for the SCM interface on SM8450 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1653289258-17699-4-git-send-email-quic_sibis@quicinc.com
2022-06-30arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board supportDmitry Baryshkov2-0/+462
The IFC6560 is a board from Inforce Computing, built around the SDA660 SoC. This patch describes core clocks, some regulators from the two PMICs, debug uart, storage, bluetooth and audio DSP remoteproc. The regulator settings are inherited from prior work by Konrad Dybcio and AngeloGioacchino Del Regno. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-12-dmitry.baryshkov@linaro.org
2022-06-30s390/purgatory: remove duplicated build rule of kexec-purgatory.oMasahiro Yamada1-2/+1
This is equivalent to the pattern rule in scripts/Makefile.build. Having the dependency on $(obj)/purgatory.ro is enough. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20220613170902.1775211-3-masahiroy@kernel.org Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-06-30s390/purgatory: hard-code obj-y in MakefileMasahiro Yamada1-1/+1
The purgatory/ directory is entirely guarded in arch/s390/Kbuild. CONFIG_ARCH_HAS_KEXEC_PURGATORY is bool type. $(CONFIG_ARCH_HAS_KEXEC_PURGATORY) is always 'y' when Kbuild visits this Makefile for building. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20220613170902.1775211-2-masahiroy@kernel.org Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-06-30s390: remove unneeded 'select BUILD_BIN2C'Masahiro Yamada1-1/+0
Since commit 4c0f032d4963 ("s390/purgatory: Omit use of bin2c"), s390 builds the purgatory without using bin2c. Remove 'select BUILD_BIN2C' to avoid the unneeded build of bin2c. Fixes: 4c0f032d4963 ("s390/purgatory: Omit use of bin2c") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20220613170902.1775211-1-masahiroy@kernel.org Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-06-30crypto: arm64/gcm - Select AEAD for GHASH_ARM64_CEQian Cai1-0/+1
Otherwise, we could fail to compile. ld: arch/arm64/crypto/ghash-ce-glue.o: in function 'ghash_ce_mod_exit': ghash-ce-glue.c:(.exit.text+0x24): undefined reference to 'crypto_unregister_aead' ld: arch/arm64/crypto/ghash-ce-glue.o: in function 'ghash_ce_mod_init': ghash-ce-glue.c:(.init.text+0x34): undefined reference to 'crypto_register_aead' Fixes: 537c1445ab0b ("crypto: arm64/gcm - implement native driver using v8 Crypto Extensions") Signed-off-by: Qian Cai <quic_qiancai@quicinc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-06-30crypto: arm64/aes-neon - Fix typo in commentJilin Yuan1-1/+1
Delete the redundant word 'the'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-06-29arm64: defconfig: enable Qualcomm LPG leds driverDmitry Baryshkov1-0/+2
Enable the driver for Qualcomm Light Pulse Generator block, it is used on many Qualcomm platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505144913.1432346-1-dmitry.baryshkov@linaro.org
2022-06-29ARM: dts: qcom: align gpio-key node names with dtschemaKrzysztof Kozlowski10-28/+28
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-25-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: adjust whitespace around '='Krzysztof Kozlowski9-192/+192
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-2-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: ipq4019: fix Micron SPI NOR compatibleKrzysztof Kozlowski2-2/+2
The proper compatible for Micron n25q128a11 SPI NOR flash should include vendor-prefix and use jedec,spi-nor fallback. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521164550.91115-10-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: apq8064: add unit addresses to QFPROM regionsKrzysztof Kozlowski1-2/+2
QFPROM children have 'reg' so they must have unit address. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-4-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: cleanup QFPROM nodesKrzysztof Kozlowski3-7/+7
Cleanup coding style of QFPROM nodes - put compatible as first property and drop tabs before '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-3-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: use dedicated QFPROM compatiblesKrzysztof Kozlowski4-4/+4
Use dedicated compatibles for QFPROM on APQ8064, IPQ8064 and MSM9874, which is expected by the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-2-krzysztof.kozlowski@linaro.org
2022-06-29ARM: dts: qcom: replace gcc PXO with pxo_board fixed clockAnsuel Smith1-1/+1
Replace gcc PXO phandle to pxo_board fixed clock declared in the dts. gcc driver doesn't provide PXO_SRC as it's a fixed-clock. This cause a kernel panic if any driver actually try to use it. Fixes: 40cf5c884a96 ("ARM: dts: qcom: add L2CC and RPM for IPQ8064") Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430055118.1947-2-ansuelsmth@gmail.com
2022-06-29context_tracking: Split user tracking KconfigFrederic Weisbecker18-26/+26
Context tracking is going to be used not only to track user transitions but also idle/IRQs/NMIs. The user tracking part will then become a separate feature. Prepare Kconfig for that. [ frederic: Apply Max Filippov feedback. ] Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Neeraj Upadhyay <quic_neeraju@quicinc.com> Cc: Uladzislau Rezki <uladzislau.rezki@sony.com> Cc: Joel Fernandes <joel@joelfernandes.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Nicolas Saenz Julienne <nsaenz@kernel.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Xiongfeng Wang <wangxiongfeng2@huawei.com> Cc: Yu Liao <liaoyu15@huawei.com> Cc: Phil Auld <pauld@redhat.com> Cc: Paul Gortmaker<paul.gortmaker@windriver.com> Cc: Alex Belits <abelits@marvell.com> Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Reviewed-by: Nicolas Saenz Julienne <nsaenzju@redhat.com> Tested-by: Nicolas Saenz Julienne <nsaenzju@redhat.com>
2022-06-29context_tracking: Rename context_tracking_user_enter/exit() to user_enter/exit_callable()Frederic Weisbecker4-11/+11
context_tracking_user_enter() and context_tracking_user_exit() are ASM callable versions of user_enter() and user_exit() for architectures that didn't manage to check the context tracking static key from ASM. Change those function names to better reflect their purpose. [ frederic: Apply Max Filippov feedback. ] Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Neeraj Upadhyay <quic_neeraju@quicinc.com> Cc: Uladzislau Rezki <uladzislau.rezki@sony.com> Cc: Joel Fernandes <joel@joelfernandes.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Nicolas Saenz Julienne <nsaenz@kernel.org> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Xiongfeng Wang <wangxiongfeng2@huawei.com> Cc: Yu Liao <liaoyu15@huawei.com> Cc: Phil Auld <pauld@redhat.com> Cc: Paul Gortmaker<paul.gortmaker@windriver.com> Cc: Alex Belits <abelits@marvell.com> Signed-off-by: Paul E. McKenney <paulmck@kernel.org> Reviewed-by: Nicolas Saenz Julienne <nsaenzju@redhat.com> Tested-by: Nicolas Saenz Julienne <nsaenzju@redhat.com>
2022-06-29bpf: per-cgroup lsm flavorStanislav Fomichev1-8/+16
Allow attaching to lsm hooks in the cgroup context. Attaching to per-cgroup LSM works exactly like attaching to other per-cgroup hooks. New BPF_LSM_CGROUP is added to trigger new mode; the actual lsm hook we attach to is signaled via existing attach_btf_id. For the hooks that have 'struct socket' or 'struct sock' as its first argument, we use the cgroup associated with that socket. For the rest, we use 'current' cgroup (this is all on default hierarchy == v2 only). Note that for some hooks that work on 'struct sock' we still take the cgroup from 'current' because some of them work on the socket that hasn't been properly initialized yet. Behind the scenes, we allocate a shim program that is attached to the trampoline and runs cgroup effective BPF programs array. This shim has some rudimentary ref counting and can be shared between several programs attaching to the same lsm hook from different cgroups. Note that this patch bloats cgroup size because we add 211 cgroup_bpf_attach_type(s) for simplicity sake. This will be addressed in the subsequent patch. Also note that we only add non-sleepable flavor for now. To enable sleepable use-cases, bpf_prog_run_array_cg has to grab trace rcu, shim programs have to be freed via trace rcu, cgroup_bpf.effective should be also trace-rcu-managed + maybe some other changes that I'm not aware of. Reviewed-by: Martin KaFai Lau <kafai@fb.com> Signed-off-by: Stanislav Fomichev <sdf@google.com> Link: https://lore.kernel.org/r/20220628174314.1216643-4-sdf@google.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2022-06-29x86/retbleed: Add fine grained Kconfig knobsPeter Zijlstra13-55/+161
Do fine-grained Kconfig for all the various retbleed parts. NOTE: if your compiler doesn't support return thunks this will silently 'upgrade' your mitigation to IBPB, you might not like this. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de>
2022-06-29ARM: dts: r9a06g032-rzn1d400-db: Add switch descriptionClément Léger1-0/+115
Add the description for the switch, GMAC2 and MII converter. With these definitions, the switch ports 0 and 1 (MII ports 5 and 4) are working on the RZ/N1D-DB board. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220624144001.95518-16-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29ARM: dts: r9a06g032: Describe switchClément Léger1-0/+51
Add the description of the switch that is present on the RZ/N1 SoC. This description includes ethernet-port descriptions for all the ports that are present on the switch along with their connection to the MII converter ports and to the GMAC for the CPU port. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220624144001.95518-15-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29ARM: dts: r9a06g032: Describe GMAC2Clément Léger1-0/+18
The RZ/N1 SoC includes two MACs named GMACx that are compatible with the "snps,dwmac" driver. GMAC1 is connected directly to the MII converter port 1. GMAC2 however can be used as the MAC for the switch CPU management port or can be muxed to be connected directly to the MII converter port 2. This commit adds the description for the GMAC2 which will be used by the switch description. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220624144001.95518-14-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29ARM: dts: r9a06g032: Describe MII converterClément Léger1-0/+39
Add the MII converter node which describes the MII converter that is present on the RZ/N1 SoC. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220624144001.95518-13-clement.leger@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in commentChris Paterson1-1/+1
This dts is for the RZ/V2L SMARC EVK, not RZ/G2L. Fixes: f91c4c74796a ("arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK") Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Link: https://lore.kernel.org/r/20220623103024.24222-1-chris.paterson2@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-29ARM: dts: renesas: Fix DA9063 watchdog subnode namesGeert Uytterhoeven8-8/+8
make dtbs_check: arch/arm/boot/dts/r8a7791-koelsch-single-memory-node.dtb: pmic@58: 'wdt' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/mfd/dlg,da9063.yaml ... Change the watchdog child node names to match the DA9063 DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1dafdce285f7d14bec9e2033ac87fb30135895db.1655818230.git.geert+renesas@glider.be
2022-06-29arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHzGeert Uytterhoeven1-0/+5
The highest-performance mode for the Cortex-A57 CPU cores supported on R-Car H3Ne (R8A779M8) is the Power Optimized (1.5 GHz) mode. The Normal (1.6 GHz) and High Performance (1.7 GHz) modes are not supported. Hence drop the "turbo-mode" entries from the operating points table inherited from r8a77951.dtsi. Fixes: 6e87525d751fac57 ("arm64: dts: renesas: Add Renesas R8A779M8 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/aeb4530f7fbac8329b334dcb169382c836a5f32d.1655458564.git.geert+renesas@glider.be
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