| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
The LS1028A has six SAI cores.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The temperature sensor may jump backwards because there is a wrong
calibration value. Both values have to be monotonically increasing.
Fix it.
This was tested on a custom board.
Fixes: 571cebfe8e2b ("arm64: dts: ls1028a: Add Thermal Monitor Unit node")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The SIMD based GHASH implementation for arm64 is typically much faster
than the generic one, and doesn't use any lookup tables, so it is
clearly preferred when available. So bump the priority to reflect that.
Fixes: 5a22b198cd527447 ("crypto: arm64/ghash - register PMULL variants ...")
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
|
|
Instead of casting pointers to callback functions, add C wrappers
to avoid type mismatch failures with Control-Flow Integrity (CFI)
checking.
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
|
|
The crypto glue performed function prototype casting via macros to make
indirect calls to assembly routines. Instead of performing casts at the
call sites (which trips Control Flow Integrity prototype checking), switch
each prototype to a common standard set of arguments which allows the
removal of the existing macros. In order to keep pointer math unchanged,
internal casting between u128 pointers and u8 pointers is added.
Co-developed-by: João Moreira <joao.moreira@intel.com>
Signed-off-by: João Moreira <joao.moreira@intel.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
|
|
Add nodes for DWC3 USB controller, QMP and QUSB PHYs.
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573795421-13989-2-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add TSENS node and user thermal zone for TSENS sensors in SC7180.
Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1574934847-30372-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add MSM8998 GPU Clock Controller DT node.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191031185806.15602-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Enable the UFS HC and phy nodes and add regulators used by these.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add the ufs hc node and ufs phy nodes found in SM8150
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Now that header defining gcc clocks is upstream, use the enums instead
of numbers
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084604.1746544-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
cpufreq hw node required to scale CPU frequency on sc7180.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ed02b6356-5165eaaa-6c54-47ff-a008-821c91831e56-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
QCOM_SPMI_ADC5 and SPMI_TEMP_ALARM expose thermistors on the PMIC of
several QCOM platforms through the thermal framework. Enable them.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/5f193f2a7508d82037e8f04e73150feee1a2583e.1575887866.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
QUSB2 PHY on msm8996 doesn't work well when autosuspend by
dwc3 core using USB2PHYCFG register is enabled. One of the
issue seen is that PHY driver reports PLL lock failure and
fails phy_init() if dwc3 core has USB2 PHY suspend enabled.
Fix this by using quirks to disable USB2 PHY LPM/suspend and
dwc3 core already takes care of explicitly suspending PHY
during suspend if quirks are specified.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Paolo Pisati <p.pisati@gmail.com>
Link: https://lore.kernel.org/r/20191209151501.26993-1-p.pisati@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
After the commit 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs")
the kernel doesn't start on i.MX6ULL/ULZ SoC.
Tested on next-20191205.
For i.MX6ULL/ULZ the variable "ocotp_compat" is set to "fsl,imx6ul-ocotp", but with commit
ffbc34bf0e9c ("nvmem: imx-ocotp: Implement i.MX6ULL/ULZ support") and commit
f243bc821ee3 ("ARM: dts: imx6ull: Fix i.MX6ULL/ULZ ocotp compatible") the value
"fsl,imx6ull-ocotp" is already defined and set in device tree...
By setting "ocotp_compat" to "fsl,imx6ull-ocotp" the kernel does boot.
Fixes: 8267ff89b713 ("ARM: imx: Add serial number support for i.MX6/7 SoCs")
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Add device tree node for LLCC aka system cache controller for
SC7180 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3394291-2290a8be-91c9-4d46-b5ca-acd5277eb6e2-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add APSS (Application Processor Subsystem) watchdog
DT node for SM8150 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3393092-487ddf4a-2e17-40f0-8161-3e686a7b57dc-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add APSS (Application Processor Subsystem) watchdog
DT node for SC7180 SoC.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3391ce3-438cca2f-458c-47d9-a62a-381f1c6bfb15-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
LLCC cache-controller was renamed to system-cache-controller
to make schema pass the dt binding check. Update the device
tree node to reflect this change.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/a2bb92de65e90768bf1d6b8c0b7fbd43cba704d2.1573814758.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Make i2c7 symmetric with the other i2c busses and comment that we have
no internal pull because there is an external one.
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.2.I8d4cbb3d7ac5824f8e950c53038df8c27a512905@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section. Fix.
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Register upper-lower interrupt for the tsens controller.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/88eff964b708c8aff57b24370d2e14389ace09e9.1572526427.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
USB1 port has typec connector with power delivery support:
- Dual data role: host and device.
- Dual power role: source and sink, prefer power sink.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting
for it.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs.
Also, add phy-handles for dpmac17 and dpmac18 to its associated PHY.
The MAC is not capable to add the needed RGMII delays, thus the
"rgmii-id" phy-connection-type is used.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Add QSPI node in dtsi(ls1088a), and dts(ls1088ardb, ls1088aqds) boards.
Both ls1088ardb and ls1088aqds has two 64MB flash from SPANSION(s25fs512s).
QUAD I/O is tested in case of read and single I/O is tested in case of
write.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Since device properties are different, so remove fsl, ls1021a-qspi.
ls1021a-qspi is to be used only for Big-endian verion of QSPI controller
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Update the compatibles to use jedec,spi-nor.
Also update the max-frequency to 50MHz and spi-tx-bus-width to 1.
Align the QSPI node with other similar boards like(ls1088ardb,
ls1046afrwy) as per bindings.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
This board has a single 64MB mt25qu512a flash.
QUAD I/O read and single I/O write is tested.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
RDB and QDS are having one SPI-NOR flash device, mt35xu02g
connected at CS0.
This flash device "mt35xu02g" is tested for octal read
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
It is used for USB CDC ACM function.
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
The Embedded Artists COM board is based on NXP i.MX7ULP.
It has a BD70528 PMIC from Rohm with discrete DCDC powering option and
improved current observability (compared to the existing NXP i.MX7ULP EVK).
Add the initial support for the board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
This enables the Broadcom uart bluetooth driver on uart0 and gives it
ownership of its gpios. In order to use this, you must enable the
following kconfig options:
- CONFIG_BT_HCIUART_BCM
- CONFIG_SERIAL_DEV
This is applicable to rk3288-veyron series boards that use the bcm43540
wifi+bt chips.
As part of this change, also refactor the pinctrl across the various
boards. All the boards using broadcom bluetooth shouldn't touch the
bt_dev_wake pin.
Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20191127223909.253873-2-abhishekpandit@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
|
Mark switch cases where we are expecting to fall through.
This patch fixes the following error:
LINUX/arch/sh/kernel/kgdb.c: In function 'kgdb_arch_handle_exception':
LINUX/arch/sh/kernel/kgdb.c:267:6: error: this statement may fall through [-Werror=implicit-fallthrough=]
if (kgdb_hex2long(&ptr, &addr))
^
LINUX/arch/sh/kernel/kgdb.c:269:2: note: here
case 'D':
^~~~
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
|
|
During definition of the CPU thermal zone of BCM283x SoC family there
was a misunderstanding of the meaning "criticial trip point" and the
thermal throttling range of the VideoCore firmware. The latter one takes
effect when the core temperature is at least 85 degree celsius or higher
So the current critical trip point doesn't make sense, because the
thermal shutdown appears before the firmware has a chance to throttle
the ARM core(s).
Fix these unwanted shutdowns by increasing the critical trip point
to a value which shouldn't be reached with working thermal throttling.
Fixes: 0fe4d2181cc4 ("ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point")
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Depending on type of BPF programs served by BPF trampoline it can call original
function. In such case the trampoline will skip one stack frame while
returning. That will confuse function_graph tracer and will cause crashes with
bad RIP. Teach graph tracer to skip functions that have BPF trampoline attached.
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
|
|
Adjust indentation from spaces to tab (+optional two spaces) as in
coding style with command like:
$ sed -e 's/^ /\t/' -i */Kconfig
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86-ml <x86@kernel.org>
Cc: xen-devel@lists.xenproject.org
Link: https://lkml.kernel.org/r/1574306470-10305-1-git-send-email-krzk@kernel.org
|
|
Enable the remoteproc node and add the necessary pinctrl states.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-2-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add interconnect nodes that's needed to support bus scaling.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-5-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add ocmem node that is needed in order to support the GPU upstream.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-4-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add the Analogix anx78xx driver so that the external display over HDMI
can be used on Nexus 5 phones.
Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-3-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add interconnect support for msm8974-based SoCs in order to support the
GPU on this platform.
Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-2-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
PDC always-on interrupt controller can detect certain GPIOs even when
the TLMM interrupt controller is powered off. Link the PDC as TLMM's
wakeup parent.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-12-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-11-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
The tcsr syscon region is really 0x40000 in size. We need access to the
full region so that we can access the axi resets when managing the
modem subsystem.
Fixes: c7833949564e ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add the wifi node and required reserved memory to enable the wlan
hardware. Enable the wifi node in both the mtp and clamshell platforms
after adding the relevant regulators for each platform.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
While there are several peripherals on the anoc2, most are not behind the
smmu. However, the SoC integrated wlan block is behind the smmu, so we'll
need to control the smmu inorder to enable wifi.
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add QUP SE instances configuration for sc7180.
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-14-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
Michael Walle
Ard Biesheuvel
Sami Tolvanen
Kees Cook
Sandeep Maheswaram
Rajeshwari
Jeffrey Hugo
Vinod Koul
Taniya Das
Amit Kucheria
Manu Gautam
Christoph Niedermaier
Sai Prakash Ranjan
Douglas Anderson
Li Jun
Ioana Ciornei
Ashish Kumar
Kuldeep Singh
Peter Chen
Fabio Estevam
Abhishek Pandit-Subedi
Kuninori Morimoto
Stefan Wahren
Alexei Starovoitov
Krzysztof Kozlowski
Luca Weiss
Bjorn Andersson
Brian Masney
Lina Iyer
Roja Rani Yarubandi