aboutsummaryrefslogtreecommitdiffstats
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2019-12-10arm64: dts: qcom: SC7180: Add node for rpmhcc clock driverTaniya Das1-0/+11
Add node for rpmhcc clock driver. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-13-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: sc7180-idp: Add RPMh regulatorsKiran Gunda1-0/+207
Add the rpmh regulators for the sc7180 idp platform. This platform consists of PMIC PM6150 and PM6150l Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/20191108092824.9773-12-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripheralsKiran Gunda3-0/+105
Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other PMIC infra modules. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-11-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter deviceKiran Gunda1-0/+19
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Kiran Gunda <kgunda@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: sc7180: Add pdc interrupt controllerMaulik Shah1-0/+10
Add pdc interrupt controller for sc7180 Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-9-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: sc7180: Add rpmh-rsc nodeMaulik Shah1-0/+18
Add device bindings for the application processor's rsc. The rsc contains the TCS that are used for communicating with the hardened resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-6-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: qcom: sc7180: Add cmd_db reserved areaMaulik Shah1-0/+12
Command_db provides mapping for resource key and address managed by remote processor. Add cmd_db reserved memory area. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-5-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: sc7180: Add device node for apps_smmuVivek Gautam1-0/+88
Adding device node for APPS SMMU that is connected to devices such as display, video, usb, mmc, etc. on SC7180 chipset. Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191108092824.9773-4-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 socRajendra Nayak3-0/+346
Add skeletal sc7180 SoC dtsi and idp board dts files. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Co-developed-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/20191108092824.9773-3-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: dts: sdm845: thermal: Add critical interrupt supportAmit Kucheria1-4/+6
Register critical interrupts for each of the two tsens controllers Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Link: https://lore.kernel.org/r/c536e9cdb448bbad3441f6580fa57f1f921fb580.1573499020.git.amit.kucheria@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845Lina Iyer1-0/+1
Enable PDC interrupt controller for SDM845 devices. The interrupt controller can detect wakeup capable interrupts when the SoC is in a low power state. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1573855915-9841-13-git-send-email-ilina@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm watchdog driverBjorn Andersson1-0/+1
Enable the driver for the watchdog found in the application processor subsystem on most modern Qualcomm platforms. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm pseudo rngBjorn Andersson1-0/+2
Most Qualcomm platforms contain a pseudo random number generator hardware block. Enable the driver for this block and also enable the interface for exposing this to userspace. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable SN65DSI86 display bridgeJeffrey Hugo1-0/+1
This enables display on the Lenovo Yoga C630 by connecting the DSI output from the SoC to the eDP input of the panel. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable QCA Bluetooth over UARTJeffrey Hugo1-0/+1
This enables Bluetooth on the Lenovo Yoga C630. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm CPUfreq HW driverBjorn Andersson1-0/+1
The Qualcomm CPUfreq HW provides CPU voltage and frequency scaling on many modern Qualcomm SoCs. Enable the driver for this hardware block to enable this functionality on the SDM845 platform. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm socinfo driverBjorn Andersson1-0/+1
The Qualcomm socinfo driver provides SoC information to userspace using the standard soc interface as well as a number of debugfs entries. Enable this to allow certain user space tools to acquire this information, as well as getting developers access to the information in debugfs that is useful when reporting bugs. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm SPI and QSPI controllerBjorn Andersson1-0/+2
Enable the drivers for GENI SPI and QSPI controllers found on the Qualcomm SDM845 platform, among others. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10arm64: defconfig: Enable Qualcomm remoteproc dependenciesBjorn Andersson1-0/+6
Enable the the power domains, reset controllers and remote block device memory access drivers necessary to boot the Audio, Compute and Modem DSPs on Qualcomm SDM845. None of the power domains are system critical, but needs to be builtin as the driver core prohibits probe deferal past late initcall. Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Alex Elder <elder@linaro.org> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10ARM: omap2plus_defconfig: Add back DEBUG_FSTony Lindgren1-0/+1
Commit 0e4a459f56c3 ("tracing: Remove unnecessary DEBUG_FS dependency") removed select for DEBUG_FS but we still need it at least for enabling deeper idle states for the SoCs. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10ARM: omap2plus_defconfig: enable NET_SWITCHDEVGrygorii Strashko1-1/+2
The TI_CPSW_SWITCHDEV definition in Kconfig was changed from "select NET_SWITCHDEV" to "depends on NET_SWITCHDEV", and therefore it is required to explicitelly enable NET_SWITCHDEV config option in omap2plus_defconfig. Fixes: 3727d259ddaf ("arm: omap2plus_defconfig: enable new cpsw switchdev driver") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10ARM: dts: am335x-sancloud-bbe: fix phy modeMans Rullgard1-1/+1
The phy mode should be rgmii-id. For some reason, it used to work with rgmii-txid but doesn't any more. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10drivers: Fix boot problem on SuperHGuenter Roeck1-9/+2
SuperH images crash too eearly to display any console output. Bisect points to commit 507fd01d5333 ("drivers: move the early platform device support to arch/sh"). An analysis of that patch suggests that early_platform_cleanup() is now called at the wrong time. Restoring its call point fixes the problem. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Fixes: 507fd01d5333 ("drivers: move the early platform device support to arch/sh") Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Rob Landley <rob@landley.net> Link: https://lore.kernel.org/r/20191203205852.15659-1-linux@roeck-us.net Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-10ARM: dts: at91: rearrange kizbox dts using aliases nodesKamel Bouhara2-90/+86
Use aliases nodes to easy kizbox dts readability. Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Link: https://lore.kernel.org/r/20191205223021.1370083-1-kamel.bouhara@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0Nicolas Ferre1-0/+4
Specify the SoC SDCAL pin connection that is used in the sama5d27c 128MiB SiP on the SAMA5D27 SOM1. This will put in place a software workaround that would reduce power consumption on all boards using this SoM, including the SAMA5D27 SOM1 EK. Uses property introduced in 5cd41fe89704 ("dt-bindings: sdhci-of-at91: add the microchip,sdcal-inverted property") Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191205113604.9000-1-nicolas.ferre@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: dts: at91: Reenable UART TX pull-upsIngo van Lil5-20/+20
Pull-ups for SAM9 UART/USART TX lines were disabled in a previous commit. However, several chips in the SAM9 family require pull-ups to prevent the TX lines from falling (and causing an endless break condition) when the transceiver is disabled. From the SAM9G20 datasheet, 32.5.1: "To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory.". This commit reenables the pull-ups for all chips having that sentence in their datasheets. Fixes: 5e04822f7db5 ("ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx") Signed-off-by: Ingo van Lil <inguin@gmx.de> Cc: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20191203142147.875227-1-inguin@gmx.de Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10arm: dts: allwinner: H3: Add PMU nodeAndre Przywara1-3/+12
Add the Performance Monitoring Unit (PMU) device tree node to the H3 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. The numbers come from the manual and have been checked in U-Boot and with perf in Linux. Tested with perf record and taskset on an OrangePi Zero. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10arm64: dts: allwinner: H5: Add PMU nodeAndre Przywara1-3/+13
Add the Performance Monitoring Unit (PMU) device tree node to the H5 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. As with the A64, the interrupt numbers from the manual were wrong (off by 4), the actual SPI IDs have been gathered in U-Boot, and were verified with perf in Linux. Tested with perf record and taskset on an OrangePi PC2. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10arm64: dts: allwinner: H6: Add PMU modeAndre Przywara1-0/+10
Add the Performance Monitoring Unit (PMU) device tree node to the H6 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. The numbers come from the manual and have been checked in U-Boot and with perf in Linux. Tested with perf record and taskset on a Pine H64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10ARM: dts: sun8i: h3: Add rc map for Beelink X2Jernej Skrabec1-0/+1
Beelink X2 box comes with a remote. Add a mapping for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10arm64: dts: allwinner: h6: tanix-tx6: Add IR remote mappingJernej Skrabec1-0/+1
Tanix TX6 box comes with a remote. Add a mapping for it. Suggested-by: Michael Lange <linuxstuff@milaw.biz> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10arm64: dts: allwinner: add pineh64 model BCorentin Labbe2-0/+22
This patch adds the model B of the PineH64. The model B is smaller than the pine64 model A and has no PCIE slot. The only devicetree difference with the pineH64 model A, is the PHY regulator and the HDMI connector node. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10arm64: dts: allwinner: sun50i-h6-pine-h64: state that the DT supports the modelACorentin Labbe1-3/+14
The current sun50i-h6-pine-h64 DT does not specify which model (A or B) it supports. When this file was created, only modelA was existing, but now both model exists and with the time, this DT drifted to support the model B since it is the most common one. Furtheremore, some part of the model A does not work with it like ethernet and HDMI connector (as confirmed by Jernej on IRC). So it is time to settle the issue, and the easiest way was to state that this DT is for model B. Easiest since only a small name changes is required. Doing the opposite (stating this file is for model A) will add changes (for ethernet and HDMI) and so, will break too many setup. But as asked by the maintainer this patch state this file is for model A. In the process this patch adds the missing compoments to made it work on model A. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10ARM: dts: sunxi: Add Neutis N5H3 supportGeorgii Staroselskii3-0/+84
Emlid Neutis N5H3 is a version of Emlid Neutis SoM with H3 instead of H5 inside. 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device") was used as reference. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10ARM: dts: allwinner: Split out non-SoC specific parts of Neutis N5Georgii Staroselskii3-143/+175
A new variant of Emlid Neutis has been inroduced. This one uses H3 instead of H5. The boards are essentially the same. This commit moves non-SoC-specific parts out so that the common parts could be reused with ease. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-12-10x86/ACPI/sleep: Move acpi_get_wakeup_address() into sleep.c, remove <asm/realmode.h> from <asm/acpi.h>Sean Christopherson2-5/+12
Move the definition of acpi_get_wakeup_address() into sleep.c to break linux/acpi.h's dependency (by way of asm/acpi.h) on asm/realmode.h. Everyone and their mother includes linux/acpi.h, i.e. modifying realmode.h results in a full kernel rebuild, which makes the already inscrutable real mode boot code even more difficult to understand and is positively rage inducing when trying to make changes to x86's boot flow. No functional change intended. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-13-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10ACPI/sleep: Convert acpi_wakeup_address into a functionSean Christopherson3-4/+8
Convert acpi_wakeup_address from a raw variable into a function so that x86 can wrap its dereference of the real mode boot header in a function instead of broadcasting it to the world via a #define. This sets the stage for a future patch to move x86's definition of the new function, acpi_get_wakeup_address(), out of asm/acpi.h and thus break acpi.h's dependency on asm/realmode.h. No functional change intended. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-12-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/ACPI/sleep: Remove an unnecessary include of asm/realmode.hSean Christopherson1-1/+1
None of the declarations in x86's acpi/sleep.h are in any way dependent on the real mode boot code. Remove sleep.h's include of asm/realmode.h to limit the dependencies on realmode.h to code that actually interacts with the boot code. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-11-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10perf/x86/intel: Explicitly include asm/io.h to use virt_to_phys()Sean Christopherson1-0/+1
Through a labyrinthian sequence of includes, usage of virt_to_phys() is dependent on the include of asm/io.h in asm/realmode.h via asm/acpi.h. Explicitly include asm/io.h to break the dependency on realmode.h so that a future patch can remove the realmode.h include from acpi.h without breaking the build. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-6-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/kprobes: Explicitly include vmalloc.h for set_vm_flush_reset_perms()Sean Christopherson1-0/+1
The inclusion of linux/vmalloc.h, which is required for its definition of set_vm_flush_reset_perms(), is somehow dependent on asm/realmode.h being included by asm/acpi.h. Explicitly include linux/vmalloc.h so that a future patch can drop the realmode.h include from asm/acpi.h without breaking the build. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lkml.kernel.org/r/20191126165417.22423-5-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/ftrace: Explicitly include vmalloc.h for set_vm_flush_reset_perms()Sean Christopherson1-0/+1
The inclusion of linux/vmalloc.h, which is required for its definition of set_vm_flush_reset_perms(), is somehow dependent on asm/realmode.h being included by asm/acpi.h. Explicitly include linux/vmalloc.h so that a future patch can drop the realmode.h include from asm/acpi.h without breaking the build. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Link: https://lkml.kernel.org/r/20191126165417.22423-4-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/boot: Explicitly include realmode.h to handle RM reservationsSean Christopherson1-0/+1
Explicitly include asm/realmode.h, which provides reserve_real_mode(), instead of picking it up by an indirect include of asm/acpi.h. acpi.h will soon stop including realmode.h so that changing realmode.h doesn't require a full kernel rebuild. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-3-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/efi: Explicitly include realmode.h to handle RM trampoline quirkSean Christopherson1-0/+1
Explicitly include asm/realmode.h, which is needed to handle a real mode trampoline quirk in efi_free_boot_services(), instead of picking it up by way of linux/acpi.h. acpi.h will soon stop including realmode.h so that changing realmode.h doesn't require a full kernel rebuild. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/20191126165417.22423-2-sean.j.christopherson@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/platform/intel/quark: Explicitly include linux/io.h for virt_to_phys()Ingo Molnar2-0/+4
Similarly to the previous patches by Sean Christopherson: "Through a labyrinthian sequence of includes, usage of virt_to_phys() is dependent on the include of asm/io.h in x86's asm/realmode.h, which is included in x86's asm/acpi.h and thus by linux/acpi.h. Explicitly include linux/io.h to break the dependency on realmode.h so that a future patch can remove the realmode.h include from acpi.h without breaking the build." Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Link: https://lkml.kernel.org/r/157475520975.21853.16355518818746065226.tip-bot2@tip-bot2 Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10mm, x86/mm: Untangle address space layout definitions from basic pgtable type definitionsIngo Molnar12-143/+169
- Untangle the somewhat incestous way of how VMALLOC_START is used all across the kernel, but is, on x86, defined deep inside one of the lowest level page table headers. It doesn't help that vmalloc.h only includes a single asm header: #include <asm/page.h> /* pgprot_t */ So there was no existing cross-arch way to decouple address layout definitions from page.h details. I used this: #ifndef VMALLOC_START # include <asm/vmalloc.h> #endif This way every architecture that wants to simplify page.h can do so. - Also on x86 we had a couple of LDT related inline functions that used the late-stage address space layout positions - but these could be uninlined without real trouble - the end result is cleaner this way as well. Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Rik van Riel <riel@redhat.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10mm/vmalloc: Add empty <asm/vmalloc.h> headers and use them from <linux/vmalloc.h>Ingo Molnar25-0/+100
In the x86 MM code we'd like to untangle various types of historic header dependency spaghetti, but for this we'd need to pass to the generic vmalloc code various vmalloc related defines that customarily come via the <asm/page.h> low level arch header. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/mm/pat: Mark __cpa_flush_tlb() as statickbuild test robot1-1/+1
Signed-off-by: kbuild test robot <lkp@intel.com> Link: https://lkml.kernel.org/r/20191123153023.bj6m66scjeubhbjg@4978f4969bb8 Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/mm: Tabulate the page table encoding definitionsIngo Molnar1-63/+68
I got lost in trying to figure out which bits were enabled in one of the PTE masks, so let's make it pretty obvious at the definition site already: #define PAGE_NONE __pg( 0| 0| 0|___A| 0| 0| 0|___G) #define PAGE_SHARED __pg(__PP|__RW|_USR|___A|__NX| 0| 0| 0) #define PAGE_SHARED_EXEC __pg(__PP|__RW|_USR|___A| 0| 0| 0| 0) #define PAGE_COPY_NOEXEC __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) #define PAGE_COPY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0) #define PAGE_COPY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) #define PAGE_READONLY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) #define PAGE_READONLY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0) #define __PAGE_KERNEL (__PP|__RW| 0|___A|__NX|___D| 0|___G) #define __PAGE_KERNEL_EXEC (__PP|__RW| 0|___A| 0|___D| 0|___G) #define _KERNPG_TABLE_NOENC (__PP|__RW| 0|___A| 0|___D| 0| 0) #define _KERNPG_TABLE (__PP|__RW| 0|___A| 0|___D| 0| 0| _ENC) #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0) #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC) #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G) #define __PAGE_KERNEL_RX (__PP| 0| 0|___A| 0|___D| 0|___G) #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC) #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G) #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G) #define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G) #define __PAGE_KERNEL_WP (__PP|__RW| 0|___A|__NX|___D| 0|___G| __WP) Especially security relevant bits like 'NX' or coherence related bits like 'G' are now super easy to read based on a single grep. We do the underscore gymnastics to not pollute the kernel's symbol namespace, and the longest line still fits into 80 columns, so this should be readable for everyone. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/mm/pat: Fix typo in the Kconfig help textIngo Molnar1-1/+1
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-12-10x86/mm/pat: Clean up <asm/memtype.h> externsIngo Molnar1-5/+5
Half of the declarations have an 'extern', half of them not, use 'extern' consistently. This makes grepping for APIs easier, such as: dagon:~/tip> git grep -E '\<memtype_.*\(' arch/x86/ | grep extern arch/x86/include/asm/memtype.h:extern int memtype_reserve(u64 start, u64 end, arch/x86/include/asm/memtype.h:extern int memtype_free(u64 start, u64 end); arch/x86/include/asm/memtype.h:extern int memtype_kernel_map_sync(u64 base, unsigned long size, arch/x86/include/asm/memtype.h:extern int memtype_reserve_io(resource_size_t start, resource_size_t end, arch/x86/include/asm/memtype.h:extern void memtype_free_io(resource_size_t start, resource_size_t end); arch/x86/mm/pat/memtype.h:extern int memtype_check_insert(struct memtype *entry_new, arch/x86/mm/pat/memtype.h:extern struct memtype *memtype_erase(u64 start, u64 end); arch/x86/mm/pat/memtype.h:extern struct memtype *memtype_lookup(u64 addr); arch/x86/mm/pat/memtype.h:extern int memtype_copy_nth_element(struct memtype *entry_out, loff_t pos); Signed-off-by: Ingo Molnar <mingo@kernel.org>
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.