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2019-11-01ARM: dts: sun8i: a83t: Add Security System nodeCorentin Labbe1-0/+9
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms. It could be found on Allwinner SoC A80 and A83T This patch adds it on the Allwinner A83T SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. This patch enables the Crypto Engine on the Allwinner H6 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add crypto engine node on H5Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H5 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64Corentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner A64 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: H3: Add Crypto Engine nodeCorentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01ARM: dts: sun8i: R40: add crypto engine nodeCorentin Labbe1-0/+9
The Crypto Engine is a hardware cryptographic offloader that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01crypto: skcipher - rename the crypto_blkcipher module and kconfig optionEric Biggers2-7/+7
Now that the blkcipher algorithm type has been removed in favor of skcipher, rename the crypto_blkcipher kernel module to crypto_skcipher, and rename the config options accordingly: CONFIG_CRYPTO_BLKCIPHER => CONFIG_CRYPTO_SKCIPHER CONFIG_CRYPTO_BLKCIPHER2 => CONFIG_CRYPTO_SKCIPHER2 Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01crypto: arm64/aes-neonbs - add return value of skcipher_walk_done() in __xts_crypt()Yunfeng Ye1-1/+1
A warning is found by the static code analysis tool: "Identical condition 'err', second condition is always false" Fix this by adding return value of skcipher_walk_done(). Fixes: 67cfa5d3b721 ("crypto: arm64/aes-neonbs - implement ciphertext stealing for XTS") Signed-off-by: Yunfeng Ye <yeyunfeng@huawei.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable FMC and SPI devicesJoel Stanley1-0/+31
Tacoma has two SPI flash devices attached to the FMC, and one on the SPI controller. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add i2c devicesBrad Bishop1-0/+365
Add fan controllers, regulators, temperature sensors, power supplies and regulators. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Describe FSI mastersJoel Stanley1-0/+20
The ast2600 has two FSI masters on the APB. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add "spi-max-frequency" propertyCédric Le Goater7-1/+20
Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz for the PNOR on the machines using a AST2500 SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Migrate away from aspeed, g[45].* compatiblesAndrew Jeffery2-2/+2
Use the SoC-specific compatible strings instead. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: vesnin: Add power_green ledAlexander Filippov1-0/+4
Adds a new power_green led to show the host state. Signed-off-by: Alexander Filippov <a.filippov@yadro.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Add gpio-key definitionsEddie James1-0/+60
Add gpio-keys for various signals on Tacoma. Signed-off-by: Eddie James <eajames@linux.ibm.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Add pinmux properties for enabled MACsAndrew Jeffery1-0/+9
All 2600-evb MACs use RGMII/MDIO. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add pinctrl properties to MDIO nodesAndrew Jeffery1-0/+8
This way enabling the MDIO controllers automatically requests the right pinmux configuration. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Fix EMMC function in pinctrl dtsiAndrew Jeffery1-7/+2
The binding was updated to better reflect the intended use of the hardware and the existing function/groups for SD3 were dropped. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: ast2600evb: Use custom flash layoutJoel Stanley1-1/+31
The AST2600 u-boot and kernel images have outgrown the OpenBMC layout. While BMC machines use 128MB SPI NOR chips, we only have 64MB on the EVB so use a layout that has a smaller region for the ro and rw filesystems. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: Enable FMC and SPI devicesCédric Le Goater1-0/+24
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable FMC and SPI devicesJoel Stanley1-0/+31
Tacoma has two SPI flash devices attached to the FMC, and one on the SPI controller. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Enable FMC and SPI devicesCédric Le Goater1-0/+31
Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add i2c devicesBrad Bishop1-0/+365
Add fan controllers, regulators, temperature sensors, power supplies and regulators. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: rainier: Add mac devicesBrad Bishop1-0/+14
Rainier contains two NCSI network devices. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add Rainier systemBrad Bishop2-0/+54
Rainier is a new IBM server with POWER host processors and an AST2600 BMC. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: Add 128MiB OpenBMC flash layoutBrad Bishop1-0/+32
This is an alternate layout used by OpenBMC systems that require more space on the BMC's flash. In addition to more space for the rootfs, it supports a larger u-boot and Linux kernel FIT image. The division of space is as follows: u-boot + env: 1MB kernel/FIT: 9MB rwfs: 86MB rofs: 32MB Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: fp5280g2: Add LED configurationChicago Duan1-15/+40
Change BMC init-ok from GPIO to LED, which needs to blink when BMC initialization is complete. Use TAB to align some lines. Signed-off-by: Chicago Duan <duanzhijia01@inspur.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: tacoma: Enable I2C bussesEddie James1-0/+368
Enable all the I2C busses on Tacoma and add the I2C slave devices that exist on the busses. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed: Add Tacoma machineJoel Stanley2-0/+442
This is an AST2600 based BMC card for a Power9 system. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add FMC and SPI devicesCédric Le Goater1-0/+79
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add lpc devicesBrad Bishop1-0/+87
Everything is the same as G5, except the devices have their own interrupt now. Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add VUART descriptionsJoel Stanley1-0/+22
The AST2600 has two VUART devices. Reviewed-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add i2c busesJoel Stanley1-0/+266
The AST2600 has 16 I2C buses each with their own global IRQ line. Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: aspeed-g6: Add gpio devicesRashmica Gupta1-0/+26
The AST2600 has 208 normal GPIO pins and 36 1.8V GPIOs. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-11-01ARM: dts: ast2600-evb: eMMC configurationAndrew Jeffery2-3/+9
Enable the eMMC controller and limit it to 52MHz to avoid the host controller reporting bus error conditions. Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-10-31arm64: dts: qcom: msm8998: Disable coresight by defaultSai Prakash Ranjan2-17/+102
Boot failure has been reported on MSM8998 based laptop when coresight is enabled. This is most likely due to lack of firmware support for coresight on production device when compared to debug device like MTP where this issue is not observed. So disable coresight by default for MSM8998 and enable it only for MSM8998 MTP. Reported-and-tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Fixes: 783abfa2249a ("arm64: dts: qcom: msm8998: Add Coresight support") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-31arm64: dts: qcom: msm8998-clamshell: Remove retention idle stateJeffrey Hugo1-0/+37
The retention idle state does not appear to be supported by the firmware present on the msm8998 laptops since the state is advertised as disabled in ACPI, and attempting to enable the state in DT is observed to result in boot hangs. Therefore, remove the state from use to address the observed issues. Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Fixes: 2c6d2d3a580a (arm64: dts: qcom: Add Lenovo Miix 630) Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-11-01Merge tag 'kvm-ppc-next-5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEADPaolo Bonzini18-159/+264
KVM PPC update for 5.5 * Add capability to tell userspace whether we can single-step the guest. * Improve the allocation of XIVE virtual processor IDs, to reduce the risk of running out of IDs when running many VMs on POWER9. * Rewrite interrupt synthesis code to deliver interrupts in virtual mode when appropriate. * Minor cleanups and improvements.
2019-10-31MIPS: SGI-IP27: fix exception handler replicationThomas Bogendoerfer3-26/+6
Commit 775b089aeffa ("MIPS: tlbex: Remove cpu_has_local_ebase") removed generating tlb refill handlers for every CPU, which was needed for generating per node exception handlers on IP27. Instead of resurrecting (and fixing) refill handler generation, we simply copy all exception vectors from the boot node to the other nodes. Also remove the config option since the memory tradeoff for expection handler replication is just 8k per node. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-10-31MIPS: Loongson64: Rename CPU TYPESJiaxun Yang31-93/+92
CPU_LOONGSON2 -> CPU_LOONGSON2EF CPU_LOONGSON3 -> CPU_LOONGSON64 As newer loongson-2 products (2G/2H/2K1000) can share kernel implementation with loongson-3 while 2E/2F are less similar with other LOONGSON64 products. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: chenhc@lemote.com Cc: paul.burton@mips.com
2019-10-31ARM: 8928/1: ARM_ERRATA_775420: Spelling s/date/data/Geert Uytterhoeven1-1/+1
Caching dates is never a good idea ;-) Fixes: 7253b85cc62d6ff8 ("ARM: 7541/1: Add ARM ERRATA 775420 workaround") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8925/1: tcm: include <asm/tcm.h> for missing declarationsBen Dooks1-0/+1
The arch/arm/kernel/tcm.c should include <asm/tcm.h> for declarations of tcm_alloc, tcm_free and other functions. Fixes the following sparse warnings: arch/arm/kernel/tcm.c:74:6: warning: symbol 'tcm_alloc' was not declared. Should it be static? arch/arm/kernel/tcm.c:92:6: warning: symbol 'tcm_free' was not declared. Should it be static? arch/arm/kernel/tcm.c:98:6: warning: symbol 'tcm_dtcm_present' was not declared. Should it be static? arch/arm/kernel/tcm.c:104:6: warning: symbol 'tcm_itcm_present' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8924/1: tcm: make dtcm_end and itcm_end staticBen Dooks1-2/+2
The dtcm_end and itcm_end are not exported or used elsewhere, so make them static to remove the following sparse warnign: arch/arm/kernel/tcm.c:33:5: warning: symbol 'dtcm_end' was not declared. Should it be static? arch/arm/kernel/tcm.c:34:5: warning: symbol 'itcm_end' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8923/1: mm: include <asm/vga.h> for vga_baseBen Dooks (Codethink)1-0/+2
iomap.c needs <asm/vga.h> for the definition vga_base to avoid the following warning: arch/arm/mm/iomap.c:13:15: warning: symbol 'vga_base' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8922/1: parse_dt_topology() rate is pointer to __be32Ben Dooks (Codethink)1-1/+1
The rate pointer in parse_dt_topology is a pointer to a __be32, not a u32. This fixes the following sparse warning: arch/arm/kernel/topology.c:128:43: warning: incorrect type in argument 1 (different base types) arch/arm/kernel/topology.c:128:43: expected restricted __be32 const [usertype] *p arch/arm/kernel/topology.c:128:43: got unsigned int const [usertype] *[assigned] rate Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8920/1: share get_signal_page from signal.c to process.cBen Dooks (Codethink)2-0/+4
The get_signal_page() function is defined in signal.c and used in process.c but there is no shared definition. Add one in signal.h to silence the following warning: arch/arm/kernel/signal.c:683:13: warning: symbol 'get_signal_page' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31ARM: 8919/1: make unexported functions staticBen Dooks (Codethink)1-3/+3
The psci_cpu_{disable,die,kill} functions are not exported, so make them static to avoid the following warnings: arch/arm/kernel/psci_smp.c:54:5: warning: symbol 'psci_cpu_disable' was not declared. Should it be static? arch/arm/kernel/psci_smp.c:67:6: warning: symbol 'psci_cpu_die' was not declared. Should it be static? arch/arm/kernel/psci_smp.c:79:5: warning: symbol 'psci_cpu_kill' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-31s390/idle: fix cpu idle time calculationHeiko Carstens1-7/+22
The idle time reported in /proc/stat sometimes incorrectly contains huge values on s390. This is caused by a bug in arch_cpu_idle_time(). The kernel tries to figure out when a different cpu entered idle by accessing its per-cpu data structure. There is an ordering problem: if the remote cpu has an idle_enter value which is not zero, and an idle_exit value which is zero, it is assumed it is idle since "now". The "now" timestamp however is taken before the idle_enter value is read. Which in turn means that "now" can be smaller than idle_enter of the remote cpu. Unconditionally subtracting idle_enter from "now" can thus lead to a negative value (aka large unsigned value). Fix this by moving the get_tod_clock() invocation out of the loop. While at it also make the code a bit more readable. A similar bug also exists for show_idle_time(). Fix this is as well. Cc: <stable@vger.kernel.org> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2019-10-31s390/unwind: fix mixing regs and spIlya Leoshkevich2-5/+14
unwind_for_each_frame stops after the first frame if regs->gprs[15] <= sp. The reason is that in case regs are specified, the first frame should be regs->psw.addr and the second frame should be sp->gprs[8]. However, currently the second frame is regs->gprs[15], which confuses outside_of_stack(). Fix by introducing a flag to distinguish this special case from unwinding the interrupt handler, for which the current behavior is appropriate. Fixes: 78c98f907413 ("s390/unwind: introduce stack unwind API") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Cc: stable@vger.kernel.org # v5.2+ Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2019-10-31s390/cmm: fix information leak in cmm_timeout_handler()Yihui ZENG1-6/+6
The problem is that we were putting the NUL terminator too far: buf[sizeof(buf) - 1] = '\0'; If the user input isn't NUL terminated and they haven't initialized the whole buffer then it leads to an info leak. The NUL terminator should be: buf[len - 1] = '\0'; Signed-off-by: Yihui Zeng <yzeng56@asu.edu> Cc: stable@vger.kernel.org Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> [heiko.carstens@de.ibm.com: keep semantics of how *lenp and *ppos are handled] Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>