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2019-10-10arm64: dts: rockchip: Fix usb-c on Hugsun X99 TV BoxVivek Unune1-2/+2
Fix usb-c on X99 TV Box. Tested with armbian w/ kernel 5.3 Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Link: https://lore.kernel.org/r/20190929032230.24628-1-npcomplete13@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-10arm64: dts: rockchip: fix RockPro64 sdmmc settingsSoeren Moch1-1/+0
According to the RockPro64 schematic [1] the rk3399 sdmmc controller is connected to a microSD (TF card) slot. Remove the cap-mmc-highspeed property of the sdmmc controller, since no mmc card can be connected here. [1] http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64") Signed-off-by: Soeren Moch <smoch@web.de> Link: https://lore.kernel.org/r/20191004203213.4995-1-smoch@web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-10ARM: 8914/1: NOMMU: Fix exc_ret for XIPVladimir Murzin3-5/+7
It was reported that 72cd4064fcca "NOMMU: Toggle only bits in EXC_RETURN we are really care of" breaks NOMMU+XIP combination. It happens because saved EXC_RETURN gets overwritten when data section is relocated. The fix is to propagate EXC_RETURN via register and let relocation code to commit that value into memory. Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") Reported-by: afzal mohammed <afzal.mohd.ma@gmail.com> Tested-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-10ARM: 8908/1: add __always_inline to functions called from __get_user_check()Masahiro Yamada2-6/+6
KernelCI reports that bcm2835_defconfig is no longer booting since commit ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly") (https://lkml.org/lkml/2019/9/26/825). I also received a regression report from Nicolas Saenz Julienne (https://lkml.org/lkml/2019/9/27/263). This problem has cropped up on bcm2835_defconfig because it enables CONFIG_CC_OPTIMIZE_FOR_SIZE. The compiler tends to prefer not inlining functions with -Os. I was able to reproduce it with other boards and defconfig files by manually enabling CONFIG_CC_OPTIMIZE_FOR_SIZE. The __get_user_check() specifically uses r0, r1, r2 registers. So, uaccess_save_and_enable() and uaccess_restore() must be inlined. Otherwise, those register assignments would be entirely dropped, according to my analysis of the disassembly. Prior to commit 9012d011660e ("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING"), the 'inline' marker was always enough for inlining functions, except on x86. Since that commit, all architectures can enable CONFIG_OPTIMIZE_INLINING. So, __always_inline is now the only guaranteed way of forcible inlining. I added __always_inline to 4 functions in the call-graph from the __get_user_check() macro. Fixes: 9012d011660e ("compiler: allow all arches to enable CONFIG_OPTIMIZE_INLINING") Reported-by: "kernelci.org bot" <bot@kernelci.org> Reported-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-10ARM: dts: rockchip: Use interpolated brightness tables for veyronMatthias Kaehlcke4-132/+8
Use interpolated brightness tables (added by commit 573fe6d1c25 ("backlight: pwm_bl: Linear interpolation between brightness-levels") for veyron, instead of specifying every single step. Some devices/panels have intervals that are smaller than the specified 'num-interpolated-steps', the driver interprets these intervals as a single step. Another option would be to switch to a perceptual brightness curve (CIE 1931), with the caveat that it would change the behavior of the backlight. Also the concept of a minimum brightness level is currently not supported for CIE 1931 curves. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20191003094137.v2.1.Ic9fd698810ea569c465350154da40b85d24f805b@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-10arm64: dts: rockchip: add cr50 tpm to rk3399-gru scarlet and bobHeiko Stuebner2-0/+20
Scarlet and Bob use the Google-developed cr50 chip to do things like TPM and closed-case-debugging. Add the nodes describing the cr50 and its spi-connection. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20180822120925.12388-1-heiko@sntech.de
2019-10-10mips: Fix unroll macro when building with ClangNathan Chancellor1-1/+2
Building with Clang errors after commit 6baaeadae911 ("MIPS: Provide unroll() macro, use it for cache ops") since the GCC_VERSION macro is defined in include/linux/compiler-gcc.h, which is only included in compiler.h when using GCC: In file included from arch/mips/kernel/mips-mt.c:20: ./arch/mips/include/asm/r4kcache.h:254:1: error: use of undeclared identifier 'GCC_VERSION'; did you mean 'S_VERSION'? __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, ) ^ ./arch/mips/include/asm/r4kcache.h:219:4: note: expanded from macro '__BUILD_BLAST_CACHE' cache_unroll(32, kernel_cache, indexop, ^ ./arch/mips/include/asm/r4kcache.h:203:2: note: expanded from macro 'cache_unroll' unroll(times, _cache_op, insn, op, (addr) + (i++ * (lsize))); ^ ./arch/mips/include/asm/unroll.h:28:15: note: expanded from macro 'unroll' BUILD_BUG_ON(GCC_VERSION >= 40700 && \ ^ Use CONFIG_GCC_VERSION, which will always be set by Kconfig. Additionally, Clang 8 had improvements around __builtin_constant_p so use that as a lower limit for this check with Clang (although MIPS wasn't buildable until Clang 9); building a kernel with Clang 9.0.0 has no issues after this change. Fixes: 6baaeadae911 ("MIPS: Provide unroll() macro, use it for cache ops") Link: https://github.com/ClangBuiltLinux/linux/issues/736 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: clang-built-linux@googlegroups.com Cc: Nick Desaulniers <ndesaulniers@google.com>
2019-10-10MIPS: Disable Loongson MMI instructions for kernel buildPaul Burton2-0/+5
GCC 9.x automatically enables support for Loongson MMI instructions when using some -march= flags, and then errors out when -msoft-float is specified with: cc1: error: ‘-mloongson-mmi’ must be used with ‘-mhard-float’ The kernel shouldn't be using these MMI instructions anyway, just as it doesn't use floating point instructions. Explicitly disable them in order to fix the build with GCC 9.x. Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes: 3702bba5eb4f ("MIPS: Loongson: Add GCC 4.4 support for Loongson2E") Fixes: 6f7a251a259e ("MIPS: Loongson: Add basic Loongson 2F support") Fixes: 5188129b8c9f ("MIPS: Loongson-3: Improve -march option and move it to Platform") Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: stable@vger.kernel.org # v2.6.32+ Cc: linux-mips@vger.kernel.org
2019-10-10MIPS: elf_hwcap: Export userspace ASEsJiaxun Yang2-0/+44
A Golang developer reported MIPS hwcap isn't reflecting instructions that the processor actually supported so programs can't apply optimized code at runtime. Thus we export the ASEs that can be used in userspace programs. Reported-by: Meng Zhuo <mengzhuo1203@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-mips@vger.kernel.org Cc: Paul Burton <paul.burton@mips.com> Cc: <stable@vger.kernel.org> # 4.14+ Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-10-10MIPS: cmdline: Clean up boot_command_line initializationPaul Burton1-42/+83
Our current code to initialize boot_command_line is a mess. Some of this is due to the addition of too many options over the years, and some of this is due to workarounds for early_init_dt_scan_chosen() performing actions specific to options from other architectures that probably shouldn't be in generic code. Clean this up by introducing a new bootcmdline_init() function that simplifies the initialization somewhat. The major changes are: - Because bootcmdline_init() is a function it can return early in the CONFIG_CMDLINE_OVERRIDE case. - We clear boot_command_line rather than inheriting whatever early_init_dt_scan_chosen() may have left us. This means we no longer need to set boot_command_line to a space character in an attempt to prevent early_init_dt_scan_chosen() from copying CONFIG_CMDLINE into boot_command_line without us knowing about it. - Indirection via USE_PROM_CMDLINE, USE_DTB_CMDLINE, EXTEND_WITH_PROM & BUILTIN_EXTEND_WITH_PROM macros is removed; they seemingly served only to obfuscate the code. - The logic is cleaner, clearer & commented. Two minor drawbacks of this approach are: 1) We call of_scan_flat_dt(), which means we scan through the DT again. The overhead is fairly minimal & shouldn't be noticeable. 2) cmdline_scan_chosen() duplicates a small amount of the logic from early_init_dt_scan_chosen(). Alternatives might be to allow the generic FDT code to keep & expose a copy of the arguments taken from the /chosen node's bootargs property, or to introduce a function like early_init_dt_scan_chosen() that retrieves them without modification to handle CONFIG_CMDLINE. Neither of these sounds particularly cleaner though, and this way we at least keep the extra work in arch/mips. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2019-10-10ARM: bcm: Add support for BCM2711 SoCStefan Wahren4-4/+32
Add the BCM2711 to ARCH_BCM2835, but use new machine board code because of the differences. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
2019-10-10arm64: dts: broadcom: Add reference to RPi 4 BStefan Wahren2-1/+4
This adds a reference to the dts of the Raspberry Pi 4 B, so we don't need to maintain the content in arm64. Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
2019-10-10ARM: dts: Add minimal Raspberry Pi 4 supportStefan Wahren5-2/+977
This adds minimal support for the new Raspberry Pi 4 without the fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory size to zero and let the bootloader take care of it. The DWC2 is still usable as peripheral via the USB-C port. Other differences to the Raspberry Pi 3: - additional GIC 400 Interrupt controller - new thermal IP and HWRNG - additional MMC interface (emmc2) - additional UART, I2C, SPI and PWM interfaces - clock stretching bug in I2C IP has been fixed Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
2019-10-10ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsiStefan Wahren6-177/+198
As preparation we want all common BCM2711 + BCM2835/6/7 functions in bcm283x.dtsi and all BCM2835/6/7 specific in the new bcm2835-common.dtsi. Since i2c2 is BCM2835 specific, we also need to move it to bcm2835-common.dtsi. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net>
2019-10-10ARM: dts: bcm283x: Remove brcm,bcm2835-pl011 compatibleStefan Wahren1-1/+1
The downstream compatible brcm,bcm2835-pl011 hasn't been upstreamed yet. So remove it. Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
2019-10-10ARM: dts: bcm283x: Remove simple-bus from fixed clocksStefan Wahren1-8/+2
The fixed clocks doesn't form some kind of bus. So let's remove it. This fixes the follow DT schema warnings: clocks: clock@3:reg:0: [3] is too short clocks: clock@4:reg:0: [4] is too short clocks: $nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' clocks: #size-cells:0:0: 0 is not one of [1, 2] clocks: 'ranges' is a required property clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
2019-10-10Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2-0/+2
Pull crypto fixes from Herbert Xu: "Fix build issues in arm/aes-ce" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: arm/aes-ce - add dependency on AES library crypto: arm/aes-ce - build for v8 architecture explicitly
2019-10-10ARM: dts: omap5: Add PRM dataTero Kristo1-0/+26
Add PRM data for OMAP54xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: am43xx: Add PRM dataTero Kristo1-0/+26
Add PRM data for AM43xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: am33xx: Add PRM dataTero Kristo1-0/+26
Add PRM data for AM33xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: omap4: add PRM nodesTero Kristo2-1/+27
Add PRM nodes for omap4 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: dra7: add PRM nodesTero Kristo1-0/+51
Add PRM nodes for dra7 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10arm64: dts: renesas: r8a774b1: Add INTC-EX device nodeFabrizio Castro1-0/+16
Add support for the Interrupt Controller for External Devices (INTC-EX) on RZ/G2N. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570531132-21856-11-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add USB3.0 device nodesFabrizio Castro1-3/+22
Add usb3.0 phy, host and function device nodes on RZ/G2N SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570531132-21856-10-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add USB-DMAC and HSUSB device nodesFabrizio Castro1-1/+41
Add usb dmac and hsusb device nodes to the RZ/G2N SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570531132-21856-9-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add USB2.0 phy and host (EHCI/OHCI) device nodesFabrizio Castro1-6/+49
Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2N SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570531132-21856-8-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add Sound and Audio DMAC device nodesBiju Das1-10/+464
Based on a similar patch of the R8A7796 device tree by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1570200761-884-2-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: hihope-rzg2-ex: Let the board specific DT decide about pciec1Fabrizio Castro2-4/+4
The plan for the HiHope RZ/G2N board is to enable pciec0 by default, and use pciec1 physical interface for SATA (as SATA and PCIE1 share the same physical interface), therefore move pciec1 enabling away from hihope-rzg2-ex. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570178133-21532-8-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add PCIe device nodesFabrizio Castro1-2/+40
This patch adds PCIe{0,1} device nodes for R8A774B1 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Link: https://lore.kernel.org/r/1570178133-21532-7-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add all MSIOF nodesFabrizio Castro1-0/+62
Add the device nodes for all MSIOF SPI controllers on the RZ/G2N SoC (a.k.a. r8a774b1). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570178133-21532-6-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add RWDT nodeFabrizio Castro1-1/+6
Populate the device tree node for the Watchdog Timer (RWDT) controller on the Renesas RZ/G2N (r8a774b1) SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Link: https://lore.kernel.org/r/1570178133-21532-5-git-send-email-fabrizio.castro@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: Add support for Advantech idk-1110wr LVDS panelBiju Das1-0/+41
This patch adds support for Advantech idk-1110wr LVDS panel. The HiHope RZ/G2[MN] is advertised as compatible with panel idk-1110wr from Advantech, however the panel isn't sold alongside the board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-10-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: hihope-rzg2-ex: Add LVDS supportBiju Das1-0/+29
This patch adds LVDS support for RZ/G2[MN] boards. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-9-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: hihope-rzg2-ex: Enable backlightBiju Das1-0/+20
This patch enables backlight support. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-8-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add PWM device nodesBiju Das1-0/+70
This patch adds PWM device nodes to r8a774b1 SoC DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-7-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add FDP1 device nodesBiju Das1-0/+10
The r8a774b1 has a single FDP1 instance. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-6-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1-hihope-rzg2n: Add display clock propertiesBiju Das1-0/+11
Add display clock properties for the HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add HDMI encoder instanceBiju Das1-0/+15
Add the HDMI encoder to the R8A774B1 DT in disabled state. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-4-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add DU device to DTBiju Das1-0/+38
Add the DU device to r8a774b1 SoC DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsiBiju Das2-8/+11
RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to reuse the common dtsi for both the boards, it is required to move du clock properties from common dtsi to board specific dts. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-2-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Connect Ethernet-AVB to IPMMU-DS0Biju Das1-0/+1
Add IPMMU-DS0 to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-8-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Tie SYS-DMAC to IPMMU-DS0/1Biju Das1-0/+24
Hook up r8a774b1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Based on work for the r8a7796 by Magnus Damm. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-7-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add VSP instancesBiju Das1-0/+44
The r8a774b1 has 4 VSP instances. Based on the work done for r8a77965 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-6-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add FCPF and FCPV instancesBiju Das1-0/+40
Add FCPF and FCPV instances to the r8a774b1 dtsi. Based on the work done for r8a77965 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add IPMMU device nodesBiju Das1-0/+73
Add RZ/G2N (R8A774B1) IPMMU nodes. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-4-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add I2C and IIC-DVFS supportBiju Das1-1/+125
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS) devices nodes to the r8a774b1 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add SDHI supportBiju Das1-4/+32
Add SDHI support for the r8a774b1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569313375-53428-2-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add TMU device nodesBiju Das1-0/+65
This patch adds TMU[01234] device tree nodes to the r8a774b1 SoC specific DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569250648-33857-5-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add CMT device nodesBiju Das1-0/+70
This patch adds the CMT[0123] device tree nodes to the r8a774b1 SoC specific DT. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569250648-33857-4-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-10arm64: dts: renesas: r8a774b1: Add RZ/G2N thermal supportBiju Das1-0/+74
Add thermal support for R8A774B1 (RZ/G2N) SoC. Based on the work done for r8a77965 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569250648-33857-3-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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