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2019-06-26x86/kexec: Make variable static and config dependentTiezhu Yang1-1/+3
The following sparse warning is emitted: arch/x86/kernel/crash.c:59:15: warning: symbol 'crash_zero_bytes' was not declared. Should it be static? The variable is only used in this compilation unit, but it is also only used when CONFIG_KEXEC_FILE is enabled. Just making it static would result in a 'defined but not used' warning for CONFIG_KEXEC_FILE=n. Make it static and move it into the existing CONFIG_KEXEC_FILE section. [ tglx: Massaged changelog and moved it into the existing ifdef ] Fixes: dd5f726076cc ("kexec: support for kexec on panic using new system call") Signed-off-by: Tiezhu Yang <kernelpatch@126.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Dave Young <dyoung@redhat.com> Cc: bp@alien8.de Cc: hpa@zytor.com Cc: kexec@lists.infradead.org Cc: vgoyal@redhat.com Cc: Vivek Goyal <vgoyal@redhat.com> Link: https://lkml.kernel.org/r/117ef0c6.3d30.16b87c9cfbf.Coremail.kernelpatch@126.com
2019-06-26x86/speculation/mds: Eliminate leaks by trace_hardirqs_on()Zhenzhong Duan1-2/+2
Move mds_idle_clear_cpu_buffers() after trace_hardirqs_on() to ensure all store buffer entries are flushed. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: bp@alien8.de Cc: hpa@zytor.com Cc: jgross@suse.com Cc: ndesaulniers@google.com Cc: gregkh@linuxfoundation.org Link: https://lkml.kernel.org/r/1561260904-29669-2-git-send-email-zhenzhong.duan@oracle.com
2019-06-26x86/platform/geode: Drop <linux/gpio.h> includesLinus Walleij3-3/+0
These board files only use gpio_keys not gpio in general. This include is just surplus, delete it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-gpio@vger.kernel.org Cc: Andres Salomon <dilinger@queued.net> Cc: linux-geode@lists.infradead.org Cc: Andy Shevchenko <andy@infradead.org> Cc: Darren Hart <dvhart@infradead.org> Cc: platform-driver-x86@vger.kernel.org Link: https://lkml.kernel.org/r/20190626092119.3172-1-linus.walleij@linaro.org
2019-06-26arm64: vdso: Fix compilation with clang older than 8Vincenzo Frascino1-0/+7
clang versions older than 8 do not support -mcmodel=tiny. Add a check to the vDSO Makefile for arm64 to remove the flag when these versions of the compiler are detected. Reported-by: Qian Cai <cai@lca.pw> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Qian Cai <cai@lca.pw> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: catalin.marinas@arm.com Cc: will.deacon@arm.com Cc: arnd@arndb.de Cc: linux@armlinux.org.uk Cc: ralf@linux-mips.org Cc: paul.burton@mips.com Cc: daniel.lezcano@linaro.org Cc: salyzyn@android.com Cc: pcc@google.com Cc: shuah@kernel.org Cc: 0x7f454c46@gmail.com Cc: linux@rasmusvillemoes.dk Cc: huw@codeweavers.com Cc: sthotton@marvell.com Cc: andre.przywara@arm.com Cc: luto@kernel.org Link: https://lkml.kernel.org/r/20190626113632.9295-1-vincenzo.frascino@arm.com
2019-06-26arm64: compat: Fix __arch_get_hw_counter() implementationVincenzo Frascino1-0/+18
Provide the following fixes for the __arch_get_hw_counter() implementation on arm64: - Fallback on syscall when an unstable counter is detected. - Introduce isb()s before and after the counter read to avoid speculation of the counter value and of the seq lock respectively. The second isb() is a temporary solution that will be revisited in 5.3-rc1. These fixes restore the semantics that __arch_counter_get_cntvct() had on arm64. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: catalin.marinas@arm.com Cc: will.deacon@arm.com Cc: arnd@arndb.de Cc: linux@armlinux.org.uk Cc: ralf@linux-mips.org Cc: paul.burton@mips.com Cc: daniel.lezcano@linaro.org Cc: salyzyn@android.com Cc: pcc@google.com Cc: shuah@kernel.org Cc: 0x7f454c46@gmail.com Cc: linux@rasmusvillemoes.dk Cc: huw@codeweavers.com Cc: sthotton@marvell.com Cc: andre.przywara@arm.com Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Link: https://lkml.kernel.org/r/20190625161804.38713-3-vincenzo.frascino@arm.com
2019-06-26arm64: Fix __arch_get_hw_counter() implementationVincenzo Frascino1-0/+19
Provide the following fixes for the __arch_get_hw_counter() implementation on arm64: - Fallback on syscall when an unstable counter is detected. - Introduce isb()s before and after the counter read to avoid speculation of the counter value and of the seq lock respectively. The second isb() is a temporary solution that will be revisited in 5.3-rc1. These fixes restore the semantics that __arch_counter_get_cntvct() had on arm64. Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: catalin.marinas@arm.com Cc: will.deacon@arm.com Cc: arnd@arndb.de Cc: linux@armlinux.org.uk Cc: ralf@linux-mips.org Cc: paul.burton@mips.com Cc: daniel.lezcano@linaro.org Cc: salyzyn@android.com Cc: pcc@google.com Cc: shuah@kernel.org Cc: 0x7f454c46@gmail.com Cc: linux@rasmusvillemoes.dk Cc: huw@codeweavers.com Cc: sthotton@marvell.com Cc: andre.przywara@arm.com Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Link: https://lkml.kernel.org/r/20190625161804.38713-2-vincenzo.frascino@arm.com
2019-06-26lib/vdso: Make delta calculation work correctlyThomas Gleixner1-0/+27
The x86 vdso implementation on which the generic vdso library is based on has subtle (unfortunately undocumented) twists: 1) The code assumes that the clocksource mask is U64_MAX which means that no bits are masked. Which is true for any valid x86 VDSO clocksource. Stupidly it still did the mask operation for no reason and at the wrong place right after reading the clocksource. 2) It contains a sanity check to catch the case where slightly unsynchronized TSC values can be observed which would cause the delta calculation to make a huge jump. It therefore checks whether the current TSC value is larger than the value on which the current conversion is based on. If it's not larger the base value is used to prevent time jumps. #1 Is not only stupid for the X86 case because it does the masking for no reason it is also completely wrong for clocksources with a smaller mask which can legitimately wrap around during a conversion period. The core timekeeping code does it correct by applying the mask after the delta calculation: (now - base) & mask #2 is equally broken for clocksources which have smaller masks and can wrap around during a conversion period because there the now > base check is just wrong and causes stale time stamps and time going backwards issues. Unbreak it by: 1) Removing the mask operation from the clocksource read which makes the fallback detection work for all clocksources 2) Replacing the conditional delta calculation with a overrideable inline function. #2 could reuse clocksource_delta() from the timekeeping code but that results in a significant performance hit for the x86 VSDO. The timekeeping core code must have the non optimized version as it has to operate correctly with clocksources which have smaller masks as well to handle the case where TSC is discarded as timekeeper clocksource and replaced by HPET or pmtimer. For the VDSO there is no replacement clocksource. If TSC is unusable the syscall is enforced which does the right thing. To accommodate to the needs of various architectures provide an override-able inline function which defaults to the regular delta calculation with masking: (now - base) & mask Override it for x86 with the non-masking and checking version. This unbreaks the ARM64 syscall fallback operation, allows to use clocksources with arbitrary width and preserves the performance optimization for x86. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: linux-arch@vger.kernel.org Cc: LAK <linux-arm-kernel@lists.infradead.org> Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: catalin.marinas@arm.com Cc: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux@armlinux.org.uk Cc: Ralf Baechle <ralf@linux-mips.org> Cc: paul.burton@mips.com Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: salyzyn@android.com Cc: pcc@google.com Cc: shuah@kernel.org Cc: 0x7f454c46@gmail.com Cc: linux@rasmusvillemoes.dk Cc: huw@codeweavers.com Cc: sthotton@marvell.com Cc: andre.przywara@arm.com Cc: Andy Lutomirski <luto@kernel.org> Link: https://lkml.kernel.org/r/alpine.DEB.2.21.1906261159230.32342@nanos.tec.linutronix.de
2019-06-26arm64/efi: Mark __efistub_stext_offset as an absolute symbol explicitlyNathan Chancellor1-1/+5
After r363059 and r363928 in LLVM, a build using ld.lld as the linker with CONFIG_RANDOMIZE_BASE enabled fails like so: ld.lld: error: relocation R_AARCH64_ABS32 cannot be used against symbol __efistub_stext_offset; recompile with -fPIC Fangrui and Peter figured out that ld.lld is incorrectly considering __efistub_stext_offset as a relative symbol because of the order in which symbols are evaluated. _text is treated as an absolute symbol and stext is a relative symbol, making __efistub_stext_offset a relative symbol. Adding ABSOLUTE will force ld.lld to evalute this expression in the right context and does not change ld.bfd's behavior. ld.lld will need to be fixed but the developers do not see a quick or simple fix without some research (see the linked issue for further explanation). Add this simple workaround so that ld.lld can continue to link kernels. Link: https://github.com/ClangBuiltLinux/linux/issues/561 Link: https://github.com/llvm/llvm-project/commit/025a815d75d2356f2944136269aa5874721ec236 Link: https://github.com/llvm/llvm-project/commit/249fde85832c33f8b06c6b4ac65d1c4b96d23b83 Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Debugged-by: Fangrui Song <maskray@google.com> Debugged-by: Peter Smith <peter.smith@linaro.org> Suggested-by: Fangrui Song <maskray@google.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> [will: add comment] Signed-off-by: Will Deacon <will@kernel.org>
2019-06-26arm64: kaslr: keep modules inside module region when KASAN is enabledArd Biesheuvel1-2/+6
When KASLR and KASAN are both enabled, we keep the modules where they are, and randomize the placement of the kernel so it is within 2 GB of the module region. The reason for this is that putting modules in the vmalloc region (like we normally do when KASLR is enabled) is not possible in this case, given that the entire vmalloc region is already backed by KASAN zero shadow pages, and so allocating dedicated KASAN shadow space as required by loaded modules is not possible. The default module allocation window is set to [_etext - 128MB, _etext] in kaslr.c, which is appropriate for KASLR kernels booted without a seed or with 'nokaslr' on the command line. However, as it turns out, it is not quite correct for the KASAN case, since it still intersects the vmalloc region at the top, where attempts to allocate shadow pages will collide with the KASAN zero shadow pages, causing a WARN() and all kinds of other trouble. So cap the top end to MODULES_END explicitly when running with KASAN. Cc: <stable@vger.kernel.org> # 4.9+ Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will@kernel.org>
2019-06-26arm64/mm: Drop [PTE|PMD]_TYPE_FAULTAnshuman Khandual1-2/+0
This was added part of the original commit which added MMU definitions. commit 4f04d8f00545 ("arm64: MMU definitions"). These symbols never got used as confirmed from a git log search. git log -p arch/arm64/ | grep PTE_TYPE_FAULT git log -p arch/arm64/ | grep PMD_TYPE_FAULT These probably meant to identify non present entries which can now be achieved with PMD_SECT_VALID or PTE_VALID bits. Hence just drop these unused symbols which are not required anymore. Cc: Will Deacon <will.deacon@arm.com> Cc: Steve Capper <steve.capper@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-06-26arch/sh: Check for kprobe trap number before trying to handle a kprobe trapMichael Karcher1-1/+2
The DIE_TRAP notifier chain is run both for kprobe traps and for BUG/WARN traps. The kprobe code assumes to be only called for BREAKPOINT_INSTRUCTION, and concludes to have hit a concurrently removed kprobe if it finds anything else at the faulting locations. This includes TRAPA_BUG_OPCODE used for BUG and WARN. The consequence is that kprobe_handler returns 1. This makes kprobe_exceptions_notify return NOTIFY_STOP, and prevents handling the BUG statement. This also prevents moving $pc away from the trap instruction, so the system locks up in an endless loop Signed-off-by: Michael Karcher <kernel@mkarcher.dialup.fu-berlin.de> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2019-06-26csky: Fixup libgcc unwind errorGuo Ren1-0/+5
The struct rt_sigframe is also defined in libgcc/config/csky/linux-unwind.h of gcc. Although there is no use for the first three word space, we must keep them the same with linux-unwind.h for member position. The BUG is found in glibc test with the tst-cancel02. The BUG is from commit:bf2416829362 of linux-5.2-rc1 merge window. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Signed-off-by: Mao Han <han_mao@c-sky.com> Cc: Arnd Bergmann <arnd@arndb.de>
2019-06-26arm64: compat: No need for pre-ARMv7 barriers on an ARMv8 systemCatalin Marinas1-7/+0
Remove the deprecated (pre-ARMv7) compat barriers as they would not be used on an ARMv8 system. Fixes: a7f71a2c8903 ("arm64: compat: Add vDSO") Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@armlinux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Mark Salyzyn <salyzyn@android.com> Cc: Peter Collingbourne <pcc@google.com> Cc: Shuah Khan <shuah@kernel.org> Cc: Dmitry Safonov <0x7f454c46@gmail.com> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Cc: Huw Davies <huw@codeweavers.com> Cc: Shijith Thotton <sthotton@marvell.com> Cc: Andre Przywara <andre.przywara@arm.com> Link: https://lkml.kernel.org/r/20190624140018.GD29120@arrakis.emea.arm.com
2019-06-26arm64: vdso: Remove unnecessary asm-offsets.c definitionsCatalin Marinas1-39/+0
Since the VDSO code has moved to C from assembly, there is no need to define and maintain the corresponding asm offsets. Fixes: 28b1a824a4f4 ("arm64: vdso: Substitute gettimeofday() with C implementation") Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: linux-arch@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@armlinux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Mark Salyzyn <salyzyn@android.com> Cc: Peter Collingbourne <pcc@google.com> Cc: Shuah Khan <shuah@kernel.org> Cc: Dmitry Safonov <0x7f454c46@gmail.com> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Cc: Huw Davies <huw@codeweavers.com> Cc: Shijith Thotton <sthotton@marvell.com> Cc: Andre Przywara <andre.przywara@arm.com> Link: https://lkml.kernel.org/r/20190624135812.GC29120@arrakis.emea.arm.com
2019-06-26x86/mm: Handle physical-virtual alignment mismatch in phys_p4d_init()Kirill A. Shutemov1-11/+13
Kyle has reported occasional crashes when booting a kernel in 5-level paging mode with KASLR enabled: WARNING: CPU: 0 PID: 0 at arch/x86/mm/init_64.c:87 phys_p4d_init+0x1d4/0x1ea RIP: 0010:phys_p4d_init+0x1d4/0x1ea Call Trace: __kernel_physical_mapping_init+0x10a/0x35c kernel_physical_mapping_init+0xe/0x10 init_memory_mapping+0x1aa/0x3b0 init_range_memory_mapping+0xc8/0x116 init_mem_mapping+0x225/0x2eb setup_arch+0x6ff/0xcf5 start_kernel+0x64/0x53b ? copy_bootdata+0x1f/0xce x86_64_start_reservations+0x24/0x26 x86_64_start_kernel+0x8a/0x8d secondary_startup_64+0xb6/0xc0 which causes later: BUG: unable to handle page fault for address: ff484d019580eff8 #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page BAD Oops: 0000 [#1] SMP NOPTI RIP: 0010:fill_pud+0x13/0x130 Call Trace: set_pte_vaddr_p4d+0x2e/0x50 set_pte_vaddr+0x6f/0xb0 __native_set_fixmap+0x28/0x40 native_set_fixmap+0x39/0x70 register_lapic_address+0x49/0xb6 early_acpi_boot_init+0xa5/0xde setup_arch+0x944/0xcf5 start_kernel+0x64/0x53b Kyle bisected the issue to commit b569c1843498 ("x86/mm/KASLR: Reduce randomization granularity for 5-level paging to 1GB") Before this commit PAGE_OFFSET was always aligned to P4D_SIZE when booting 5-level paging mode. But now only PUD_SIZE alignment is guaranteed. In the case I was able to reproduce the following vaddr/paddr values were observed in phys_p4d_init(): Iteration vaddr paddr 1 0xff4228027fe00000 0x033fe00000 2 0xff42287f40000000 0x8000000000 'vaddr' in both cases belongs to the same p4d entry. But due to the original assumption that PAGE_OFFSET is aligned to P4D_SIZE this overlap cannot be handled correctly. The code assumes strictly aligned entries and unconditionally increments the index into the P4D table, which creates false duplicate entries. Once the index reaches the end, the last entry in the page table is missing. Aside of that the 'paddr >= paddr_end' condition can evaluate wrong which causes an P4D entry to be cleared incorrectly. Change the loop in phys_p4d_init() to walk purely based on virtual addresses like __kernel_physical_mapping_init() does. This makes it work correctly with unaligned virtual addresses. Fixes: b569c1843498 ("x86/mm/KASLR: Reduce randomization granularity for 5-level paging to 1GB") Reported-by: Kyle Pelton <kyle.d.pelton@intel.com> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Kyle Pelton <kyle.d.pelton@intel.com> Acked-by: Baoquan He <bhe@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lkml.kernel.org/r/20190624123150.920-1-kirill.shutemov@linux.intel.com
2019-06-26x86/boot/64: Add missing fixup_pointer() for next_early_pgt accessKirill A. Shutemov1-1/+2
__startup_64() uses fixup_pointer() to access global variables in a position-independent fashion. Access to next_early_pgt was wrapped into the helper, but one instance in the 5-level paging branch was missed. GCC generates a R_X86_64_PC32 PC-relative relocation for the access which doesn't trigger the issue, but Clang emmits a R_X86_64_32S which leads to an invalid memory access and system reboot. Fixes: 187e91fe5e91 ("x86/boot/64/clang: Use fixup_pointer() to access 'next_early_pgt'") Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Alexander Potapenko <glider@google.com> Link: https://lkml.kernel.org/r/20190620112422.29264-1-kirill.shutemov@linux.intel.com
2019-06-26x86/boot/64: Fix crash if kernel image crosses page table boundaryKirill A. Shutemov1-8/+9
A kernel which boots in 5-level paging mode crashes in a small percentage of cases if KASLR is enabled. This issue was tracked down to the case when the kernel image unpacks in a way that it crosses an 1G boundary. The crash is caused by an overrun of the PMD page table in __startup_64() and corruption of P4D page table allocated next to it. This particular issue is not visible with 4-level paging as P4D page tables are not used. But the P4D and the PUD calculation have similar problems. The PMD index calculation is wrong due to operator precedence, which fails to confine the PMDs in the PMD array on wrap around. The P4D calculation for 5-level paging and the PUD calculation calculate the first index correctly, but then blindly increment it which causes the same issue when a kernel image is located across a 512G and for 5-level paging across a 46T boundary. This wrap around mishandling was introduced when these parts moved from assembly to C. Restore it to the correct behaviour. Fixes: c88d71508e36 ("x86/boot/64: Rewrite startup_64() in C") Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lkml.kernel.org/r/20190620112345.28833-1-kirill.shutemov@linux.intel.com
2019-06-26arm64: defconfig: Enable CONFIG_KEYBOARD_SNVS_PWRKEY as moduleAnson Huang1-0/+1
Enable CONFIG_KEYBOARD_SNVS_PWRKEY as module to support i.MX8M series SoCs' power key. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26ARM: imx_v6_v7_defconfig: Enable CONFIG_ARM_IMX_CPUFREQ_DTLeonard Crestez1-0/+1
This is used for imx7d speed grading. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26defconfig: arm64: enable i.MX8 SCU octop driverPeng Fan1-0/+1
Build in CONFIG_NVMEM_IMX_OCOTP_SCU. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Olof Johansson <olof@lixom.net> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com> Cc: linux-arm-kernel@lists.infradead.org Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26arm64: defconfig: Add i.MX SCU SoC info driverAnson Huang1-0/+1
This patch selects CONFIG_IMX_SCU_SOC by default to support i.MX system controller unit SoC info driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26arm64: defconfig: Enable CONFIG_QORIQ_THERMALAnson Huang1-0/+1
i.MX8MQ needs CONFIG_QORIQ_THERMAL for thermal support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26ARM: imx_v6_v7_defconfig: Select CONFIG_NVMEM_SNVS_LPGPRFabio Estevam1-0/+1
The SNVS LPGPR hardware is present on several i.MX SoCs. Select its driver by default. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26arm64: defconfig: ARM_IMX_CPUFREQ_DT=mLeonard Crestez1-0/+1
For imx8m we need a separate small driver to read "speed grading" information from fuses and determine which OPPs are supported. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26ARM: imx_v6_v7_defconfig: Add TPM PWM support by defaultAnson Huang1-0/+1
Select CONFIG_PWM_IMX_TPM by default to support i.MX7ULP TPM PWM. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26ARM: imx_v6_v7_defconfig: Enable the OV2680 camera driverFabio Estevam1-0/+1
Enable the OV2680 camera driver as it is used on the imx7s-warp board. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26ARM: imx_v6_v7_defconfig: Enable CONFIG_THERMAL_STATISTICSAnson Huang1-0/+1
Enable CONFIG_THERMAL_STATISTICS to extend the sysfs interface for thermal cooling devices and expose some useful statistics. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-26arm64: defconfig: NVMEM_IMX_OCOTP=y for imx8mLeonard Crestez1-0/+1
Enable imx-ocotp nvmem driver for fuse access on imx8m family. The fuse block stores various system information which will be accessed by client device drivers, e.g. cpufreq driver needs to access fuse for CPU speed grading setting. So this nvmem driver gets enabled as built-in. Tested on imx8mm-evk. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-25MIPS: Remove dead codePaul Cercueil4-38/+0
Remove the unused <asm/mach-jz4740/clock.h> include. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-06-25MIPS: jz4740: PM: Let CGU driver suspend clocks and set sleep modePaul Cercueil1-8/+0
Instead of forcing the jz4740 clocks to suspend here, we let the CGU driver handle it. We also let the CGU driver set the "sleep mode" bit. This has the added benefit that now it is possible to build a kernel on SoCs newer than the JZ4740 with CONFIG_PM. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-06-25ARM: exynos: Cleanup cppcheck shifting warningPhong Tran1-1/+1
Fix warning from cppcheck tool: "Shifting signed 32-bit value by 31 bits is undefined behaviour errors" Signed-off-by: Phong Tran <tranmanphong@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-06-25arm64: dts: qcom: sdm845-cheza: add initial cheza dtRob Clark5-0/+1979
This is essentialy a squash of a bunch of history of cheza dt updates from chromium kernel, some of which were themselves squashes of history from older chromium kernels. I don't claim any credit other than wanting to more easily boot upstream kernel on cheza to have an easier way to test upstream driver work ;-) I've added below in Cc tags all the original actual authors (apologies if I missed any). Cc: Douglas Anderson <dianders@chromium.org> Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Evan Green <evgreen@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Abhinav Kumar <abhinavk@codeaurora.org> Cc: Brian Norris <briannorris@chromium.org> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org> Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25ARM: dts: msm8974-FP2: Add vibration motorLuca Weiss1-0/+6
Add a node describing the vibration motor on the Fairphone 2. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25arm64: dts: qcom: qcs404: Add thermal zones for each sensorAmit Kucheria1-0/+252
qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal zone for each of those sensors to expose the temperature of each zone. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25arm64: dts: qcom: qcs404: Add tsens controllerAmit Kucheria1-0/+20
qcs404 has a single TSENS IP block with 10 sensors. The calibration data is stored in an eeprom (qfprom) that is accessed through the nvmem framework. We add the qfprom node to allow the tsens sensors to be calibrated correctly. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-06-25clocksource/drivers/arm_arch_timer: Extract elf_hwcap use to arch-helperAndrew Murray2-0/+23
Different mechanisms are used to test and set elf_hwcaps between ARM and ARM64, this results in the use of ifdeferry in this file when setting/testing for the EVTSTRM hwcap. Let's improve readability by extracting this to an arch helper. Signed-off-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2019-06-25arm64: Implement panic_smp_self_stop()Aaro Koskinen1-6/+13
Currently arm64 uses the default implementation of panic_smp_self_stop() where the CPU runs in a cpu_relax() loop unable to receive IPIs anymore. As a result, when two CPUs panic() simultaneously we get "SMP: failed to stop secondary CPUs" warnings and extra delays before a reset, because smp_send_stop() still tries to stop the other paniced CPU. Provide an implementation of panic_smp_self_stop() that is identical to the IPI CPU stop handler, so that the online status of stopped CPUs gets properly updated. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-06-25arm64: Improve parking of stopped CPUsJayachandran C1-3/+1
The current code puts the stopped cpus in an 'yield' instruction loop. Using a busy loop here is unnecessary, we can use the cpu_park_loop() function here to do a wfi/wfe. Signed-off-by: Jayachandran C <jnair@caviumnetworks.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-06-26arm64: dts: uniphier: add reserved-memory for secure memoryMasahiro Yamada3-6/+33
The memory regions specified by /memreserve/ are passed to early_init_dt_reserve_memory_arch() with nomap=false, so it is not suitable for reserving memory for Trusted Firmware-A etc. Use the more robust /reserved-memory node with the no-map property to prevent the kernel from mapping it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-26arm64: dts: uniphier: update to new Denali NAND bindingMasahiro Yamada5-0/+14
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-26ARM: dts: uniphier: update to new Denali NAND bindingMasahiro Yamada9-4/+30
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. In the new binding, the number of connected chips are described in DT instead of run-time probed. I added just one chip to the reference boards, where we do not know if the on-board NAND device is a single chip or multiple chips. If we added too many chips into DT, it would end up with the timeout error in nand_scan_ident(). I changed all the pinctrl properties to use the single CS. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-25arm64: Expose FRINT capabilities to userspaceMark Brown5-0/+5
ARMv8.5 introduces the FRINT series of instructions for rounding floating point numbers to integers. Provide a capability to userspace in order to allow applications to determine if the system supports these instructions. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-06-25arm64: Expose ARMv8.5 CondM capability to userspaceMark Brown4-0/+4
ARMv8.5 adds new instructions XAFLAG and AXFLAG to translate the representation of the results of floating point comparisons between the native ARM format and an alternative format used by some software. Add a hwcap allowing userspace to determine if they are present, since we referred to earlier CondM extensions as FLAGM call these extensions FLAGM2. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-06-25parisc: asm: psw.h: missing header guardDenis Efremov1-1/+1
The psw.h header file contains #ifndef directive of the guard, but the complimentary #define directive is missing. The patch adds the appropriate #define to fix the header guard. Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Helge Deller <deller@gmx.de>
2019-06-25Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dtOlof Johansson29-199/+3272
arm64: dts: Amlogic updates for v5.3 Highlights: - new SoC: S922X (G12B family, A73/A53 big.LITTLE) - new board: Hardkernel odroid-N2 (SoC: G12B S922X) - add/use ethernet PHY interrupt/reset lines - G12A: add/enable audio, PWM, IR, i2c, SD/eMMC, WiFi, bluetooth, network - gxbb-vega-s95 board: fix WiFi/BT, enable more peripherals * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (79 commits) arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY interrupt line arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line arm64: dts: meson: g12a: sort sdio nodes correctly arm64: dts: meson-g12a-x96-max: add sound card arm64: dts: meson-g12b-odroid-n2: add sound card arm64: dts: meson: sei510: add sound card arm64: dts: meson: sei510: add max98357a DAC ASoC: meson: add tohdmitx DT bindings arm64: dts: meson: g12a: add the GPIO interrupt controller arm64: dts: meson-g12a-x96-max: bump bluetooth bus speed to 2Mbaud/s arm64: dts: meson-g12a-sei510: bump bluetooth bus speed to 2Mbaud/s arm64: dts: meson-g12a-x96-max: add 32k clock to bluetooth node arm64: dts: meson-g12a-sei510: add 32k clock to bluetooth node arm64: dts: meson-g12a-sei510: Enable Wifi SDIO module arm64: dts: meson-g12a-x96-max: Enable Wifi SDIO Module arm64: dts: meson-g12a-x96-max: add support for sdcard and emmc arm64: dts: meson: g12a: add SDIO controller ... Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'imx-soc-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/socOlof Johansson2-5/+12
i.MX SoC changes for 5.3: - Switch imx7d to imx-cpufreq-dt for speed-grading, as imx-cpufreq-dt driver can handle speed grading bits on imx7d just like on imx8mq. - Improve imx6 cpuidle driver to use raw_spinlock_t. The change makes no difference for !RT build, but is required by RT kernel. * tag 'imx-soc-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading ARM: imx6: cpuidle: Use raw_spinlock_t Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'pxa-for-5.3-2' of https://github.com/rjarzmik/linux into arm/socOlof Johansson2-6/+1
This is the pxa changes for 5.3 cycle : - a simple cleanup for lubbock * tag 'pxa-for-5.3-2' of https://github.com/rjarzmik/linux: ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/socOlof Johansson1-0/+1
AT91 SoC for 5.3 - fix a pm.c warning with W=1 * tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: arm: add missing include platform-data/atmel.h Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'renesas-arm-soc-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/socOlof Johansson1-0/+17
Renesas ARM Based SoC Updates for v5.3 * Auto-enable RZ/A1 IRQC on RZ/A1H and RZ/A2M * Don't init CNTVOFF/counter if PSCI is available * tag 'renesas-arm-soc-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M ARM: mach-shmobile: Don't init CNTVOFF/counter if PSCI is available Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-25Merge tag 'davinci-for-v5.3/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/socOlof Johansson1-21/+22
This pull request has a patch to switch DA850 EVM GPIO LED support to use GPIO lookup table * tag 'davinci-for-v5.3/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: Use GPIO lookup table for DA850 LEDs Signed-off-by: Olof Johansson <olof@lixom.net>