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2022-06-13ARM: dts: bcm2711: Enable V3DPeter Robinson2-0/+15
This adds the entry for V3D for bcm2711 (used in the Raspberry Pi 4) and the associated firmware clock entry. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-13ARM: dts: Update BCM47622 DTS fileWilliam Zhang1-5/+9
Fix a few issue in bcm47622.dtsi file: - Remove unnecessary cpu_on and cpu_off properties from psci node - Add the missing gic registers and interrupts property to gic node - Cosmetic changes Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-13ARM: dts: Add DTS files for bcmbca SoC BCM6846William Zhang3-0/+134
Add DTS for ARMv7 based broadband SoC BCM6846. bcm6846.dtsi is the SoC description DTS header and bcm96846.dts is a simple DTS file for Broadcom BCM96846 Reference board that only enable the UART port. Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-13ARM: configs: Enable DRM_V3DPeter Robinson2-0/+2
BCM2711, the SoC used on the Raspberry Pi 4 has a different 3D render GPU IP than its predecessors. Enable it it on multi v7 and bcm2835 configs. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-06-13riscv: dts: microchip: add mpfs's CAN controllersConor Dooley1-0/+18
PolarFire SoC has a pair of CAN controllers, but as they were undocumented there were omitted from the device tree. Add them. Link: https://lore.kernel.org/all/20220607065459.2035746-3-conor.dooley@microchip.com Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-06-13arm64: dts: arm/juno: Drop erroneous 'mbox-name' propertyRob Herring1-1/+0
The 'mbox-name' property in the Juno mailbox node is undocumented and unused. It's the consumer side of the mailbox binding that have 'mbox-names' properties. Link: https://lore.kernel.org/r/20220610213308.2288094-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-06-13arm64: dts: arm/fvp-base-revc: Remove 'panel-dpi' compatibleRob Herring1-1/+1
The rtsm-display panel timing node was removed in commit 928faf5e3e8d ("arm64: dts: fvp: Remove panel timings"). Without the node, 'panel-dpi' is not needed either. Link: https://lore.kernel.org/r/20220610204057.2203419-1-robh@kernel.org Cc: Robin Murphy <robin.murphy@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-06-13arm64: defconfig: Enable R8A779G0 SoCGeert Uytterhoeven1-0/+1
Enable the Renesas R-Car V4H (R8A779G0) SoC in the ARM64 defconfig. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/eb672fad7c9a340812079a07539d670f42f4ad41.1654855105.git.geert+renesas@glider.be
2022-06-13ARM: shmobile: defconfig: Refresh for v5.19-rc1Geert Uytterhoeven1-1/+3
Refresh the defconfig for Renesas ARM systems: - Move CONFIG_SLAB=y (moved in commit 7b42f1041c98f5d7 ("mm: Kconfig: move swap and slab config options to the MM section")), - Enable CONFIG_RENESAS_RZN1WDT (RZN1D-DB), - Enable CONFIG_RTC_DRV_RZN1 (RZN1-DB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7ef31a41e1a15d0cedeb6cfc496ce70a78102e32.1654855000.git.geert+renesas@glider.be
2022-06-13arm64: dts: meson: add gpio-fan control to GS-King-XFurkan Kardame1-0/+25
GS-King-X has a single speed GPIO fan which is always-on by default. If we add controls for the fan and a trip point, the fan stays off most of the time, reducing background noise from the unit. Signed-off-by: Furkan Kardame <f.kardame@manjaro.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220611170852.19487-1-f.kardame@manjaro.org
2022-06-13perf/x86/amd/uncore: Add PerfMonV2 RDPMC assignmentsSandipan Das1-0/+10
The current RDPMC assignment scheme maps four DF PMCs and six L3 PMCs from index 6 to 15. If AMD Performance Monitoring Version 2 (PerfMonV2) is supported, there may be additional DF counters available which are mapped starting from index 16 i.e. just after the L3 counters. Update the RDPMC assignments accordingly. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/1359379ef34da760f108b075ac138ab082caa3ba.1652954372.git.sandipan.das@amd.com
2022-06-13perf/x86/amd/uncore: Add PerfMonV2 DF event formatSandipan Das2-7/+30
If AMD Performance Monitoring Version 2 (PerfMonV2) is supported, use bits 0-7, 32-37 as EventSelect and bits 8-15, 24-27 as UnitMask for Data Fabric (DF) events. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/ffc24d5a3375b1d6e457d88e83241114de5c1942.1652954372.git.sandipan.das@amd.com
2022-06-13perf/x86/amd/uncore: Detect available DF countersSandipan Das2-0/+13
If AMD Performance Monitoring Version 2 (PerfMonV2) is supported, use CPUID leaf 0x80000022 EBX to detect the number of Data Fabric (DF) PMCs. This offers more flexibility if the counts change in later processor families. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/bac7b2806561e03f2acc7fdc9db94f102df80e1d.1652954372.git.sandipan.das@amd.com
2022-06-13perf/x86/amd/uncore: Use attr_update for format attributesSandipan Das1-14/+54
Use the update_attrs attribute group introduced by commit f3a3a8257e5a ("perf/core: Add attr_groups_update into struct pmu") and the is_visible() callback to populate the family specifc attributes for uncore events. The changes apply to attributes that are unique to families such as slicemask for Family 17h and coreid for Family 19h. The addition of common attributes such as event and umask, whose formats change across families, remain unchanged. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/a5e4f4dd5c459199fc497e82b858ba09dc91c064.1652954372.git.sandipan.das@amd.com
2022-06-13perf/x86/amd/uncore: Use dynamic events arraySandipan Das1-7/+31
If AMD Performance Monitoring Version 2 (PerfMonV2) is supported, the number of available counters for a given uncore PMU may not be fixed across families and models and has to be determined at runtime. The per-cpu uncore PMU data currently uses a fixed-sized array for event information. Make it dynamic based on the number of available counters. Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/21eea0cb6de9d14f78d52d1d62637ae02bc900f5.1652954372.git.sandipan.das@amd.com
2022-06-13x86/events/intel/ds: Enable large PEBS for PERF_SAMPLE_WEIGHT_TYPELike Xu1-1/+2
All the information required by the PERF_SAMPLE_WEIGHT is available in the pebs record. Thus large PEBS could be enabled for PERF_SAMPLE_WEIGHT sample type to save PMIs overhead until other non-compatible flags such as PERF_SAMPLE_DATA_PAGE_SIZE (due to lack of munmap tracking) stop it. To cover new weight extension, add PERF_SAMPLE_WEIGHT_TYPE to the guardian LARGE_PEBS_FLAGS. Tested it with: $ perf mem record -c 1000 workload Before: Captured and wrote 0.126 MB perf.data (958 samples) [958 PMIs] After: Captured and wrote 0.313 MB perf.data (4859 samples) [3 PMIs] Reported-by: Yongchao Duan <yongduan@tencent.com> Signed-off-by: Like Xu <likexu@tencent.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220519151913.80545-1-likexu@tencent.com
2022-06-13x86/mm: Fix RESERVE_BRK() for older binutilsJosh Poimboeuf3-24/+23
With binutils 2.26, RESERVE_BRK() causes a build failure: /tmp/ccnGOKZ5.s: Assembler messages: /tmp/ccnGOKZ5.s:98: Error: missing ')' /tmp/ccnGOKZ5.s:98: Error: missing ')' /tmp/ccnGOKZ5.s:98: Error: missing ')' /tmp/ccnGOKZ5.s:98: Error: junk at end of line, first unrecognized character is `U' The problem is this line: RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE) Specifically, the INIT_PGT_BUF_SIZE macro which (via PAGE_SIZE's use _AC()) has a "1UL", which makes older versions of the assembler unhappy. Unfortunately the _AC() macro doesn't work for inline asm. Inline asm was only needed here to convince the toolchain to add the STT_NOBITS flag. However, if a C variable is placed in a section whose name is prefixed with ".bss", GCC and Clang automatically set STT_NOBITS. In fact, ".bss..page_aligned" already relies on this trick. So fix the build failure (and simplify the macro) by allocating the variable in C. Also, add NOLOAD to the ".brk" output section clause in the linker script. This is a failsafe in case the ".bss" prefix magic trick ever stops working somehow. If there's a section type mismatch, the GNU linker will force the ".brk" output section to be STT_NOBITS. The LLVM linker will fail with a "section type mismatch" error. Note this also changes the name of the variable from .brk.##name to __brk_##name. The variable names aren't actually used anywhere, so it's harmless. Fixes: a1e2c031ec39 ("x86/mm: Simplify RESERVE_BRK()") Reported-by: Joe Damato <jdamato@fastly.com> Reported-by: Byungchul Park <byungchul.park@lge.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Joe Damato <jdamato@fastly.com> Link: https://lore.kernel.org/r/22d07a44c80d8e8e1e82b9a806ddc8c6bbb2606e.1654759036.git.jpoimboe@kernel.org
2022-06-13x86/crypto: Remove stray comment terminatorThomas Gleixner1-2/+0
It seems the SPDX patch script managed to confuse itself. Fixes: 2eb72d6696c6 ("treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-13arm64: dts: rockchip: Add missing space around regulator-name on rk3368-orion-r68Niklas Söderlund1-1/+1
Add the missing space around the regulator-name property before the typo spreads to other files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20220612223201.2740248-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-12riscv: dts: microchip: re-add pdma to mpfs device treeConor Dooley1-0/+9
PolarFire SoC /does/ have a SiFive pdma, despite what I suggested as a conflict resolution to Zong. Somehow the entry fell through the cracks between versions of my dt patches, so re-add it with Zong's updated compatible & dma-channels property. Fixes: c5094f371008 ("riscv: dts: microchip: refactor icicle kit device tree") Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2022-06-12ARM: imx6ul: drop the adc num-channels propertyBaruch Siach4-8/+0
The mainline vf610_adc driver never used this property. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-12ARM: dts: fsl: adjust whitespace around '='Krzysztof Kozlowski12-14/+14
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-12ARM: imx: Kconfig: Fix indentationJuerg Haefliger1-3/+3
The convention for indentation seems to be a single tab. Help text is further indented by an additional two whitespaces. Fix the lines that violate these rules. While at it, replace separator tabs with whitespaces. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhostLinus Torvalds1-1/+6
Pull virtio fixes from Michael Tsirkin: "Fixes all over the place, most notably fixes for latent bugs in drivers that got exposed by suppressing interrupts before DRIVER_OK, which in turn has been done by 8b4ec69d7e09 ("virtio: harden vring IRQ")" * tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost: um: virt-pci: set device ready in probe() vdpa: make get_vq_group and set_group_asid optional virtio: Fix all occurences of the "the the" typo vduse: Fix NULL pointer dereference on sysfs access vringh: Fix loop descriptors check in the indirect cases vdpa/mlx5: clean up indenting in handle_ctrl_vlan() vdpa/mlx5: fix error code for deleting vlan virtio-mmio: fix missing put_device() when vm_cmdline_parent registration failed vdpa/mlx5: Fix syntax errors in comments virtio-rng: make device ready before making request
2022-06-11Merge tag 'loongarch-fixes-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongsonLinus Torvalds11-36/+31
Pull LoongArch fixes from Huacai Chen. "Fix build errors and a stale comment" * tag 'loongarch-fixes-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: LoongArch: Remove MIPS comment about cycle counter LoongArch: Fix copy_thread() build errors LoongArch: Fix the !CONFIG_SMP build
2022-06-11arm64: dts: rockchip: enable the gpu on BPI-R2-ProFrank Wunderlich1-0/+5
Enable the GPU core on the Rockchip RK3568 BananaPi R2 Pro Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220606170803.478082-6-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: configure thermal shutdown for BPI-R2-ProFrank Wunderlich1-0/+2
Add thermal shutdown configuration for use of GPU. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220606170803.478082-5-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: Enable HDMI audio on BPI R2 ProFrank Wunderlich1-0/+9
This enables the i2s0 controller and the hdmi-sound node on the Bananapi R2 Pro single-board computer. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220606170803.478082-4-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: enable vop2 and hdmi tx on BPI-R2-ProFrank Wunderlich1-0/+47
Enable the RK356x Video Output Processor (VOP) 2 on the BananaPi R2 Pro board. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220606170803.478082-3-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: set display regulators to always-on on BPI-R2-ProFrank Wunderlich1-0/+3
The gpu power supply needs to stay always on until the issues with power- domains not being regulator aware is resolved. Otherwise we run into issues where the gpu-regulator gets shut down and we start getting mmu faults. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220606170803.478082-2-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: Assign RK3399 VDU clock rateBrian Norris2-3/+7
Before commit 9998943f6dfc ("media: rkvdec: Stop overclocking the decoder"), the rkvdec driver was forcing the VDU clock rate. After that commit, we rely on the default clock rate. That rate works OK on many boards, with the default PLL settings (CPLL is 800MHz, VDU dividers leave it at 400MHz); but some boards change PLL settings. Assign the expected default clock rate explicitly, so that the rate is consistent, regardless of PLL configuration. This was particularly broken on RK3399 Gru Scarlet systems, where the rk3399-gru-scarlet.dtsi assigns PLL_CPLL to 1.6 GHz, and so the VDU clock ends up at 800 MHz (twice the expected rate), and causes video artifacts and other issues. Note: I assign the clock rate in the clock controller instead of the vdec node, because there are multiple nodes that use this clock, and per the clock.yaml specification: Configuring a clock's parent and rate through the device node that consumes the clock can be done only for clocks that have a single user. Specifying conflicting parent or rate configuration in multiple consumer nodes for a shared clock is forbidden. Configuration of common clocks, which affect multiple consumer devices can be similarly specified in the clock provider node. Fixes: 9998943f6dfc ("media: rkvdec: Stop overclocking the decoder") Cc: <stable@vger.kernel.org> Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Link: https://lore.kernel.org/r/20220607141535.1.Idafe043ffc94756a69426ec68872db0645c5d6e2@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: add RTC to BPI-R2 ProFrank Wunderlich1-0/+23
Add devicetree node for hym8563 rtc to Bananapi R2 Pro board. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220608161150.58919-3-linux@fw-web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: Fix Quartz64-A dwc3 otg port behaviorPeter Geis1-0/+1
The otg_id line on the Quartz64 Model A is not connected to anything. This prevents automatic selection of the dual role usb port. In otg mode it defaults to device mode. Force it to host mode to retain previous behavior. Fixes: bc405bb3eeee ("arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk356x") Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220610132542.159978-1-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: Enable HDMI audio on Quartz64 ANicolas Frattaroli1-0/+8
This enables the i2s0 controller and the hdmi-sound node on the PINE64 Quartz64 Model A single-board computer. Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20220611065300.885212-3-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11arm64: dts: rockchip: Add HDMI audio nodes to rk356xNicolas Frattaroli1-0/+33
This adds the i2s0 node and an hdmi-sound sound device to the rk356x device tree. On the rk356[68], the i2s0 controller is connected to HDMI audio. Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20220611065300.885212-2-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-06-11ARM: dts: imx6ulz-bsh-smm-m2: Support proper board power offSimon Holesch1-0/+4
Supports initiating poweroff on SNVS_PMIC_ON_REQ signal. Signed-off-by: Simon Holesch <simon.holesch@bshg.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: add support for Toradex Iris carrier boardsMarcel Ziswiler9-0/+536
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: clean-up iomuxc pinctrl group namingMarcel Ziswiler1-35/+35
Clean-up iomuxc pinctrl group naming. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: set regulator-name propertiesMarcel Ziswiler1-9/+18
Migrate comments to proper regulator-name properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: remove leading zero from reg addressMarcel Ziswiler1-1/+1
Remove the unnecessary leading zero from the reg address. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: clean-up device enabling/disablingMarcel Ziswiler2-6/+0
Disable most nodes on module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: alphabetical re-orderMarcel Ziswiler2-188/+186
Alphabetically re-order device tree iomuxc pinctrl pads, nodes and properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: add clarifying commentsMarcel Ziswiler11-63/+121
- Add clarifying comments. - Remove spurious new line. - Add required new line. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri-aster: add ssp aka spi cs aka ss pinsMarcel Ziswiler1-0/+10
Add Colibri SSP aka SPI chip select (CS) aka slave select (SS) pins as either used on Arduino UNO compatible header X18 or Raspberry Pi compatible header X20. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: disable adc2Marcel Ziswiler3-13/+2
ADC2 is not available as it conflicts with the AD7879 resistive touchscreen. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri-eval-v3: correct can controller commentMarcel Ziswiler1-1/+1
Correct CAN controller comment. It is a MCP2515 rather than a mpc258x. Fixes: 66d59b678a87 ("ARM: dts: imx7-colibri: add MCP2515 CAN controller") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7d-colibri-emmc: add cpu1 supplyMarcel Ziswiler1-0/+4
Each cpu-core is supposed to list its supply separately, add supply for cpu1. Fixes: 2d7401f8632f ("ARM: dts: imx7d: Add cpu1 supply") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: move rtc nodeMarcel Ziswiler3-12/+17
Move I2C RTC to module-level to be enabled on carrier board-level. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: clean-up usdhc1 and add sleep configMarcel Ziswiler3-32/+51
Adding no-1-8-v property to usdhc1 to disable +1.8V signaling (UHS-I) mode on SoM dtsi level. Clean up no-1-8-v from Aster carrier board dtsi, which is using defaults from SoM dtsi and is not UHS-I capable. A carrier board may have a MMC/SD card slot with a switchable power supply. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-11ARM: dts: imx7-colibri: add delay for on-module phy supplyOleksandr Suvorov1-2/+13
There is a significant time required for PHY Micrel KSZ8041 to power up. Add a delay on start-up/wake-up before the FEC starts communicating with the PHY. LDO1 takes 6 ms, R39 + C44 takes ~100ms, the KSZ8041 datasheet asks for ~11 ms before starting any programming on the MIIM. Counting that, add a 200 ms delay to be sure the PHY is ready for programming. Also, add the same off delay time to give the capacitor time to discharge in order to properly reset. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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