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2019-04-08Merge tag 'xtensa-20190408' of git://github.com/jcmvbkbc/linux-xtensaLinus Torvalds4-11/+24
Pull xtensa fixes from Max Filippov: - fix syscall number passed to trace_sys_exit - fix syscall number initialization in start_thread - fix level interpretation in the return_address - fix format string warning in init_pmd * tag 'xtensa-20190408' of git://github.com/jcmvbkbc/linux-xtensa: xtensa: fix format string warning in init_pmd xtensa: fix return_address xtensa: fix initialization of pt_regs::syscall in start_thread xtensa: use actual syscall number in do_syscall_trace_leave
2019-04-08ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh modeKeerthy1-1/+75
Add support for rtc+ddr in self refresh mode. Add addtional pm hooks for save/restore and rtc suspend/resume. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mcspi platform data for omap4Tony Lindgren1-117/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop uart platform data for dra7Tony Lindgren1-272/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop gpio platform data for dra7Tony Lindgren1-270/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for dra7Tony Lindgren1-150/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for dra7Tony Lindgren1-149/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop uart platform data for omap5Tony Lindgren1-172/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop gpio platform data for omap5Tony Lindgren1-269/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for omap5Tony Lindgren1-150/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for omap5Tony Lindgren1-155/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop uart platform data for am33xx and am43xxTony Lindgren5-186/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop gpio platform data for am33xx and am43xxTony Lindgren4-151/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for am33xx and am43xxTony Lindgren5-112/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for am330x and am43xxTony Lindgren5-113/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop uart platform data for omap4Tony Lindgren1-122/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop gpio platform data for omap4Tony Lindgren1-207/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop i2c platform data for omap4Tony Lindgren1-125/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: Drop mmc platform data for omap4Tony Lindgren1-166/+0
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08arm64: backtrace: Don't bother trying to unwind the userspace stackWill Deacon1-6/+9
Calling dump_backtrace() with a pt_regs argument corresponding to userspace doesn't make any sense and our unwinder will simply print "Call trace:" before unwinding the stack looking for user frames. Rather than go through this song and dance, just return early if we're passed a user register state. Cc: <stable@vger.kernel.org> Fixes: 1149aad10b1e ("arm64: Add dump_backtrace() in show_regs") Reported-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08ARM: dts: am335x: pocketbeagle: Replaced register offsets with definesChristina Quast1-28/+28
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: boneblack-wireless: Replaced register offsets with definesChristina Quast1-14/+14
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: boneblack-common: Replaced register offsets with definesChristina Quast1-27/+27
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: dts: am335x: bone-common: Replaced register offsets with definesChristina Quast1-58/+58
The defines are taken from dt-bindings/pinctrl/am33xx.h Signed-off-by: Christina Quast <cquast@hanoverdisplays.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08arm64/ftrace: fix inadvertent BUG() in trampoline checkArd Biesheuvel2-2/+6
The ftrace trampoline code (which deals with modules loaded out of BL range of the core kernel) uses plt_entries_equal() to check whether the per-module trampoline equals a zero buffer, to decide whether the trampoline has already been initialized. This triggers a BUG() in the opcode manipulation code, since we end up checking the ADRP offset of a 0x0 opcode, which is not an ADRP instruction. So instead, add a helper to check whether a PLT is initialized, and call that from the frace code. Cc: <stable@vger.kernel.org> # v5.0 Fixes: bdb85cd1d206 ("arm64/module: switch to ADRP/ADD sequences for PLT entries") Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08x86/dma: Remove the x86_dma_fallback_dev hackChristoph Hellwig3-36/+0
Now that we removed support for the NULL device argument in the DMA API, there is no need to cater for that in the x86 code. Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-04-08arm: use a dummy struct device for ISA DMA use of the DMA APIChristoph Hellwig2-2/+14
This gets rid of the last NULL dev argument passed to the DMA API. Signed-off-by: Christoph Hellwig <hch@lst.de>
2019-04-08ARC: memset: fix build with L1_CACHE_SHIFT != 6Eugeniy Paltsev1-2/+2
In case of 'L1_CACHE_SHIFT != 6' we define dummy assembly macroses PREALLOC_INSTR and PREFETCHW_INSTR without arguments. However we pass arguments to them in code which cause build errors. Fix that. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: <stable@vger.kernel.org> [5.0] Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2019-04-08arm64: dts: hi3660: Fixup unofficial dma-min-chan to dma-channel-maskJohn Stultz1-1/+1
A undocumented and unimplemented binding got into the hi3660 dtsi, and this switches that binding to the now documented one. Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add hisi asp dma deviceYoulin Wang1-0/+10
Add asp-dma device to hi3660 dts Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Youlin Wang <wwx575822@notesmail.huawei.com> Signed-off-by: Tanglei Han <hantanglei@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hi3660: Add dma to uart nodesJohn Stultz1-0/+8
Try to add DMA support to the uart nodes following the assignments made in the dts from the victoria vendor kernel here: https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hikey970: Add SD and WiFi supportManivannan Sadhasivam2-0/+190
Add SD and WiFi support for HiKey970 board based on HI3670 SoC. Due to the absence of the PMIC driver, fixed regulators are sourced to make the driver working. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hi3670: Add MMC controller supportManivannan Sadhasivam1-0/+37
Add MMC controller support for HiSilicon HI3670 SoC reusing the HI3660 Designware MMC driver. There are 2 DWMMC controllers present in this SoC: 1. DWMMC1 is used for SD card (SD) 2. DWMMC2 is used for WiFi (SDIO) Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08arm64: dts: hisilicon: hi3670: Add reset controller supportManivannan Sadhasivam1-0/+7
Add reset controller support for HiSilicon HI3670 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2019-04-08tracing: stop making gpio tracing configurableUwe Kleine-König2-2/+0
gpio tracing was made configurable in 4.4-rc1 (commit ddd70280bf0e ("tracing: gpio: Add Kconfig option for enabling/disabling trace events")). Since then it is the only event type that can be compiled conditionally. Given that there is only little overhead I don't understand the reasoning and I was annoyed more than once that gpio events were not available without recompiling. So drop the Kconfig symbol and make gpio events available unconditionally. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-08ARM: dts: at91-vinco: use SPDX-License-IdentifierAlexandre Belloni1-38/+1
External E-Mail The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-08ARM: dts: atmel boards: use SPDX-License-IdentifierAlexandre Belloni9-342/+9
External E-Mail The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-08ARM: dts: at91sam9xe: use SPDX-License-IdentifierAlexandre Belloni1-38/+1
External E-Mail The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-08ARM: dts: sama5d{2,4}: use SPDX-License-IdentifierAlexandre Belloni2-76/+2
External E-Mail The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-08powerpc/64s/radix: Fix radix segment exception handlingNicholas Piggin1-0/+12
Commit 48e7b76957 ("powerpc/64s/hash: Convert SLB miss handlers to C") broke the radix-mode segment exception handler. In radix mode, this is exception is not an SLB miss, rather it signals that the EA is outside the range translated by any page table. The commit lost the radix feature alternate code patch, which can cause faults to some EAs to kernel BUG at arch/powerpc/mm/slb.c:639! The original radix code would send faults to slb_miss_large_addr, which would end up faulting due to slb_addr_limit being 0. This patch sends radix directly to do_bad_slb_fault, which is a bit clearer. Fixes: 48e7b7695745 ("powerpc/64s/hash: Convert SLB miss handlers to C") Cc: stable@vger.kernel.org # v4.20+ Reported-by: Anton Blanchard <anton@samba.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-04-08arch: Remove dummy mmiowb() definitions from arch codeWill Deacon5-10/+0
Now that no driver code is using mmiowb() directly, remove the dummy definitions remaining in architectures that don't make use of asm-generic/io.h, as well as the definition in asm-generic/io.h itself. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08riscv/mmiowb: Hook up mmwiob() implementation to asm-generic codeWill Deacon4-14/+17
In a bid to kill off explicit mmiowb() usage in driver code, hook up the asm-generic mmiowb() tracking code for riscv, so that an mmiowb() is automatically issued from spin_unlock() if an I/O write was performed in the critical section. Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08powerpc/mmiowb: Hook up mmwiob() implementation to asm-generic codeWill Deacon7-50/+33
In a bid to kill off explicit mmiowb() usage in driver code, hook up the asm-generic mmiowb() tracking code but provide a definition of arch_mmiowb_state() so that the tracking data can remain in the paca as it does at present This replaces the existing (flawed) implementation. Acked-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08ia64/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()Will Deacon4-18/+27
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for ia64. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08mips/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()Will Deacon4-4/+26
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for mips. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Paul Burton <paul.burton@mips.com> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()Will Deacon4-4/+14
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for sh. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08m68k/io: Remove useless definition of mmiowb()Will Deacon1-2/+0
m68k includes asm-generic/io.h, which provides a dummy definition of mmiowb() if one isn't already provided by the architecture. Remove the useless definition. Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08nds32/io: Remove useless definition of mmiowb()Will Deacon1-2/+0
mmiowb() only makes sense for SMP platforms, so remove it entirely for nds32. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08x86/io: Remove useless definition of mmiowb()Will Deacon1-2/+0
x86 maps mmiowb() to barrier(), but this is superfluous because a compiler barrier is already implied by spin_unlock(). Since x86 also includes asm-generic/io.h in its asm/io.h file, remove the definition entirely and pick up the dummy definition from core code. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-08arm64/io: Remove useless definition of mmiowb()Will Deacon1-2/+0
arm64 includes asm-generic/io.h, which provides a dummy definition of mmiowb() if one isn't already provided by the architecture. Remove the useless definition. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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