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2019-03-22crypto: x86/morus1280 - convert to use AEAD SIMD helpersEric Biggers3-95/+14
Convert the x86 implementations of MORUS-1280 to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/morus640 - convert to use AEAD SIMD helpersEric Biggers2-90/+7
Convert the x86 implementation of MORUS-640 to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/aegis256 - convert to use AEAD SIMD helpersEric Biggers1-123/+26
Convert the x86 implementation of AEGIS-256 to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/aegis128l - convert to use AEAD SIMD helpersEric Biggers1-123/+26
Convert the x86 implementation of AEGIS-128L to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/aegis128 - convert to use AEAD SIMD helpersEric Biggers1-123/+26
Convert the x86 implementation of AEGIS-128 to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/aesni - convert to use AEAD SIMD helpersEric Biggers1-146/+15
Convert the AES-NI implementations of "gcm(aes)" and "rfc4106(gcm(aes))" to use the AEAD SIMD helpers, rather than hand-rolling the same functionality. This simplifies the code and also fixes the bug where the user-provided aead_request is modified. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22crypto: x86/aesni - convert to use skcipher SIMD bulk registrationEric Biggers1-36/+7
Convert the AES-NI glue code to use simd_register_skciphers_compat() to create SIMD wrappers for all the internal skcipher algorithms at once, rather than wrapping each one individually. This simplifies the code. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2019-03-22x86/mm/pti: Make local symbols staticValdis Kletnieks1-2/+2
With 'make C=2 W=1', sparse and gcc both complain: CHECK arch/x86/mm/pti.c arch/x86/mm/pti.c:84:3: warning: symbol 'pti_mode' was not declared. Should it be static? arch/x86/mm/pti.c:605:6: warning: symbol 'pti_set_kernel_image_nonglobal' was not declared. Should it be static? CC arch/x86/mm/pti.o arch/x86/mm/pti.c:605:6: warning: no previous prototype for 'pti_set_kernel_image_nonglobal' [-Wmissing-prototypes] 605 | void pti_set_kernel_image_nonglobal(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ pti_set_kernel_image_nonglobal() is only used locally. 'pti_mode' exists in drivers/hwtracing/intel_th/pti.c as well, but it's a completely unrelated local (static) symbol. Make both static. Signed-off-by: Valdis Kletnieks <valdis.kletnieks@vt.edu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lkml.kernel.org/r/27680.1552376873@turing-police
2019-03-22ARM: dts: ape6evm: Add NOR FLASHGeert Uytterhoeven1-0/+27
Describe the 128 MiB CFI NOR FLASH, which contains the boot loader and its environment. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-22arm64: dts: imx8mq: Move the opp table out of bus nodeFabio Estevam1-19/+18
Move opp-table node from soc node to root node. opp-table node does not have any register properties and thus shouldn't be placed inside the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/imx8mq.dtsi:687.28-703.5: Warning (simple_bus_reg): /soc@0/opp-table: missing or empty reg/ranges property Fixes: 64d26f8c1dde ("arm64: dts: imx8mq: Add the opp table and cores opp properties") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: ls1043a: add crypto node alias also for qdsHoria Geantă2-1/+1
crypto node alias is needed by U-boot to identify the node and perform fix-ups, like adding "fsl,sec-era" property or deleting a job ring child node (in case ARM TF-A is running). Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: fsl: Remove unused properties from FSL QSPI nodesFrieder Schrempf2-3/+0
After switching to the new FSL QSPI driver the properties 'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore. The driver now uses the 'reg' property to determine the bus and the chipselect. The endianness is selected by the driver depending on which SoC is used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: ls1021a: Remove unused properties from QSPI nodeFrieder Schrempf2-2/+0
After switching to the new FSL QSPI driver the properties 'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore. The driver now uses the 'reg' property to determine the bus and the chipselect. The endianness is selected by the driver depending on which SoC is used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22arm64: dts: imx8mq: enable the multi sensor TMUAngus Ainslie (Purism)1-0/+118
Add the imx8mq TMU (Thermal management unit) nodes for CPU, GPU, and VPU. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: imx_v4_v5_defconfig: enable PWM driverUwe Kleine-König1-0/+3
While there is no mainline board that makes use of the PWM still enable the driver for it to increase compile test coverage. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: imx_v6_v7_defconfig: continue compiling the pwm driverUwe Kleine-König1-1/+1
After the pwm-imx driver was split into two drivers and the Kconfig symbol changed accordingly, use the new name to continue being able to use the PWM hardware. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: imx50: Add PHY node for usbotg and adjust clocksJonathan Neuschäfer1-1/+10
Even though the ChipIdea USB controller binding[1] doesn't specify the properties that reference a PHY as required, the Linux driver requires[2] such a reference. The clock situation is like on i.MX53: The USB controller is clocked from IMX5_CLK_USBOH3_GATE and the PHY from IMX5_CLK_USB_PHY1_GATE. [1]: Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt [2]: Search for EINVAL in drivers/usb/chipidea/ci_hdrc_imx.c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: i.MX35: Add i2c and mmc aliasesAlexander Kurz1-0/+6
Using aliases, the devices will be enumerated properly. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: i.MX6SL: Add i2c and mmc aliasesAlexander Kurz1-0/+7
Using aliases, the devices will be enumerated properly. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: i.MX50: Add i2c, mmc and spi aliasesAlexander Kurz1-0/+10
Using aliases, the devices will be enumerated properly. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switchMichal Vokáč1-2/+2
The switch is accessible through pseudo PHY which is located at 0x10. Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Fixes: 87489ec3a77f ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-22ARM: dts: imx6qdl: Fix typo in imx6qdl-icore-rqs.dtsiMasanari Iida1-2/+2
This patch fixes a spelling typo. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Fixes: cc42603de320 ("ARM: dts: imx6q-icore-rqs: Add Engicam IMX6 Q7 initial support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds5-26/+37
Pull arm64 fixes from Catalin Marinas: "Mostly fixes apart from the kprobe blacklist checking which was deferred because of conflicting with a fix merged after I pinned the arm64 for-next/core branch (f2b3d8566d81 "arm64: kprobe: Always blacklist the KVM world-switch code"). Summary: - Update the kprobe blacklist checking for arm64. This was supposed to be queued during the merging window but, due to conflicts, it was deferred post -rc1 - Extend the Fujitsu erratum 010001 workaround to A64FX v1r0 - Whitelist HiSilicon Taishan v110 CPUs as not susceptible to Meltdown - Export save_stack_trace_regs() - Remove obsolete selection of MULTI_IRQ_HANDLER" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: remove obsolete selection of MULTI_IRQ_HANDLER arm64: kpti: Whitelist HiSilicon Taishan v110 CPUs arm64: Add MIDR encoding for HiSilicon Taishan CPUs arm64/stacktrace: Export save_stack_trace_regs() arm64: apply workaround on A64FX v1r0 arm64: kprobes: Use arch_populate_kprobe_blacklist() arm64: kprobes: Move exception_text check in blacklist arm64: kprobes: Remove unneeded RODATA check arm64: kprobes: Move extable address check into arch_prepare_kprobe()
2019-03-21arm64: dts: stratix10: enable MMC highspeed supportDinh Nguyen1-0/+1
Add 'cap-mmc-highspeed' property to enable high-speed support for MMC cards. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-03-21ARM: dts: socfpga: enable MMC highspeed supportDinh Nguyen1-0/+1
Add 'cap-mmc-highspeed' property to enable high-speed support for MMC cards. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-03-21arm64: dts: stratix10: add the sysmgr-syscon property from the gmac'sDinh Nguyen1-0/+3
The gmac ethernet driver uses the "altr,sysmgr-syscon" property to configure phy settings for the gmac controller. Add the "altr,sysmgr-syscon" property to all gmac nodes. This patch fixes: [ 0.917530] socfpga-dwmac ff800000.ethernet: No sysmgr-syscon node found [ 0.924209] socfpga-dwmac ff800000.ethernet: Unable to parse OF data Cc: stable@vger.kernel.org Reported-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-03-21ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288Douglas Anderson1-13/+13
It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-03-21arm64: dts: imx8qxp: add lsio_mu2 nodePeng Fan1-0/+8
Add lsio_mu2 node which could be used communicate with SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: imx8qxp: fix mbox-cellsPeng Fan1-3/+3
Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but actually mu0-4 could be used to communicate with SCU. So fix the mbox-cells. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21Merge tag 'irqchip-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgentThomas Gleixner1-1/+1
Pull irqchip updates for 5.1 from Marc Zyngier: - irqsteer error handling fix - GICv3 range coalescing fix - stm32 coprocessor coexistence fixes - mbigen MSI teardown fix - non-DT secondary GIC infrastructure removed - various cleanups (brcmstb-l2, mmp) - new DT bindings (r8a774c0)
2019-03-21x86/cpu/cyrix: Remove {get,set}Cx86_old macros used for Cyrix processorsMatthew Whitehead1-21/+0
The getCx86_old() and setCx86_old() macros have been replaced with correctly working getCx86() and setCx86(), so remove these unused macros. Signed-off-by: Matthew Whitehead <tedheadster@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: luto@kernel.org Link: https://lkml.kernel.org/r/1552596361-8967-3-git-send-email-tedheadster@gmail.com
2019-03-21x86/cpu/cyrix: Use correct macros for Cyrix calls on Geode processorsMatthew Whitehead1-7/+7
There are comments in processor-cyrix.h advising you to _not_ make calls using the deprecated macros in this style: setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80); This is because it expands the macro into a non-functioning calling sequence. The calling order must be: outb(CX86_CCR2, 0x22); inb(0x23); From the comments: * When using the old macros a line like * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); * gets expanded to: * do { * outb((CX86_CCR2), 0x22); * outb((({ * outb((CX86_CCR2), 0x22); * inb(0x23); * }) | 0x88), 0x23); * } while (0); The new macros fix this problem, so use them instead. Tested on an actual Geode processor. Signed-off-by: Matthew Whitehead <tedheadster@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: luto@kernel.org Link: https://lkml.kernel.org/r/1552596361-8967-2-git-send-email-tedheadster@gmail.com
2019-03-21x86/microcode: Announce reload operation's completionBorislav Petkov1-0/+2
By popular demand, issue a single line to dmesg after the reload operation completes to let the user know that a reload has at least been attempted. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190313110022.8229-1-bp@alien8.de
2019-03-21x86/hyperv: Prevent potential NULL pointer dereferenceKangjie Lu1-1/+5
The page allocation in hv_cpu_init() can fail, but the code does not have a check for that. Add a check and return -ENOMEM when the allocation fails. [ tglx: Massaged changelog ] Signed-off-by: Kangjie Lu <kjlu@umn.edu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Acked-by: "K. Y. Srinivasan" <kys@microsoft.com> Cc: pakki001@umn.edu Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Sasha Levin <sashal@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: linux-hyperv@vger.kernel.org Link: https://lkml.kernel.org/r/20190314054651.1315-1-kjlu@umn.edu
2019-03-21x86/hpet: Prevent potential NULL pointer dereferenceAditya Pakki1-0/+2
hpet_virt_address may be NULL when ioremap_nocache fail, but the code lacks a check. Add a check to prevent NULL pointer dereference. Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: kjlu@umn.edu Cc: Borislav Petkov <bp@alien8.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Kees Cook <keescook@chromium.org> Cc: Joe Perches <joe@perches.com> Cc: Nicolai Stange <nstange@suse.de> Cc: Roland Dreier <roland@purestorage.com> Link: https://lkml.kernel.org/r/20190319021958.17275-1-pakki001@umn.edu
2019-03-21x86/lib: Fix indentation issue, remove extra tabColin Ian King1-1/+1
The increment of buff is indented one level too deeply, clean this up by removing a tab. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Borislav Petkov <bp@alien8.de> Cc: "H . Peter Anvin" <hpa@zytor.com> Cc: kernel-janitors@vger.kernel.org Link: https://lkml.kernel.org/r/20190314230838.18256-1-colin.king@canonical.com
2019-03-21x86/boot: Restrict header scope to make Clang happyNick Desaulniers1-1/+2
The inclusion of <linux/kernel.h> was causing issue as the definition of __arch_hweight64 from arch/x86/include/asm/arch_hweight.h eventually gets included. The definition is problematic when compiled with -m16 (all code in arch/x86/boot/ is) as the "D" inline assembly constraint is rejected by both compilers when passed an argument of type long long (regardless of signedness, anything smaller is fine). Because GCC performs inlining before semantic analysis, and __arch_hweight64 is dead in this translation unit, GCC does not report any issues at compile time. Clang does the semantic analysis in the front end, before inlining (run in the middle) can determine the code is dead. I consider this another case of PR33587, which I think we can do more work to solve. It turns out that arch/x86/boot/string.c doesn't actually need linux/kernel.h, simply linux/limits.h and linux/compiler.h. Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nathan Chancellor <natechancellor@gmail.com> Cc: bp@alien8.de Cc: niravd@google.com Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Chao Fan <fanc.fnst@cn.fujitsu.com> Cc: Uros Bizjak <ubizjak@gmail.com> Link: https://bugs.llvm.org/show_bug.cgi?id=33587 Link: https://github.com/ClangBuiltLinux/linux/issues/347 Link: https://lkml.kernel.org/r/20190314221458.83047-1-ndesaulniers@google.com
2019-03-21powerpc/security: Fix spectre_v2 reportingMichael Ellerman1-15/+8
When I updated the spectre_v2 reporting to handle software count cache flush I got the logic wrong when there's no software count cache enabled at all. The result is that on systems with the software count cache flush disabled we print: Mitigation: Indirect branch cache disabled, Software count cache flush Which correctly indicates that the count cache is disabled, but incorrectly says the software count cache flush is enabled. The root of the problem is that we are trying to handle all combinations of options. But we know now that we only expect to see the software count cache flush enabled if the other options are false. So split the two cases, which simplifies the logic and fixes the bug. We were also missing a space before "(hardware accelerated)". The result is we see one of: Mitigation: Indirect branch serialisation (kernel only) Mitigation: Indirect branch cache disabled Mitigation: Software count cache flush Mitigation: Software count cache flush (hardware accelerated) Fixes: ee13cb249fab ("powerpc/64s: Add support for software count cache flush") Cc: stable@vger.kernel.org # v4.19+ Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Michael Neuling <mikey@neuling.org> Reviewed-by: Diana Craciun <diana.craciun@nxp.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-03-21arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supplyChen-Yu Tsai4-4/+4
The A64 datasheet lists the supply rail for the headphone amp's charge pump as "CPVDD". cpvdd-supply is the name of the property for this power rail specified in the device tree bindings. "HPVCC" was the name used in the A33 datasheet for the same function. Rename the supply so it matches the datasheet and bindings. Fixes: c56689e6f2fb ("arm64: dts: allwinner: a64: bananapi-m64: Enable audio codec") Fixes: 6de8e717848f ("arm64: dts: allwinner: a64: enable sound on Pinebook") Fixes: 498c21f233ed ("arm64: dts: allwinner: a64: enable sound on Pine64 and SoPine") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2019-03-21ARM: dts: sunxi: h3/h5: Add device node for SIDChen-Yu Tsai3-0/+13
The device tree binding already lists compatible strings for these two SoCs. Add a device node for them. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2019-03-21ARM: dts: vf610-zii: Remove 'max-brightness' propertyFabio Estevam3-7/+0
The 'max-brightness' property is not a valid one as per Documentation/devicetree/bindings/leds/leds-gpio.txt, so remove it. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21ARM: dts: imx6qdl: Improve mmdc1 nodeAnson Huang1-0/+2
Add MMDC1 compatible string which is missing, and also set it to be disabled by default, as most of the platforms ONLY use single channel MMDC0, if dual MMDC channels are used, it can be enabled in board dts file. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21ARM: dts: imx: make MMDC node name genericAnson Huang4-5/+5
Node name should be generic, so use "memory-controller" instead of "mmdc" for MMDC node name, also remove "mmdc" label for platforms with single MMDC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21ARM: dts: imx7ulp: add mmdc supportAnson Huang1-0/+6
i.MX7ULP has a MMDC module to control DDR, it reuses i.MX6Q's MMDC module, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21ARM: dts: imx6ull: Use the correct style for SPDX License IdentifierNishad Kamdar1-1/+1
This patch corrects the SPDX License Identifier style in imx6ull-pinfunc-snvs.h. Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46 and making some manual changes. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-20syscall_get_arch: add "struct task_struct *" argumentDmitry V. Levin27-36/+45
This argument is required to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request: syscall_get_arch() is going to be called from ptrace_request() along with syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions with a tracee as their argument. The primary intent is that the triple (audit_arch, syscall_nr, arg1..arg6) should describe what system call is being called and what its arguments are. Reverts: 5e937a9ae913 ("syscall_get_arch: remove useless function arguments") Reverts: 1002d94d3076 ("syscall.h: fix doc text for syscall_get_arch()") Reviewed-by: Andy Lutomirski <luto@kernel.org> # for x86 Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Paul Moore <paul@paul-moore.com> Acked-by: Paul Burton <paul.burton@mips.com> # MIPS parts Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Acked-by: Kees Cook <keescook@chromium.org> # seccomp parts Acked-by: Mark Salter <msalter@redhat.com> # for the c6x bit Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: x86@kernel.org Cc: linux-alpha@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-c6x-dev@linux-c6x.org Cc: uclinux-h8-devel@lists.sourceforge.jp Cc: linux-hexagon@vger.kernel.org Cc: linux-ia64@vger.kernel.org Cc: linux-m68k@lists.linux-m68k.org Cc: linux-mips@vger.kernel.org Cc: nios2-dev@lists.rocketboards.org Cc: openrisc@lists.librecores.org Cc: linux-parisc@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-riscv@lists.infradead.org Cc: linux-s390@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: linux-um@lists.infradead.org Cc: linux-xtensa@linux-xtensa.org Cc: linux-arch@vger.kernel.org Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>
2019-03-20unicore32: define syscall_get_arch()Dmitry V. Levin1-0/+12
syscall_get_arch() is required to be implemented on all architectures in addition to already implemented syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions in order to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. Acked-by: Paul Moore <paul@paul-moore.com> Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>
2019-03-20Move EM_UNICORE to uapi/linux/elf-em.hDmitry V. Levin1-2/+1
This should never have been defined in the arch tree to begin with, and now uapi/linux/audit.h header is going to use EM_UNICORE in order to define AUDIT_ARCH_UNICORE which is needed to implement syscall_get_arch() which in turn is required to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. Acked-by: Paul Moore <paul@paul-moore.com> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>
2019-03-20nios2: define syscall_get_arch()Dmitry V. Levin1-0/+6
syscall_get_arch() is required to be implemented on all architectures in addition to already implemented syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions in order to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. Acked-by: Paul Moore <paul@paul-moore.com> Acked-by: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: nios2-dev@lists.rocketboards.org Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>
2019-03-20nds32: define syscall_get_arch()Dmitry V. Levin1-0/+9
syscall_get_arch() is required to be implemented on all architectures in addition to already implemented syscall_get_nr(), syscall_get_arguments(), syscall_get_error(), and syscall_get_return_value() functions in order to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. Acked-by: Paul Moore <paul@paul-moore.com> Acked-by: Vincent Chen <vincentc@andestech.com> Acked-by: Greentime Hu <greentime@andestech.com> Cc: Elvira Khabirova <lineprinter@altlinux.org> Cc: Eugene Syromyatnikov <esyr@redhat.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: linux-audit@redhat.com Signed-off-by: Dmitry V. Levin <ldv@altlinux.org> Signed-off-by: Paul Moore <paul@paul-moore.com>