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2022-05-23MIPS: Rewrite `csum_tcpudp_nofold' in plain CMaciej W. Rozycki1-37/+34
Recent commit 198688edbf77 ("MIPS: Fix inline asm input/output type mismatch in checksum.h used with Clang") introduced a code size and performance regression with 64-bit code emitted for `csum_tcpudp_nofold' by GCC, caused by a redundant truncation operation produced due to a data type change made to the variable associated with the inline assembly's output operand. The intent previously expressed here with operands and constraints for optimal code was to have the output operand share a register with one inputs, both of a different integer type each. This is perfectly valid with the MIPS psABI where a register can hold integer data of different types and the assembly code used here makes data stored in the output register match the data type used with the output operand, however it has turned out impossible to express this arrangement in source code such as to satisfy LLVM, apparently due to the compiler's internal limitations. There is nothing peculiar about the inline assembly `csum_tcpudp_nofold' includes however, though it does choose assembly instructions carefully. Rewrite this piece of assembly in plain C then, using corresponding C language operations, making GCC produce the same assembly instructions, possibly shuffled, in the general case and sometimes actually fewer of them where an input is constant, because the compiler does not have to reload it to a register (operand constraints could be adjusted for that, but the plain C approach is cleaner anyway). Example code size changes are as follows, for a 32-bit configuration: text data bss total filename 5920480 1347236 126592 7394308 vmlinux-old 5920480 1347236 126592 7394308 vmlinux-now 5919728 1347236 126592 7393556 vmlinux-c and for a 64-bit configuration: text data bss total filename 6024112 1790828 225728 8040668 vmlinux-old 6024128 1790828 225728 8040684 vmlinux-now 6023760 1790828 225728 8040316 vmlinux-c respectively, where "old" is with the commit referred reverted, "now" is with no change, and "c" is with this change applied. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23mips: setup: use strscpy to replace strlcpy陈学兵1-3/+3
The strlcpy should not be used because it doesn't limit the source length. Preferred is strscpy. Signed-off-by: XueBing Chen <chenxuebing@jari.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: Octeon: add SNIC10E boardStijn Tintel1-0/+2
The CN6640-SNIC10E-G and CN6640-SNIC10E-1.1-G PCIe NICs are based on this board. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: Ingenic: Refresh defconfig for CU1000-Neo and CU1830-Neo.周琰杰 (Zhou Yanjie)2-2/+2
Refresh the defconfig files of CU1000-Neo board and CU1830-Neo board, remove the selection of SPI-GPIO, and add the selection of SSI. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: Ingenic: Refresh device tree for Ingenic SoCs and boards.周琰杰 (Zhou Yanjie)4-74/+138
1.Add SSI nodes for X1000 SoC and X1830 SoC from Ingenic. 2.Refresh SSI related nodes in CU1000-Neo and CU1830-Neo. 3.The X1830 SoC used by the CU1830-Neo and the X1000 SoC used by the CU1000-Neo are both single-core processors, therefore the "OST_CLK_PERCPU_TIMER" ABI should not be used in the OST nodes of the CU1830-Neo and CU1000-Neo, it is just a coincidence that there is no problem now. So replace the misused "OST_CLK_PERCPU_TIMER" ABI with the correct "OST_CLK_EVENT_TIMER" ABI. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: Ingenic: Add PWM nodes for X1830.周琰杰 (Zhou Yanjie)1-0/+14
Add PWM node for X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: Octeon: fix typo in commentJulia Lawall1-1/+1
Spelling mistake (triple letters) in comment. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23MIPS: loongson32: Kconfig: Remove extra spaceJuerg Haefliger1-1/+1
Remove extra space between 'prompt' keyword and string. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-05-23openrisc: Allow power off handler overridingStafford Horne1-2/+15
The OpenRISC platform always defines a default pm_power_off hanlder which is only useful for simulators. Having this set also means power management drivers like syscon-power are not able to wire in their own pm_power_off handlers. Fix this by not setting the pm_power_off handler by default and fallback to the simulator power off handler if no handler is set. This has been tested with a new OpenRISC virt platform I am working on for QEMU. https://github.com/stffrdhrn/qemu/commits/or1k-virt Cc: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Remove unused IMMU tlb workardoundStafford Horne1-209/+0
This looks to be some historical code that was used to convert TLB misses on branches from l.bf, l.jal, l.j etc all to a trampoline using l.jr (jump register). I don't see this being used and I don't know the history of it so remove it. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/fault: Fix symbol scope warningsStafford Horne1-3/+1
Sparse reported the following warning: arch/openrisc/mm/fault.c:27:15: warning: symbol 'pte_misses' was not declared. Should it be static? arch/openrisc/mm/fault.c:28:15: warning: symbol 'pte_errors' was not declared. Should it be static? arch/openrisc/mm/fault.c:33:16: warning: symbol 'current_pgd' was not declared. Should it be static? This patch fixes these by: - Remove unused pte_misses and pte_errors counters which are no longer used. - Add asm/mmu_context.h include to provide the current_pgd declaration. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/delay: Add include to fix symbol not declared warningStafford Horne1-0/+1
Add asm/timex.h include for read_current_timer prototype. Sparse reporting the following warning: arch/openrisc/lib/delay.c:23:5: warning: symbol 'read_current_timer' was not declared. Should it be static? Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/time: Fix symbol scope warningsStafford Horne1-1/+2
Spare reported the following warnings: arch/openrisc/kernel/time.c:64:1: warning: symbol 'clockevent_openrisc_timer' was not declared. Should it be static? arch/openrisc/kernel/time.c:66:6: warning: symbol 'openrisc_clockevent_init' was not declared. Should it be static? This patch fixes by: - Add static declaration to clockevent_openrisc_timer as it's used only in this file. - Add include for asm/time.h for openrisc_clockevent_init declaration. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/traps: Declare unhandled_exception for asmlinkageStafford Horne1-1/+1
Noticed this when workin on warnings. As unhandled_exception is used in entry.S we should attribute it with asmlinkage. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/traps: Remove die_if_kernel functionStafford Horne1-9/+0
This was noticed when I saw this warning: arch/openrisc/kernel/traps.c:234:6: warning: no previous prototype for 'die_if_kernel' [-Wmissing-prototypes] 234 | void die_if_kernel(const char *str, struct pt_regs *regs, long err) | ^~~~~~~~~~~~~ The die_if_kernel function is not used in the OpenRISC port so remove it. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc/traps: Declare file scope symbols as staticStafford Horne1-3/+3
Sparse was reporting the following warnings: arch/openrisc/kernel/traps.c:37:5: warning: symbol 'kstack_depth_to_print' was not declared. Should it be static? arch/openrisc/kernel/traps.c:39:22: warning: symbol 'lwa_addr' was not declared. Should it be static? arch/openrisc/kernel/traps.c:41:6: warning: symbol 'print_trace' was not declared. Should it be static? The function print_trace and local variables kstack_depth_to_print and lwa_addr are not used outside of this file. This patch marks them as static. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Update litex defconfig to support glibc userlandStafford Horne1-0/+32
I have been using a litex SoC for glibc verification. Update the default litex config to support required userspace API's needed for the full glibc testsuite to pass. This includes enabling the litex mmc driver and filesystems used in a typical litex environment. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Pretty print show_registers memory dumpsStafford Horne1-13/+33
Currently show registers, print memory dumps character by character and there is no address information, so its a bit difficult to use. For example before a stack dump looks as follows. [ 13.650000] Stack: [ 13.650000] Call trace [ 13.690000] [<(ptrval)>] ? put_timespec64+0x44/0x60 [ 13.690000] [<(ptrval)>] ? _data_page_fault_handler+0x104/0x10c [ 13.700000] [ 13.700000] Code: [ 13.700000] 13 [ 13.700000] ff [ 13.700000] ff [ 13.700000] f9 [ 13.710000] 84 [ 13.710000] 82 [ 13.710000] ff [ 13.710000] bc [ 13.710000] 07 [ 13.710000] fd [ 13.720000] 4e [ 13.720000] 67 [ 13.720000] 84 [ 13.720000] 62 [ 13.720000] ff ... This change updates this to print the address and data a word at time. [ 0.830000] Stack: [ 0.830000] Call trace: [ 0.830000] [<(ptrval)>] load_elf_binary+0x744/0xf5c [ 0.830000] [<(ptrval)>] ? __kernel_read+0x144/0x184 [ 0.830000] [<(ptrval)>] bprm_execve+0x27c/0x3e4 [ 0.830000] [<(ptrval)>] kernel_execve+0x16c/0x1a0 [ 0.830000] [<(ptrval)>] run_init_process+0xa0/0xec [ 0.830000] [<(ptrval)>] ? kernel_init+0x0/0x14c [ 0.830000] [<(ptrval)>] kernel_init+0x7c/0x14c [ 0.830000] [<(ptrval)>] ? calculate_sigpending+0x30/0x40 [ 0.830000] [<(ptrval)>] ret_from_fork+0x1c/0x84 [ 0.830000] [ 0.830000] c1033dbc: c1033dec [ 0.830000] c1033dc0: c015258c [ 0.830000] c1033dc4: c129da00 [ 0.830000] c1033dc8: 00000002 [ 0.830000] c1033dcc: 00000000 [ 0.830000] c1033dd0: c129da00 [ 0.830000] c1033dd4: 00000000 [ 0.830000] c1033dd8: 00000000 [ 0.830000] (c1033ddc:) 00001e04 [ 0.830000] c1033de0: 001501fc [ 0.830000] c1033de4: c1033e68 [ 0.830000] c1033de8: c0152e60 [ 0.830000] c1033dec: c129da5c [ 0.830000] c1033df0: c0674a20 [ 0.830000] c1033df4: c1033e50 [ 0.830000] c1033df8: c00e3d6c [ 0.830000] c1033dfc: c129da5c [ 0.830000] c1033e00: 00000003 [ 0.830000] c1033e04: 00150000 [ 0.830000] c1033e08: 00002034 [ 0.830000] c1033e0c: 001501fc [ 0.830000] c1033e10: 00000000 [ 0.830000] c1033e14: 00150000 [ 0.830000] c1033e18: 0014ebbc [ 0.830000] c1033e1c: 00002000 [ 0.830000] c1033e20: 00000003 [ 0.830000] c1033e24: c12a07e0 [ 0.830000] c1033e28: 00000000 [ 0.830000] c1033e2c: 00000000 [ 0.830000] c1033e30: 00000000 [ 0.830000] c1033e34: 40040000 [ 0.830000] c1033e38: 00000000 [ 0.830000] [ 0.830000] Code: [ 0.830000] c00047a4: 9c21fff8 [ 0.830000] c00047a8: d4012000 [ 0.830000] c00047ac: d4011804 [ 0.830000] c00047b0: e4040000 [ 0.830000] c00047b4: 10000005 [ 0.830000] c00047b8: 9c84ffff [ 0.830000] (c00047bc:) d8030000 [ 0.830000] c00047c0: 03fffffc [ 0.830000] c00047c4: 9c630001 [ 0.830000] c00047c8: 9d640001 [ 0.830000] c00047cc: 84810000 [ 0.830000] c00047d0: 84610004 Now we are also printing a bit of the stack as well as the code. The stack is output to help with debugging. There may be concern about exposing sensitive information on the stack, but we are already dumping all register content which would have similar sensitive information. So I am going ahead as this proves useful in investigation. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Add syscall details to emergency syscall debuggingStafford Horne1-5/+15
When bringing linux on the or1k Marocchino we ran into issues starting init. This patch adds the syscall number and return address to assist tracing syscalls even before strace is able to be used. By default this is all disabled but a developer could adjust the ifdef to enable debugging. Cc: Andrey Bacherov <bandvig@mail.ru> Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Add support for liteuart emergency printingStafford Horne1-1/+12
This patch adds support for sending emergency print output, such as unhandled exception details, to a liteuart serial device. This is the default device available on litex platforms. If a developer want to use this they should update UART_BASE_ADD to the address of liteuart. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Cleanup emergency print handlingStafford Horne1-63/+85
The emergency print support only works for 8250 compatible serial ports. Now that OpenRISC platforms may be configured with different serial port hardware we don't want emergency print to try to print to non-existent hardware which will cause lockups. This patch contains several fixes to get emergency print working again: - Update symbol loading to not assume the location of symbols - Split the putc print operation out to its own function to allow for different future implementations. - Update _emergency_print_nr and _emergency_print to use the putc function. - Guard serial 8250 specific sequences by CONFIG_SERIAL_8250 - Update string line feed from lf,cr to cr,lf. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: Add gcc machine instruction flag configurationStafford Horne2-0/+70
OpenRISC GCC supports flags to enable the backend to output instructions if they are supported by a target processor. This patch adds configuration flags to enable configuring these flags to tune the kernel for a particular CPU configuration. In the future we could also enable all of these flags by default and provide instruction emulation in the kernel to make these choices easier for users but this is what we provide for now. Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23openrisc: define nop command for simulator rebootJason A. Donenfeld1-0/+2
The simulator defines `l.nop 1` for shutdown, but doesn't have anything for reboot. Use 13 for this, which is currently unused, dubbed `NOP_REBOOT`. Cc: Stafford Horne <shorne@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Link: https://lore.kernel.org/all/YmnaDUpVI5ihgvg6@zx2c4.com/ Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-05-23xtensa: Return true/false (not 1/0) from bool functionYang Li1-1/+1
Return boolean values ("true" or "false") instead of 1 or 0 from bool function. This fixes the following warnings from coccicheck: ./arch/xtensa/kernel/traps.c:304:10-11: WARNING: return of 0/1 in function 'check_div0' with return type bool Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Message-Id: <20220518230953.112266-1-yang.lee@linux.alibaba.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-05-22arm64: dts: mediatek: mt7986: introduce ethernet nodesLorenzo Bianconi3-0/+183
Introduce ethernet nodes in mt7986 bindings in order to enable mt7986a/mt7986b ethernet support. Co-developed-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-22m68k: atari: Make Atari ROM port I/O write macros return voidGeert Uytterhoeven1-3/+3
The macros implementing Atari ROM port I/O writes do not cast away their output, unlike similar implementations for other I/O buses. When they are combined using conditional expressions in the definitions of outb() and friends, this triggers sparse warnings like: drivers/net/appletalk/cops.c:382:17: error: incompatible types in conditional expression (different base types): drivers/net/appletalk/cops.c:382:17: unsigned char drivers/net/appletalk/cops.c:382:17: void Fix this by adding casts to "void". Reported-by: kernel test robot <lkp@intel.com> Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Michael Schmitz <schmitzmic@gmail.com> Link: https://lore.kernel.org/r/c15bedc83d90a14fffcd5b1b6bfb32b8a80282c5.1653057096.git.geert@linux-m68k.org
2022-05-22powerpc/powernv/pci: Drop VF MPS fixupOliver O'Halloran1-18/+0
The MPS field in the VF config space is marked as reserved in current versions of the SR-IOV spec. In other words, this fixup doesn't do anything. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200902035159.1762596-1-oohall@gmail.com
2022-05-22powerpc/fsl_book3e: Don't set rodata RO too earlyChristophe Leroy1-9/+6
On fsl_book3e, rodata is set read-only at the same time as init text is set NX at the end of init. That's too early. As both action are performed at the same time, delay both actions to the time rodata is expected to be made read-only. It means we will have a small window with init mem freed but still executable. It shouldn't be an issue though, especially because the said memory gets poisoned and should therefore result to a bad instruction fault in case it gets executed. mmu_mark_initmem_nx() is bailing out before doing anything when CONFIG_STRICT_KERNEL_RWX is not selected or rodata_enabled is false. mmu_mark_rodata_ro() is called only when CONFIG_STRICT_KERNEL_RWX is selected and rodata_enabled is true so this is equivalent. Move code from mmu_mark_initmem_nx() into mmu_mark_rodata_ro() and remove the call to strict_kernel_rwx_enabled() which is not needed anymore. Fixes: d5970045cf9e ("powerpc/fsl_booke: Update of TLBCAMs after init") Reported-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/2e35f0fd649c83c5add17a99514ac040767be93a.1652981047.git.christophe.leroy@csgroup.eu
2022-05-22powerpc/microwatt: Add mmu bits to device treeJoel Stanley1-0/+2
In commit 5402e239d09f ("powerpc/64s: Get LPID bit width from device tree") the kernel tried to determine the pid and lpid bits from the device tree. If they are not found, there is a fallback, but Microwatt wasn't covered as it has the unusual configuration of being both !HV and bare metal. Set the values in the device tree to avoid having to add a special case. The lpid value is the only one required, but add both for completeness. Fixes: 5402e239d09f ("powerpc/64s: Get LPID bit width from device tree") Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220519125706.593532-1-joel@jms.id.au
2022-05-22powerpc/powernv/flash: Check OPAL flash calls exist before usingVasant Hegde1-0/+4
Currently only FSP based powernv systems supports firmware update interfaces. Hence check that the token OPAL_FLASH_VALIDATE exists before initalising the flash driver. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210914101630.30613-1-hegdevasant@linux.vnet.ibm.com
2022-05-22powerpc/powermac: constify device_node in of_irq_parse_oldworld()Krzysztof Kozlowski1-1/+1
The of_irq_parse_oldworld() does not modify passed device_node so make it a pointer to const for safety. Drop the extern while modifying the line. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210924105653.46963-2-krzysztof.kozlowski@canonical.com
2022-05-22powerpc/powermac: add missing g5_phy_disable_cpu1() declarationKrzysztof Kozlowski2-2/+2
g5_phy_disable_cpu1() is used outside of platforms/powermac/feature.c, so it should have a declaration to fix W=1 warning: arch/powerpc/platforms/powermac/feature.c:1533:6: error: no previous prototype for ‘g5_phy_disable_cpu1’ [-Werror=missing-prototypes] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210924105653.46963-1-krzysztof.kozlowski@canonical.com
2022-05-22powerpc: Enable the DAWR on POWER9 DD2.3 and aboveReza Arbab3-5/+35
The hardware bug in POWER9 preventing use of the DAWR was fixed in DD2.3. Set the CPU_FTR_DAWR feature bit on these newer systems to start using it again, and update the documentation accordingly. The CPU features for DD2.3 are currently determined by "DD2.2 or later" logic. In adding DD2.3 as a discrete case for the first time here, I'm carrying the quirks of DD2.2 forward to keep all behavior outside of this DAWR change the same. This leaves the assessment and potential removal of those quirks on DD2.3 for later. Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220503170152.23412-1-arbab@linux.ibm.com
2022-05-22powerpc/64s: Add CPU_FTRS_POWER10 to ALWAYS maskMichael Ellerman1-2/+4
CPU_FTRS_POWER10 is missing from the CPU_FTRS_ALWAYS mask. Currently that doesn't cause any bug, because it is a superset of the POWER9 mask, which the exception of CPU_FTR_TM, but POWER7 doesn't have CPU_FTR_TM, so CPU_FTR_TM is not in the ALWAYS mask to begin with. However for consistency, and to be robust against future changes, it should be included in the ALWAYS mask. Fixes: a3ea40d5c736 ("powerpc: Add POWER10 architected mode") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220519122205.746276-2-mpe@ellerman.id.au
2022-05-22powerpc/64s: Add CPU_FTRS_POWER9_DD2_2 to CPU_FTRS_ALWAYS maskMichael Ellerman1-2/+2
CPU_FTRS_POWER9_DD2_2 is missing from CPU_FTRS_ALWAYS. That doesn't cause any bug, because CPU_FTRS_POWER9_DD2_2 adds new bits that don't appear in other values, so when anded with the other masks the result is the same. But for consistency we should have all values in the CPU_FTRS_ALWAYS mask, so that the logic is robust against the values being changed in future. Fixes: b5af4f279323 ("powerpc: Add CPU feature bits for TM bug workarounds on POWER9 v2.2") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220519122205.746276-1-mpe@ellerman.id.au
2022-05-22powerpc: Fix all occurences of "the the"Michael Ellerman14-14/+14
Rather than waiting for the bots to fix these one-by-one, fix all occurences of "the the" throughout arch/powerpc. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220518142629.513007-1-mpe@ellerman.id.au
2022-05-22powerpc/platforms/83xx: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)1-5/+2
Use of_device_get_match_data() to simplify the code. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220225010737.2038781-1-chi.minghao@zte.com.cn
2022-05-22powerpc/eeh: Drop redundant spinlock initializationHaowen Bai1-2/+1
slot_errbuf_lock has declared and initialized by DEFINE_SPINLOCK, so we don't need to spin_lock_init again, drop it. Signed-off-by: Haowen Bai <baihaowen@meizu.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1652232476-9696-1-git-send-email-baihaowen@meizu.com
2022-05-22powerpc/iommu: Add missing of_node_put in iommu_init_early_dartPeng Wu1-2/+4
The device_node pointer is returned by of_find_compatible_node with refcount incremented. We should use of_node_put() to avoid the refcount leak. Signed-off-by: Peng Wu <wupeng58@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220425081245.21705-1-wupeng58@huawei.com
2022-05-22powerpc/pseries/vas: Call misc_deregister if sysfs init failsZheng Bin1-0/+2
Undo effects of misc_register if sysfs init fails after misc_register. Signed-off-by: Zheng Bin <zhengbin13@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220511033507.2745992-1-zhengbin13@huawei.com
2022-05-22powerpc/papr_scm: Fix leaking nvdimm_events_map elementsVaibhav Jain1-30/+24
Right now 'char *' elements allocated for individual 'stat_id' in 'papr_scm_priv.nvdimm_events_map[]' during papr_scm_pmu_check_events(), get leaked in papr_scm_remove() and papr_scm_pmu_register(), papr_scm_pmu_check_events() error paths. Also individual 'stat_id' arent NULL terminated 'char *' instead they are fixed 8-byte sized identifiers. However papr_scm_pmu_register() assumes it to be a NULL terminated 'char *' and at other places it assumes it to be a 'papr_scm_perf_stat.stat_id' sized string which is 8-byes in size. Fix this by allocating the memory for papr_scm_priv.nvdimm_events_map to also include space for 'stat_id' entries. This is possible since number of available events/stat_ids are known upfront. This saves some memory and one extra level of indirection from 'nvdimm_events_map' to 'stat_id'. Also rest of the code can continue to call 'kfree(papr_scm_priv.nvdimm_events_map)' without needing to iterate over the array and free up individual elements. Fixes: 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support") Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220511082637.646714-1-vaibhav@linux.ibm.com
2022-05-22powerpc/fsl_rio: Fix refcount leak in fsl_rio_setupMiaoqian Lin1-0/+2
of_parse_phandle() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. Add missing of_node_put() to avoid refcount leak. Fixes: abc3aeae3aaa ("fsl-rio: Add two ports and rapidio message units support") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220512123724.62931-1-linmq006@gmail.com
2022-05-22powerpc/xive: Fix refcount leak in xive_spapr_initMiaoqian Lin1-2/+5
of_find_compatible_node() returns a node pointer with refcount incremented, we should use of_node_put() on it when done. Add missing of_node_put() to avoid refcount leak. Fixes: eac1e731b59e ("powerpc/xive: guest exploitation of the XIVE interrupt controller") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220512090535.33397-1-linmq006@gmail.com
2022-05-22powerpc/numa: Associate numa node to its cpu earlierOscar Salvador3-31/+11
powerpc is the only platform that do not rely on cpu_up()->try_online_node() to bring up a numa node, and special cases it, instead, deep in its own machinery: dlpar_online_cpu find_and_online_cpu_nid try_online_node This should not be needed, but the thing is that the try_online_node() from cpu_up() will not apply on the right node, because cpu_to_node() will return the old mapping numa<->cpu that gets set on boot stage for all possible cpus. That can be seen easily if we try to print out the numa node passed to try_online_node() in cpu_up(). The thing is that the numa<->cpu mapping does not get updated till a much later stage in start_secondary: start_secondary: set_numa_node(numa_cpu_lookup_table[cpu]) But we do not really care, as we already now the CPU <-> NUMA associativity back in find_and_online_cpu_nid(), so let us make use of that and set the proper numa<->cpu mapping, so cpu_to_node() in cpu_up() returns the right node and try_online_node() can do its work. Signed-off-by: Oscar Salvador <osalvador@suse.de> Tested-by: Geetika Moolchandani <Geetika.Moolchandani1@ibm.com> Reviewed-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220411074934.4632-1-osalvador@suse.de
2022-05-22powerpc/powernv: fix missing of_node_put in uv_init()Lv Ruyi1-0/+1
of_find_compatible_node() returns node pointer with refcount incremented, use of_node_put() on it when done. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220407090043.2491854-1-lv.ruyi@zte.com.cn
2022-05-22powerpc/85xx: Remove FSL_85XX_CACHE_SRAMChristophe Leroy6-496/+0
CONFIG_FSL_85XX_CACHE_SRAM is an option that is not user selectable and which is not selected by any driver nor any defconfig. Remove it and all associated code. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/9949813a6b758903b7bee910f798ba2ca82ff8ee.1648720908.git.christophe.leroy@csgroup.eu
2022-05-22powerpc/xics: fix refcount leak in icp_opal_init()Lv Ruyi1-0/+1
The of_find_compatible_node() function returns a node pointer with refcount incremented, use of_node_put() on it when done. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220402013419.2410298-1-lv.ruyi@zte.com.cn
2022-05-22powerpc/perf: Fix the threshold compare group constraint for power9Kajol Jain1-1/+2
Thresh compare bits for a event is used to program thresh compare field in Monitor Mode Control Register A (MMCRA: 9-18 bits for power9). When scheduling events as a group, all events in that group should match value in threshold bits (like thresh compare, thresh control, thresh select). Otherwise event open for the sibling events should fail. But in the current code, incase thresh compare bits are not valid, we are not failing in group_constraint function which can result in invalid group schduling. Fix the issue by returning -1 incase event is threshold and threshold compare value is not valid. Thresh control bits in the event code is used to program thresh_ctl field in Monitor Mode Control Register A (MMCRA: 48-55). In below example, the scheduling of group events PM_MRK_INST_CMPL (873534401e0) and PM_THRESH_MET (8734340101ec) is expected to fail as both event request different thresh control bits and invalid thresh compare value. Result before the patch changes: [command]# perf stat -e "{r8735340401e0,r8734340101ec}" sleep 1 Performance counter stats for 'sleep 1': 11,048 r8735340401e0 1,967 r8734340101ec 1.001354036 seconds time elapsed 0.001421000 seconds user 0.000000000 seconds sys Result after the patch changes: [command]# perf stat -e "{r8735340401e0,r8734340101ec}" sleep 1 Error: The sys_perf_event_open() syscall returned with 22 (Invalid argument) for event (r8735340401e0). /bin/dmesg | grep -i perf may provide additional information. Fixes: 78a16d9fc1206 ("powerpc/perf: Avoid FAB_*_MATCH checks for power9") Signed-off-by: Kajol Jain <kjain@linux.ibm.com> Reviewed-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220506061015.43916-2-kjain@linux.ibm.com
2022-05-22powerpc/perf: Fix the threshold compare group constraint for power10Kajol Jain1-4/+5
Thresh compare bits for a event is used to program thresh compare field in Monitor Mode Control Register A (MMCRA: 8-18 bits for power10). When scheduling events as a group, all events in that group should match value in threshold bits. Otherwise event open for the sibling events should fail. But in the current code, incase thresh compare bits are not valid, we are not failing in group_constraint function which can result in invalid group schduling. Fix the issue by returning -1 incase event is threshold and threshold compare value is not valid in group_constraint function. Patch also fixes the p10_thresh_cmp_val function to return -1, incase threshold bits are not valid and changes corresponding check in is_thresh_cmp_valid function to return false only when the thresh_cmp value is less then 0. Thresh control bits in the event code is used to program thresh_ctl field in Monitor Mode Control Register A (MMCRA: 48-55). In below example, the scheduling of group events PM_MRK_INST_CMPL (3534401e0) and PM_THRESH_MET (34340101ec) is expected to fail as both event request different thresh control bits. Result before the patch changes: [command]# perf stat -e "{r35340401e0,r34340101ec}" sleep 1 Performance counter stats for 'sleep 1': 8,482 r35340401e0 0 r34340101ec 1.001474838 seconds time elapsed 0.001145000 seconds user 0.000000000 seconds sys Result after the patch changes: [command]# perf stat -e "{r35340401e0,r34340101ec}" sleep 1 Performance counter stats for 'sleep 1': <not counted> r35340401e0 <not supported> r34340101ec 1.001499607 seconds time elapsed 0.000204000 seconds user 0.000760000 seconds sys Fixes: 82d2c16b350f7 ("powerpc/perf: Adds support for programming of Thresholding in P10") Signed-off-by: Kajol Jain <kjain@linux.ibm.com> Reviewed-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220506061015.43916-1-kjain@linux.ibm.com
2022-05-22powerpc/kaslr_booke: Fix build errorYueHaibing1-0/+2
arch/powerpc/mm/nohash/kaslr_booke.c: In function ‘kaslr_get_cmdline’: arch/powerpc/mm/nohash/kaslr_booke.c:46:2: error: implicit declaration of function ‘early_init_dt_scan_chosen’ early_init_dt_scan_chosen(boot_command_line); ^~~~~~~~~~~~~~~~~~~~~~~~~ arch/powerpc/mm/nohash/kaslr_booke.c: In function ‘get_initrd_range’: arch/powerpc/mm/nohash/kaslr_booke.c:210:10: error: implicit declaration of function ‘of_read_number’ start = of_read_number(prop, len / 4); ^~~~~~~~~~~~~~ Add missing include files to fix this. Fixes: 86c38fec69a4 ("powerpc: Remove asm/prom.h from all files that don't need it") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220517094900.14900-1-yuehaibing@huawei.com
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