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2018-05-24ARM: berlin: extend BG2CD Kconfig entryAlexander Monakov1-1/+5
BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect pertinent errata, the SCU and the global timer, and allow use of the local timer on uniprocessor kernels. PL310 L2 cache controller has revision r3p2; no errata to select. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-05-24powerpc: Export tm_enable()/tm_disable/tm_abort() APIsSimon Guo4-2/+16
This patch exports tm_enable()/tm_disable/tm_abort() APIs, which will be used for PR KVM transactional memory logic. Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-05-24powerpc/reg: Add TEXASR related macrosSimon Guo2-8/+27
This patches add some macros for CR0/TEXASR bits so that PR KVM TM logic (tbegin./treclaim./tabort.) can make use of them later. Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-05-24powerpc: Export msr_check_and_set() to modulesSimon Guo1-0/+1
PR KVM will need to reuse msr_check_and_set(). This patch exports this API for reuse. Signed-off-by: Simon Guo <wei.guo.simon@gmail.com> Reviewed-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-05-24arm64: dts: move berlin SoC files from marvell dir to synaptics dirJisheng Zhang6-4/+5
Move device tree files as part of transition from Marvell berlin to Synaptics berlin. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-05-24arm64: dts: berlin4ct-*.dts: use SPDX-License-IdentifierJisheng Zhang2-76/+2
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-05-24arm64: dts: berlin4ct: use SPDX-License-IdentifierJisheng Zhang1-38/+1
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-05-23OMAP: CLK: CLKSRC: Add suspend resume hooksKeerthy1-0/+32
Add the save and restore for clksrc as part of suspend and resume so that it saves the counter value and restores. This is needed in modes like rtc+ddr in self-refresh not doing this stalls the time. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-05-23ARM: dts: dra7: fix DCAN node addressesKevin Hilman1-2/+2
Fix the DT node addresses to match the reg property addresses, which were verified to match the TRM: http://www.ti.com/lit/pdf/sprui30 Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-05-23ARM: AM43XX: Add functions to save/restore am43xx control registersTero Kristo2-0/+173
These registers are part of the wkup domain and are lost during RTC only suspend and also hibernation, so storing/restoring their state is necessary. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-05-23ASoC: ams_delta: use GPIO lookup tableJanusz Krzysztofik1-5/+0
Now as the Amstrad Delta board provides GPIO lookup tables, switch from GPIO numbers to GPIO descriptors and use the table to locate required GPIO pins. The card uses two pins, one for jack and the other for voice modem codec DAI control. For jack pin, remove hardcoded GPIO number and use GPIO descriptor based variant of jack GPIO initialization. For modem_codec pin, declare static variable for storing its GPIO descriptor, obtain it on card initialization and replace obsolete ams_delta_latch2_write() with gpiod_set_value(). For that to work, don't request the modem_codec pin from the board init code anymore. If the modem_codec GPIO lookup fails, skip initialization of functionality of the card which depends on its availability. Pin naming used by the driver should be followed while respective GPIO lookup table is initialized by a board init code. Created and tested against linux-4.17-rc3, on top of patch 1/6 "ARM: OMAP1: ams-delta: add GPIO lookup tables" Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-05-23ARM: OMAP1: ams-delta: add GPIO lookup tablesJanusz Krzysztofik1-0/+102
Scope of the change is limited to GPIO pins used by board specific device drivers which will be updated by follow-up patches of the series. Those are some OMAP GPIO (gpio-0-15) and most of Amstrad Delta latch2 GPIO bank pins. Remaining pins of those banks, as well as Amstrad Delta latch1 pins, will be addressed later. Assign a label ("latch2") to the bank, enumerate its pins and put that information, together with OMAP GPIO bank pins, in GPIO lookup tables. Assign lookup tables to devices as soon as those devices are registered and their names can be obtained. A step froward in: - removal of hard-coded GPIO numbers from drivers, - removal of board mach includes from drivers, - switching to dynamically assigned GPIO numbers. Created and compile tested agains linux-4.17-rc3 Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-05-23ARM64: dts: meson: fix clock source of the pclk for UART_AOYixun Lan3-6/+6
>From the hardware perspective, the actual pclk of the AO uarts is the corresponding clkc_ao uart gate, not the main clock controller clk81. This was not problem so far, because the uart_gate had the CLK_IGNORE_UNUSED flag, which kept the gate open. We plan to remove the CLK_IGNORE_UNUSED flag in another patch, but before doing that, we need to fix the clock in the DTS file. Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: add AO clock driverQiufang Dai1-0/+12
This add the AO (Always-On part) clock DT info for Meson-AXG SoC Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> [khilman: cleanup subject] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23arm64: dts: exynos: Add more clocks to Exynos5433 Decon/DeconTVMarek Szyprowski1-2/+12
Add all '1x' clocks to decon and decontv devices. Enabling those clocks is needed to get proper display on hardware windows no 4 and 5. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-05-23ARM: meson: merge Kconfig symbol MACH_MESON8B into MACH_MESON8Martin Blumenstingl1-8/+1
Currently there are no differences between the MACH_MESON8 and MACH_MESON8B Kconfig symbols (except the help text). Since both platforms are very similar (Meson8b being a slightly updated, cost-reduced version of Meson8 which even shares some peripherals with Meson8m2) no notable differences are expected in the future either. Suggested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM: dts: meson: build the Meson8b .dtbs with MACH_MESON8Martin Blumenstingl1-3/+2
Currently there are two identical Kconfig options where only differences are the Kconfig help text and the list of .dtbs that are built: - MACH_MESON8 - MACH_MESON8B Build the Meson8b .dtbs when MACH_MESON8 is selected to get rid of the latter Kconfig symbol later. Suggested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: enable i2c AO on the S400 boardJerome Brunet1-0/+6
The i2c AO is used for the MIC daughter card of the S400 board Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: add i2c AO pinsJerome Brunet1-0/+42
Add the pins related to the i2c AO controller of the meson-axg platform Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: correct i2c AO clockJerome Brunet1-1/+1
The clock specified for the i2c AO controller is the one for the EE domain, which is incorrect as this controller needs the clock for AO i2c controller. Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23ARM64: dts: meson-axg: clean-up i2c nodesJerome Brunet1-23/+14
Remove undocumented and unused "clk_i2c" clock name and the second interrupt from i2c nodes of meson-axg platform. Those seems to have been copy/pasted from the vendor kernel Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-05-23KVM: nVMX: Ensure that VMCS12 field offsets do not changeJim Mattson1-0/+157
Enforce the invariant that existing VMCS12 field offsets must not change. Experience has shown that without strict enforcement, this invariant will not be maintained. Signed-off-by: Jim Mattson <jmattson@google.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> [Changed the code to use BUILD_BUG_ON_MSG instead of better, but GCC 4.6 requiring _Static_assert. - Radim.] Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2018-05-23Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alphaLinus Torvalds5-45/+15
Pull alpha fixes from Matt Turner: "A few small changes for alpha" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alpha: alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2 alpha: simplify get_arch_dma_ops alpha: use dma_direct_ops for jensen
2018-05-23KVM: nVMX: Restore the VMCS12 offsets for v4.0 fieldsJim Mattson2-7/+20
Changing the VMCS12 layout will break save/restore compatibility with older kvm releases once the KVM_{GET,SET}_NESTED_STATE ioctls are accepted upstream. Google has already been using these ioctls for some time, and we implore the community not to disturb the existing layout. Move the four most recently added fields to preserve the offsets of the previously defined fields and reserve locations for the vmread and vmwrite bitmaps, which will be used in the virtualization of VMCS shadowing (to improve the performance of double-nesting). Signed-off-by: Jim Mattson <jmattson@google.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> [Kept the SDM order in vmcs_field_to_offset_table. - Radim] Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2018-05-23KVM: x86: use timespec64 for KVM_HC_CLOCK_PAIRINGArnd Bergmann1-3/+3
The hypercall was added using a struct timespec based implementation, but we should not use timespec in new code. This changes it to timespec64. There is no functional change here since the implementation is only used in 64-bit kernels that use the same definition for timespec and timespec64. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2018-05-23kvm: nVMX: Use nested_run_pending rather than from_vmentryJim Mattson1-17/+18
When saving a vCPU's nested state, the vmcs02 is discarded. Only the shadow vmcs12 is saved. The shadow vmcs12 contains all of the information needed to reconstruct an equivalent vmcs02 on restore, but we have to be able to deal with two contexts: 1. The nested state was saved immediately after an emulated VM-entry, before the vmcs02 was ever launched. 2. The nested state was saved some time after the first successful launch of the vmcs02. Though it's an implementation detail rather than an architected bit, vmx->nested_run_pending serves to distinguish between these two cases. Hence, we save it as part of the vCPU's nested state. (Yes, this is ugly.) Even when restoring from a checkpoint, it may be necessary to build the vmcs02 as if prepare_vmcs02 was called from nested_vmx_run. So, the 'from_vmentry' argument should be dropped, and vmx->nested_run_pending should be consulted instead. The nested state restoration code then has to set vmx->nested_run_pending prior to calling prepare_vmcs02. It's important that the restoration code set vmx->nested_run_pending anyway, since the flag impacts things like interrupt delivery as well. Fixes: cf8b84f48a59 ("kvm: nVMX: Prepare for checkpointing L2 state") Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
2018-05-23arm64: Unify kernel fault reportingMark Rutland1-14/+23
In do_page_fault(), we handle some kernel faults early, and simply die() with a message. For faults handled later, we dump the faulting address, decode the ESR, walk the page tables, and perform a number of steps to ensure that this data is reported. Let's unify the handling of fatal kernel faults with a new die_kernel_fault() helper, handling all of these details. This is largely the same as the existing logic in __do_kernel_fault(), except that addresses are consistently padded to 16 hex characters, as would be expected for a 64-bit address. The messages currently logged in do_page_fault are adjusted to fit into the die_kernel_fault() message template. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-05-23arm64: make is_permission_fault() name clearerMark Rutland1-4/+5
The naming of is_permission_fault() makes it sound like it should return true for permission faults from EL0, but by design, it only does so for faults from EL1. Let's make this clear by dropping el1 in the name, as we do for is_el1_instruction_abort(). Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-05-23arm64: Kconfig: Enable LSE atomics by defaultWill Deacon1-1/+3
Now that we're seeing CPUs shipping with LSE atomics, default them to 'on' in Kconfig. CPUs without the instructions will continue to use LDXR/STXR-based sequences, but they will be placed out-of-line by the compiler. Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-05-23x86/speculation: Simplify the CPU bug detection logicDominik Brodowski1-15/+7
Only CPUs which speculate can speculate. Therefore, it seems prudent to test for cpu_no_speculation first and only then determine whether a specific speculating CPU is susceptible to store bypass speculation. This is underlined by all CPUs currently listed in cpu_no_speculation were present in cpu_no_spec_store_bypass as well. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: bp@suse.de Cc: konrad.wilk@oracle.com Link: https://lkml.kernel.org/r/20180522090539.GA24668@light.dominikbrodowski.net
2018-05-23KVM/VMX: Expose SSBD properly to guestsKonrad Rzeszutek Wilk1-2/+2
The X86_FEATURE_SSBD is an synthetic CPU feature - that is it bit location has no relevance to the real CPUID 0x7.EBX[31] bit position. For that we need the new CPU feature name. Fixes: 52817587e706 ("x86/cpufeatures: Disentangle SSBD enumeration") Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: kvm@vger.kernel.org Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: stable@vger.kernel.org Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Link: https://lkml.kernel.org/r/20180521215449.26423-2-konrad.wilk@oracle.com
2018-05-23arm64: dts: marvell: fix CP110 ICU node sizeMiquel Raynal1-1/+1
ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the specification). Fixes: 6ef84a827c37 ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-05-22x86, nfit_test: Add unit test for memcpy_mcsafe()Dan Williams3-0/+88
Given the fact that the ACPI "EINJ" (error injection) facility is not universally available, implement software infrastructure to validate the memcpy_mcsafe() exception handling implementation. For each potential read exception point in memcpy_mcsafe(), inject a emulated exception point at the address identified by 'mcsafe_inject' variable. With this infrastructure implement a test to validate that the 'bytes remaining' calculation is correct for a range of various source buffer alignments. This code is compiled out by default. The CONFIG_MCSAFE_DEBUG configuration symbol needs to be manually enabled by editing Kconfig.debug. I.e. this functionality can not be accidentally enabled by a user / distro, it's only for development. Cc: <x86@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Reported-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2018-05-23s390/cio: add test for ccwgroup deviceSebastian Ott1-0/+10
Add a test to check if a given device is a ccwgroup device. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23s390/cio: add helper to query utility strings per given ccw deviceSebastian Ott1-0/+1
Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23s390: remove no-op macro VMLINUX_SYMBOL()Masahiro Yamada1-2/+2
VMLINUX_SYMBOL() is no-op unless CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX is defined. It has ever been selected only by BLACKFIN and METAG. VMLINUX_SYMBOL() is unneeded for s390-specific code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2018-05-23nds32: Fix compiler warning, Wstringop-overflow, in vdso.cVincent Chen1-5/+5
Getting a compiler warning, Wstringop-overflow, in arch/nds32/kernel/vdso.c when kernel is built by gcc-8. Declaring vdso_start and vdso_end as a pointer to fix this compiler warning. Signed-off-by: Vincent Chen <vincentc@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Disable local irq before calling cpu_dcache_wb_page in copy_user_highpageVincent Chen1-3/+1
In order to ensure that all data in source page has been written back to memory before copy_page, the local irq shall be disabled before calling cpu_dcache_wb_page(). In addition, removing unneeded page invalidation for 'to' page. Signed-off-by: Vincent Chen <vincentc@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Flush the cache of the page at vmaddr instead of kaddr in flush_anon_pageVincent Chen1-2/+7
According to Documentation/cachetlb.txt, the cache of the page at vmaddr shall be flushed in flush_anon_page instead of the cache of the page at page_address(page). Signed-off-by: Vincent Chen <vincentc@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Correct flush_dcache_page functionVincent Chen1-9/+12
1. Disable local irq before d-cache write-back and invalidate. The cpu_dcache_wbinval_page function is composed of d-cache write-back and invalidate. If the local irq is enabled when calling cpu_dcache_wbinval_page, the content of d-cache is possibly updated between write-back and invalidate. In this case, the updated data will be dropped due to the following d-cache invalidation. Therefore, we disable the local irq before calling cpu_dcache_wbinval_page. 2. Correct the data write-back for page aliasing case. Only the page whose (page->index << PAGE_SHIFT) is located at the same page color as page_address(page) needs to execute data write-back in flush_dcache_page function. Signed-off-by: Vincent Chen <vincentc@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Fix the unaligned access handlerNickhu1-2/+5
If the kernel config 'CONFIG_ALIGNMENT_TRAP' and the file '/proc/sys/nds32/unaligned_access/enable' are set, the kernel unaligned access handler does not handle correctly when the value of immediate field is negative. This commit fixes the unaligned access handler in kernel. Signed-off-by: Nickhu <nickhu@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Renaming the file for unaligned accessNickhu1-1/+1
Change the name of the file '/proc/sys/nds32/unaligned_acess' to '/proc/sys/nds32/unaligned_access' Signed-off-by: Nickhu <nickhu@andestech.com> Reviewed-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: To fix a cache inconsistency issue by setting correct cacheability of NTCGreentime Hu2-5/+24
The nds32 architecture will use physical memory when interrupt or exception comes and it will use the setting of NTC0-4. The original implementation didn't consider the DRAM start address may start from 1GB, 2GB or 3GB to cause this issue. It will write the data to DRAM if it is running in physical address however kernel will read the data with virtaul address through data cache. In this case, the data of DRAM is latest. This fix will set the correct cacheability to let kernel write/read the latest data in cache instead of DRAM. Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: To refine readability of INT_MASK_INITAIAL_VALGreentime Hu1-1/+1
Refine readability of INT_MASK_INITAIAL_VAL with meaningful macro instead of magic number. Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Fix the virtual address may map too much range by tlbop issue.Greentime Hu1-0/+3
We use tlbop to map virtual address in the first beginning, however it may map too much if DRAM size is not that big. We have to invalidate the mapping when the page table is created. Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Fix the allmodconfig build. To make sure CONFIG_CPU_LITTLE_ENDIAN is default yGreentime Hu2-2/+7
This way we can build kernel with CONFIG_CPU_LITTLE_ENDIAN=y. Build allmodconfig and allnoconfig are available too. It also fixes the endian mismatch issue because AFLAGS and LDFLAGS is not passed correctly. Signed-off-by: Vincent Ren-Wei Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
2018-05-23nds32: Fix build failed because arch_trace_hardirqs_off is changed to trace_hardirqs_off.Greentime Hu1-1/+1
It broke the 'allmodconfig' build when CONFIG_TRACE_IRQFLAGS is enabled. Signed-off-by: Nick Chun-Ming Hu <nickhu@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23nds32: Fix the unknown type u8 issue.Greentime Hu1-0/+2
It broke the 'allmodconfig' build. We need to include <linux/types.h> to make sure the type is defined before using it. Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23nds32: Fix the symbols undefined issue by exporting them.Greentime Hu6-0/+32
It broke the 'allmodconfig' build. LD vmlinux SYSMAP System.map Building modules, stage 2. MODPOST 5028 modules ERROR: "flush_dcache_page" [net/sunrpc/xprtrdma/rpcrdma.ko] undefined! ERROR: "empty_zero_page" [net/ceph/libceph.ko] undefined! ERROR: "save_stack_trace" [kernel/backtracetest.ko] undefined! ERROR: "clear_page" [fs/ocfs2/dlm/ocfs2_dlm.ko] undefined! ERROR: "copy_page" [fs/nilfs2/nilfs2.ko] undefined! ... Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2018-05-23nds32: Fix xfs_buf built failed by export invalidate_kernel_vmap_range and flush_kernel_vmap_rangeGreentime Hu2-0/+20
It broke the 'allmodconfig' build. fs/xfs/xfs_buf.c: In function 'xfs_buf_bio_end_io': fs/xfs/xfs_buf.c:1242:3: error: implicit declaration of function 'invalidate_kernel_vmap_range' [-Werror=implicit-function-declaration] invalidate_kernel_vmap_range(bp->b_addr, xfs_buf_vmap_len(bp)); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ fs/xfs/xfs_buf.c: In function 'xfs_buf_ioapply_map': fs/xfs/xfs_buf.c:1312:4: error: implicit declaration of function 'flush_kernel_vmap_range' [-Werror=implicit-function-declaration] flush_kernel_vmap_range(bp->b_addr, ^~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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