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2022-04-21ARM: dts: am335x: Guardian: Disable poweroff support from RTCGireesh Hiremath1-1/+0
* Disabling poweroff support form RTC will allow poweroff to handle from other machanism Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Message-Id: <20220325100613.1494-5-Gireesh.Hiremath@in.bosch.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21ARM: dts: am335x: Guardian: Add keypadGireesh Hiremath1-0/+24
* Add support to guardian mt gpio keypad Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Message-Id: <20220325100613.1494-4-Gireesh.Hiremath@in.bosch.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21ARM: dts: am335x: Guardian: Rename power button labelGireesh Hiremath1-7/+8
* Rename label button to power button Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Message-Id: <20220325100613.1494-3-Gireesh.Hiremath@in.bosch.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21ARM: dts: am335x: Guardian: Update NAND partition tableGireesh Hiremath1-17/+48
* Update partition table to save env and splash image * GPMC config values optimized for Bosch Guardian Board * NAND Chip used by Bosch Guardian Board is Micron MT29F4G08ABBFA Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Message-Id: <20220325100613.1494-2-Gireesh.Hiremath@in.bosch.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21ARM: dts: logicpd-som-lv: Move pinmuxing to peripheral nodesAdam Ford1-5/+5
Move some pinmux references to their respective peripherals. This keeps the pins in safe-mode until they are requested. Signed-off-by: Adam Ford <aford173@gmail.com> Message-Id: <20220303171818.11060-2-aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21ARM: dts: omap3/4/5: fix ethernet node name for different OMAP boardsOleksij Rempel4-4/+4
The node name of Ethernet controller should be "ethernet" instead of "usbether" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Message-Id: <20220216074927.3619425-8-o.rempel@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2022-04-21x86/tdx: Annotate a noreturn functionBorislav Petkov1-0/+1
objdump complains: vmlinux.o: warning: objtool: __tdx_hypercall()+0x74: unreachable instruction because __tdx_hypercall_failed() won't return but panic the guest. Annotate that that is ok and desired. Fixes: eb94f1b6a70a ("x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions") Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220420115025.5448-1-bp@alien8.de
2022-04-21virt: sevguest: Change driver name to reflect generic SEV supportTom Lendacky2-6/+6
During patch review, it was decided the SNP guest driver name should not be SEV-SNP specific, but should be generic for use with anything SEV. However, this feedback was missed and the driver name, and many of the driver functions and structures, are SEV-SNP name specific. Rename the driver to "sev-guest" (to match the misc device that is created) and update some of the function and structure names, too. While in the file, adjust the one pr_err() message to be a dev_err() message so that the message, if issued, uses the driver name. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/307710bb5515c9088a19fd0b930268c7300479b2.1650464054.git.thomas.lendacky@amd.com
2022-04-21microblaze: Add support for reserved memory defined by DTMichal Simek1-0/+3
In DT reserved memory nodes can be added as is described by Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt but Microblaze didn't have a support for it. The similar change was done for ARC by commit 1b10cb21d888 ("ARC: add support for reserved memory defined by device tree"). It is pretty much enough to call early_init_fdt_scan_reserved_mem(). Microblaze is not using initial_boot_params that's why there is no need to call early_init_fdt_reserve_self(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/da4395776bf0de7207767abcc8a5df05bf411816.1645795048.git.michal.simek@xilinx.com
2022-04-21microblaze: Wire memblock_dump_all()Michal Simek1-0/+2
Wire memblock_dump_all() to be able to see the whole memblock allocation. Dumps are enabled by passing memblock=debug via kernel command line. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/6f480b6010068872f429df69c8894cc3f1f38f46.1645795048.git.michal.simek@xilinx.com
2022-04-21microblaze: Use simple memmove/memcpy implementation from lib/string.cMichal Simek3-44/+5
This is based on previous commit ("microblaze: Use simple memset implementation from lib/string.c") where generic memset implementation is used when OPT_LIB_FUNCTION is not defined. The same change can be done for memset/memcpy implementation where doesn't make sense to have generic implementation in architecture code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1f5cfc026a8a458f3e3134ab80f65bd4ac7e3e8e.1645797329.git.michal.simek@xilinx.com
2022-04-21microblaze: Do loop unrolling for optimized memset implementationMichal Simek1-1/+12
Align implementation with memcpy and memmove where also remaining bytes are copied via final switch case instead of using simple implementations which loop. But this alignment has much stronger reason and definitely aligning implementation is not the key point here. It is just good to have in mind that the same technique is used already there. In GCC 10, now -ftree-loop-distribute-patterns optimization is on at O2. This optimization causes GCC to convert the while loop in memset.c into a call to memset. So this optimization is transforming a loop in a memset/memcpy into a call to the function itself. This makes the memset implementation as recursive. "-freestanding" option will disable the built-in library function but it has been added in generic library implementation. In default microblaze kernel defconfig we have CONFIG_OPT_LIB_FUNCTION enabled so it will always pick optimized version of memset which is target specific so we are replacing the while() loop with switch case to avoid recursive memset call. Issue with freestanding was already discussed in connection to commit 33d0f96ffd73 ("lib/string.c: Use freestanding environment") and also this is topic in glibc and gcc. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56888 http://patchwork.ozlabs.org/project/glibc/patch/20191121021040.14554-1-sandra@codesourcery.com/ Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> Link: https://lore.kernel.org/r/10a432e269a6d3349cf458e4f5792522779cba0d.1645797329.git.michal.simek@xilinx.com
2022-04-21microblaze: Use simple memset implementation from lib/string.cMichal Simek2-18/+4
On microblaze systems which are not using OPT_LIB_FUNCTION only simple memset is used. This function is already implemented in lib/string.c that's why it should be used instead. This change is done in respect of issue fixed by commit 33d0f96ffd73 ("lib/string.c: Use freestanding environment") where gcc-10.x moved -ftree-loop-distribute-patterns optimization is to O2 optimization level. This optimization causes GCC to convert the while loop in memset.c into a call to memset. So This optimization is transforming a loop in a memset/memcpy into a call to the function itself. This makes the memset implementation as recursive. Based on fix above -ffreestanding was used and it needs to be used on Microblaze too but the patch is not adding this flag it removes simple implementation to cause that generic implementation is used where this flag is already setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> Link: https://lore.kernel.org/r/4a143e7654f72ee893dcea9769946e17d3570b16.1645797329.git.michal.simek@xilinx.com
2022-04-21KVM: PPC: Fix TCE handling for VFIOAlexey Kardashevskiy2-44/+45
The LoPAPR spec defines a guest visible IOMMU with a variable page size. Currently QEMU advertises 4K, 64K, 2M, 16MB pages, a Linux VM picks the biggest (16MB). In the case of a passed though PCI device, there is a hardware IOMMU which does not support all pages sizes from the above - P8 cannot do 2MB and P9 cannot do 16MB. So for each emulated 16M IOMMU page we may create several smaller mappings ("TCEs") in the hardware IOMMU. The code wrongly uses the emulated TCE index instead of hardware TCE index in error handling. The problem is easier to see on POWER8 with multi-level TCE tables (when only the first level is preallocated) as hash mode uses real mode TCE hypercalls handlers. The kernel starts using indirect tables when VMs get bigger than 128GB (depends on the max page order). The very first real mode hcall is going to fail with H_TOO_HARD as in the real mode we cannot allocate memory for TCEs (we can in the virtual mode) but on the way out the code attempts to clear hardware TCEs using emulated TCE indexes which corrupts random kernel memory because it_offset==1<<59 is subtracted from those indexes and the resulting index is out of the TCE table bounds. This fixes kvmppc_clear_tce() to use the correct TCE indexes. While at it, this fixes TCE cache invalidation which uses emulated TCE indexes instead of the hardware ones. This went unnoticed as 64bit DMA is used these days and VMs map all RAM in one go and only then do DMA and this is when the TCE cache gets populated. Potentially this could slow down mapping, however normally 16MB emulated pages are backed by 64K hardware pages so it is one write to the "TCE Kill" per 256 updates which is not that bad considering the size of the cache (1024 TCEs or so). Fixes: ca1fc489cfa0 ("KVM: PPC: Book3S: Allow backing bigger guest IOMMU pages with smaller physical pages") Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Tested-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220420050840.328223-1-aik@ozlabs.ru
2022-04-21pinctrl: samsung: fix missing GPIOLIB on ARM64 Exynos configKrzysztof Kozlowski1-1/+0
The Samsung pinctrl drivers depend on OF_GPIO, which is part of GPIOLIB. ARMv7 Exynos platform selects GPIOLIB and Samsung pinctrl drivers. ARMv8 Exynos selects only the latter leading to possible wrong configuration on ARMv8 build: WARNING: unmet direct dependencies detected for PINCTRL_EXYNOS Depends on [n]: PINCTRL [=y] && OF_GPIO [=n] && (ARCH_EXYNOS [=y] || ARCH_S5PV210 || COMPILE_TEST [=y]) Selected by [y]: - ARCH_EXYNOS [=y] Always select the GPIOLIB from the Samsung pinctrl drivers to fix the issue. This requires removing of OF_GPIO dependency (to avoid recursive dependency), so add dependency on OF for COMPILE_TEST cases. Reported-by: Necip Fazil Yildiran <fazilyildiran@gmail.com> Fixes: eed6b3eb20b9 ("arm64: Split out platform options to separate Kconfig") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220420141407.470955-1-krzysztof.kozlowski@linaro.org
2022-04-21powerpc/time: Always set decrementer in timer_interrupt()Michael Ellerman1-15/+14
This is a partial revert of commit 0faf20a1ad16 ("powerpc/64s/interrupt: Don't enable MSR[EE] in irq handlers unless perf is in use"). Prior to that commit, we always set the decrementer in timer_interrupt(), to clear the timer interrupt. Otherwise we could end up continuously taking timer interrupts. When high res timers are enabled there is no problem seen with leaving the decrementer untouched in timer_interrupt(), because it will be programmed via hrtimer_interrupt() -> tick_program_event() -> clockevents_program_event() -> decrementer_set_next_event(). However with CONFIG_HIGH_RES_TIMERS=n or booting with highres=off, we see a stall/lockup, because tick_nohz_handler() does not cause a reprogram of the decrementer, leading to endless timer interrupts. Example trace: [ 1.898617][ T7] Freeing initrd memory: 2624K^M [ 22.680919][ C1] rcu: INFO: rcu_sched detected stalls on CPUs/tasks:^M [ 22.682281][ C1] rcu: 0-....: (25 ticks this GP) idle=073/0/0x1 softirq=10/16 fqs=1050 ^M [ 22.682851][ C1] (detected by 1, t=2102 jiffies, g=-1179, q=476)^M [ 22.683649][ C1] Sending NMI from CPU 1 to CPUs 0:^M [ 22.685252][ C0] NMI backtrace for cpu 0^M [ 22.685649][ C0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc2-00185-g0faf20a1ad16 #145^M [ 22.686393][ C0] NIP: c000000000016d64 LR: c000000000f6cca4 CTR: c00000000019c6e0^M [ 22.686774][ C0] REGS: c000000002833590 TRAP: 0500 Not tainted (5.16.0-rc2-00185-g0faf20a1ad16)^M [ 22.687222][ C0] MSR: 8000000000009033 <SF,EE,ME,IR,DR,RI,LE> CR: 24000222 XER: 00000000^M [ 22.688297][ C0] CFAR: c00000000000c854 IRQMASK: 0 ^M ... [ 22.692637][ C0] NIP [c000000000016d64] arch_local_irq_restore+0x174/0x250^M [ 22.694443][ C0] LR [c000000000f6cca4] __do_softirq+0xe4/0x3dc^M [ 22.695762][ C0] Call Trace:^M [ 22.696050][ C0] [c000000002833830] [c000000000f6cc80] __do_softirq+0xc0/0x3dc (unreliable)^M [ 22.697377][ C0] [c000000002833920] [c000000000151508] __irq_exit_rcu+0xd8/0x130^M [ 22.698739][ C0] [c000000002833950] [c000000000151730] irq_exit+0x20/0x40^M [ 22.699938][ C0] [c000000002833970] [c000000000027f40] timer_interrupt+0x270/0x460^M [ 22.701119][ C0] [c0000000028339d0] [c0000000000099a8] decrementer_common_virt+0x208/0x210^M Possibly this should be fixed in the lowres timing code, but that would be a generic change and could take some time and may not backport easily, so for now make the programming of the decrementer unconditional again in timer_interrupt() to avoid the stall/lockup. Fixes: 0faf20a1ad16 ("powerpc/64s/interrupt: Don't enable MSR[EE] in irq handlers unless perf is in use") Reported-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Link: https://lore.kernel.org/r/20220420141657.771442-1-mpe@ellerman.id.au
2022-04-20riscv: dts: rename the node name of dmaZong Li1-1/+1
Rename the node name by the generic DMA naming Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-04-20riscv: dts: Add dma-channels property and modify compatibleZong Li1-1/+2
Add dma-channels property, then we can determine how many channels there by device tree, in addition, we add the pdma versioning scheme for compatible. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-04-20riscv: mm: Remove the copy operation of pmdChuanhua Han1-7/+3
Since all processes share the kernel address space, we only need to copy pgd in case of a vmalloc page fault exception, the other levels of page tables are shared, so the operation of copying pmd is unnecessary. Signed-off-by: Chuanhua Han <hanchuanhua@oppo.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-04-20rcu: Make the TASKS_RCU Kconfig option be selectedPaul E. McKenney1-0/+1
Currently, any kernel built with CONFIG_PREEMPTION=y also gets CONFIG_TASKS_RCU=y, which is not helpful to people trying to build preemptible kernels of minimal size. Because CONFIG_TASKS_RCU=y is needed only in kernels doing tracing of one form or another, this commit moves from TASKS_RCU deciding when it should be enabled to the tracing Kconfig options explicitly selecting it. This allows building preemptible kernels without TASKS_RCU, if desired. This commit also updates the SRCU-N and TREE09 rcutorture scenarios in order to avoid Kconfig errors that would otherwise result from CONFIG_TASKS_RCU being selected without its CONFIG_RCU_EXPERT dependency being met. [ paulmck: Apply BPF_SYSCALL feedback from Andrii Nakryiko. ] Reported-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Tested-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Tested-by: Zhouyi Zhou <zhouzhouyi@gmail.com> Cc: Andrii Nakryiko <andrii@kernel.org> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
2022-04-21powerpc/83xx/mpc8349emitx: Get rid of of_node assignmentAndy Shevchenko1-9/+5
Let GPIO library to assign of_node from the parent device. This allows to move GPIO library and drivers to use fwnode APIs instead of being stuck with OF-only interfaces. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220323174342.56187-1-andriy.shevchenko@linux.intel.com
2022-04-20Merge tag 'xtensa-20220416' of https://github.com/jcmvbkbc/linux-xtensaLinus Torvalds3-11/+3
Pull xtensa fixes from Max Filippov: - fix patching CPU selection in patch_text - fix potential deadlock in ISS platform serial driver - fix potential register clobbering in coprocessor exception handler * tag 'xtensa-20220416' of https://github.com/jcmvbkbc/linux-xtensa: xtensa: fix a7 clobbering in coprocessor context load/store arch: xtensa: platforms: Fix deadlock in rs_close() xtensa: patch_text: Fixup last cpu should be master
2022-04-20x86: __memcpy_flushcache: fix wrong alignment if size > 2^32Mikulas Patocka1-1/+1
The first "if" condition in __memcpy_flushcache is supposed to align the "dest" variable to 8 bytes and copy data up to this alignment. However, this condition may misbehave if "size" is greater than 4GiB. The statement min_t(unsigned, size, ALIGN(dest, 8) - dest); casts both arguments to unsigned int and selects the smaller one. However, the cast truncates high bits in "size" and it results in misbehavior. For example: suppose that size == 0x100000001, dest == 0x200000002 min_t(unsigned, size, ALIGN(dest, 8) - dest) == min_t(0x1, 0xe) == 0x1; ... dest += 0x1; so we copy just one byte "and" dest remains unaligned. This patch fixes the bug by replacing unsigned with size_t. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2022-04-20x86/boot: Put globals that are accessed early into the .data sectionMichael Roth2-2/+6
The helpers in arch/x86/boot/compressed/efi.c might be used during early boot to access the EFI system/config tables, and in some cases these EFI helpers might attempt to print debug/error messages, before console_init() has been called. __putstr() checks some variables to avoid printing anything before the console has been initialized, but this isn't enough since those variables live in .bss, which may not have been cleared yet. This can lead to a triple-fault occurring, primarily when booting in legacy/CSM mode (where EFI helpers will attempt to print some debug messages). Fix this by declaring these globals in .data section instead so there is no dependency on .bss being cleared before accessing them. Fixes: c01fce9cef849 ("x86/compressed: Add SEV-SNP feature detection/setup") Reported-by: Borislav Petkov <bp@suse.de> Suggested-by: Thomas Lendacky <Thomas.Lendacky@amd.com> Signed-off-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220420152613.145077-1-michael.roth@amd.com
2022-04-20KVM: arm64: Expose the WFXT feature to guestsMarc Zyngier2-0/+13
Plumb in the capability, and expose WFxT to guests when available. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-8-maz@kernel.org
2022-04-20KVM: arm64: Offer early resume for non-blocking WFxT instructionsMarc Zyngier1-4/+26
For WFxT instructions used with very small delays, it is not unlikely that the deadline is already expired by the time we reach the WFx handling code. Check for this condition as soon as possible, and return to the guest immediately if we can. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220419182755.601427-7-maz@kernel.org
2022-04-20KVM: arm64: Handle blocking WFIT instructionMarc Zyngier4-3/+28
When trapping a blocking WFIT instruction, take it into account when computing the deadline of the background timer. The state is tracked with a new vcpu flag, and is gated by a new CPU capability, which isn't currently enabled. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220419182755.601427-6-maz@kernel.org
2022-04-20KVM: arm64: Introduce kvm_counter_compute_delta() helperMarc Zyngier1-7/+10
Refactor kvm_timer_compute_delta() and extract a helper that compute the delta (in ns) between a given timer and an arbitrary value. No functional change expected. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220419182755.601427-5-maz@kernel.org
2022-04-20KVM: arm64: Simplify kvm_cpu_has_pending_timer()Marc Zyngier2-13/+2
kvm_cpu_has_pending_timer() ends up checking all the possible timers for a wake-up cause. However, we already check for pending interrupts whenever we try to wake-up a vcpu, including the timer interrupts. Obviously, doing the same work twice is once too many. Reduce this helper to almost nothing, but keep it around, as we are going to make use of it soon. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220419182755.601427-4-maz@kernel.org
2022-04-20arm64: Use WFxT for __delay() when possibleMarc Zyngier1-1/+11
Marginally optimise __delay() by using a WFIT/WFET sequence. It probably is a win if no interrupt fires during the delay. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-11-maz@kernel.org
2022-04-20arm64: Add wfet()/wfit() helpersMarc Zyngier1-0/+4
Just like we have helpers for WFI and WFE, add the WFxT versions. Note that the encoding is that reported by objdump, as no currrent toolchain knows about these instructions yet. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-10-maz@kernel.org
2022-04-20arm64: Add HWCAP advertising FEAT_WFXTMarc Zyngier5-0/+6
In order to allow userspace to enjoy WFET, add a new HWCAP that advertises it when available. Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-9-maz@kernel.org
2022-04-20arm64: Add RV and RN fields for ESR_ELx_WFx_ISSMarc Zyngier1-0/+2
The ISS field exposed by ESR_ELx contain two additional subfields with FEAT_WFxT: - RN, the register number containing the timeout - RV, indicating if the register number is valid Describe these two fields according to the arch spec. No functional change. Reviewed-by: Joey Gouly <joey.gouly@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-3-maz@kernel.org
2022-04-20arm64: Expand ESR_ELx_WFx_ISS_TI to match its ARMv8.7 definitionMarc Zyngier1-2/+4
Starting with FEAT_WFXT in ARMv8.7, the TI field in the ISS that is reported on a WFx trap is expanded by one bit to allow the description of WFET and WFIT. Special care is taken to exclude the WFxT bit from the mask used to match WFI so that it also matches WFIT when trapped from EL0. Reviewed-by: Joey Gouly <joey.gouly@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220419182755.601427-2-maz@kernel.org
2022-04-20ARM: pxa: maybe fix gpio lookup tablesArnd Bergmann3-7/+7
From inspection I found a couple of GPIO lookups that are listed with device "gpio-pxa", but actually have a number from a different gpio controller. Try to rectify that here, with a guess of what the actual device name is. Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-20ARM: pxa: use pdev resource for palmld mmioArnd Bergmann3-5/+12
The palmld header is almost unused in drivers, the only remaining thing now is the PATA device address, which should really be passed as a resource. Cc: linux-ide@vger.kernel.org Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-20ARM: dts: marvell: align SPI NOR node name with dtschemaKrzysztof Kozlowski36-36/+36
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407143234.295426-1-krzysztof.kozlowski@linaro.org
2022-04-20ARM: dts: omap: align SPI NOR node name with dtschemaKrzysztof Kozlowski15-15/+15
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407143304.295610-1-krzysztof.kozlowski@linaro.org
2022-04-20ARM: dts: nuvoton: align SPI NOR node name with dtschemaKrzysztof Kozlowski5-14/+14
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407143127.295008-1-krzysztof.kozlowski@linaro.org
2022-04-20RISC-V: KVM: Restrict the extensions that can be disabledAtish Patra1-7/+12
Currently, the config isa register allows us to disable all allowed single letter ISA extensions. It shouldn't be the case as vmm shouldn't be able to disable base extensions (imac). These extensions should always be enabled as long as they are enabled in the host ISA. Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Fixes: 92ad82002c39 ("RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls")
2022-04-20RISC-V: KVM: Remove 's' & 'u' as valid ISA extensionAtish Patra1-3/+1
There are no ISA extension defined as 's' & 'u' in RISC-V specifications. The misa register defines 's' & 'u' bit as Supervisor/User privilege mode enabled. But it should not appear in the ISA extension in the device tree. Remove those from the allowed ISA extension for kvm. Fixes: a33c72faf2d7 ("RISC-V: KVM: Implement VCPU create, init and destroy functions") Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup@brainfault.org>
2022-04-19ARM: dts: qcom-msm8974*: Remove unnecessary includeKonrad Dybcio5-5/+0
gpio.h is already included in the SoC DTSI. Don't include it again. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-24-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974-rhine: Add pstore nodeKonrad Dybcio1-0/+16
Add pstore node to allow for retrieving crash logs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-23-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974-rhine: Add NFC and enable I2C hostsKonrad Dybcio1-0/+23
Enable I2C hosts that are (supposed to be) used on Rhine and add NXP PN544 NFC node. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-22-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974*: Clean up old GPIO declarationsKonrad Dybcio3-54/+33
Remove unneeded level of nesting, as it does not match the current DTS style. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-21-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCIKonrad Dybcio7-387/+331
Clean up and commonize (where possible and it makes sense to) I2C, UART and SDHCI nodes and pin configurations. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-20-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974*: Enable IMEM unconditionallyKonrad Dybcio2-3/+0
It's always a part of the SoC, so it makes little sense to disable it. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-19-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974: Sort and clean up nodesKonrad Dybcio6-706/+677
- Remove regulators from the SoC DTSI - cpu_pmu{} -> pmu{} - move modem/iris regulators out of here; only FP2 used them - tcsr_mutex is moved out of /soc Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Rebased on top of Krzysztof's fixes] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-18-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974: Convert ADSP to a MMIO deviceKonrad Dybcio1-30/+30
The cx-supply has been removed as it's supposed to be set on a per-board basis. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-17-konrad.dybcio@somainline.org
2022-04-19ARM: dts: qcom-msm8974pro-*: Use the 8974pro name in DT filenamesKonrad Dybcio3-2/+2
Add the 'pro' part to the filenames of DTs of devices that are based on this SoC to make in easier to differentiate between Snapdragon 800- and 801-based platforms. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-16-konrad.dybcio@somainline.org
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