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2022-04-19arm64: dts: qcom: sc7280: Add wakeup-source property for USB nodeSandeep Maheswaram1-0/+1
Adding wakeup-source property for USB controller in SC7280. This property is added to inform that the USB controller is wake up capable and to conditionally power down the phy during system suspend. Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649704614-31518-7-git-send-email-quic_c_sanm@quicinc.com
2022-04-19arm64: dts: qcom: msm8996: override nodes by labelKrzysztof Kozlowski1-5/+3
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220402192859.154977-2-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: msm8994: override nodes by labelKrzysztof Kozlowski1-8/+6
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220402192859.154977-1-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom wled backlight and link to panelJoel Selvaraj1-0/+12
Xiaomi Poco F1 uses the QCOM WLED driver for backlight control. Enable and link it to the panel to use it. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB70092607CD7CDD8CF8BCD464D9E09@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable second wifi channelJoel Selvaraj1-0/+7
Like the c630, the Poco F1 is also capable of using both antenna channels for 2.4 and 5ghz wifi, however unlike the c630 only the first channel is used for bluetooth. Similar to Oneplus 6. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009E2566F9000F338432761D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: fix typo in panel's vddio-supply propertyJoel Selvaraj1-1/+1
vddio is misspelled with a "0" instead of "o". Fix it. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009901651E6A8D5ACB0425ED91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom ipa driverJoel Selvaraj1-0/+6
Enable Qualcomm IP Accelerator (IPA) driver for mobile data functionality which works by using ModemManager. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009405D7C06C0B480974063D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: change firmware path and use mbn formatJoel Selvaraj1-4/+4
The "qcom/sdm845/" path conflicts with db845c's firmware that are present in the linux-firmware package. Xiaomi uses their own signed firmware for Poco F1 and can't use the db845c's firmware. So let's use "qcom/sdm845/beryllium/" to distinguish Poco F1's firmware files. For easier handling and packaging, the mdt+bXX files are squashed using Bjorn Andersson's pil-squasher tool from this link: https://github.com/andersson/pil-squasher Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB700966DEE6F6044EBEB5B892D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19x86/cpu: Load microcode during restore_processor_state()Borislav Petkov3-4/+14
When resuming from system sleep state, restore_processor_state() restores the boot CPU MSRs. These MSRs could be emulated by microcode. If microcode is not loaded yet, writing to emulated MSRs leads to unchecked MSR access error: ... PM: Calling lapic_suspend+0x0/0x210 unchecked MSR access error: WRMSR to 0x10f (tried to write 0x0...0) at rIP: ... (native_write_msr) Call Trace: <TASK> ? restore_processor_state x86_acpi_suspend_lowlevel acpi_suspend_enter suspend_devices_and_enter pm_suspend.cold state_store kobj_attr_store sysfs_kf_write kernfs_fop_write_iter new_sync_write vfs_write ksys_write __x64_sys_write do_syscall_64 entry_SYSCALL_64_after_hwframe RIP: 0033:0x7fda13c260a7 To ensure microcode emulated MSRs are available for restoration, load the microcode on the boot CPU before restoring these MSRs. [ Pawan: write commit message and productize it. ] Fixes: e2a1256b17b1 ("x86/speculation: Restore speculation related MSRs during S3 resume") Reported-by: Kyle D. Pelton <kyle.d.pelton@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Tested-by: Kyle D. Pelton <kyle.d.pelton@intel.com> Cc: stable@vger.kernel.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=215841 Link: https://lore.kernel.org/r/4350dfbf785cd482d3fafa72b2b49c83102df3ce.1650386317.git.pawan.kumar.gupta@linux.intel.com
2022-04-19arm64: dts: qcom: do not use underscore in BCM node nameKrzysztof Kozlowski5-5/+5
Align BCM voter node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-3-krzysztof.kozlowski@linaro.org
2022-04-19ARM: dts: qcom: sdx55: remove wrong unit address from RPMH RSC clocksKrzysztof Kozlowski1-1/+1
The clock controller of RPMH RSC does not have 'reg' property, so should not have unit address. Fixes: bae2f5979c6e ("ARM: dts: qcom: Add SDX65 platform and MTP board support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-2-krzysztof.kozlowski@linaro.org
2022-04-19ARM: dts: qcom: sdx55: do not use underscore in BCM node nameKrzysztof Kozlowski1-1/+1
Align BCM voter node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-1-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: sm8450: Add thermal zonesVladimir Zapolskiy1-0/+843
Add thermal zones handled by tsens sensors. The definitions and the trip points were taken from the downstream dts. For the CPU core thermal sensors, the trip points were changed to follow the example of other Qualcomm platforms. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410234458.1739279-3-dmitry.baryshkov@linaro.org
2022-04-19arm64: dts: qcom: sm8450: Add thermal sensor controllersVladimir Zapolskiy1-0/+22
The change adds description of two thermal sensor controllers found on SM8450. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410234458.1739279-2-dmitry.baryshkov@linaro.org
2022-04-19arm64: dts: qcom: msm8998: reserve potentially inaccessible clocksMichael Srba1-0/+15
With the gcc driver now being more complete and describing clocks which might not always be write-accessible to the OS, conservatively specify all such clocks as protected in the SoC dts. The board dts - or even user-supplied dts - can override this property to reflect the actual configuration. Signed-off-by: Michael Srba <michael.srba@seznam.cz> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411072156.24451-6-michael.srba@seznam.cz
2022-04-19Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linuxRafael J. Wysocki1-0/+1
Pull turbostat changes for 5.19 from Len Brown: "Chen Yu (1): tools/power turbostat: Support thermal throttle count print Dan Merillat (1): tools/power turbostat: fix dump for AMD cpus Len Brown (5): tools/power turbostat: tweak --show and --hide capability tools/power turbostat: fix ICX DRAM power numbers tools/power turbostat: be more useful as non-root tools/power turbostat: No build warnings with -Wextra tools/power turbostat: version 2022.04.16 Sumeet Pawnikar (2): tools/power turbostat: Add Power Limit4 support tools/power turbostat: print power values upto three decimal Zephaniah E. Loss-Cutler-Hull (2): tools/power turbostat: Allow -e for all names. tools/power turbostat: Allow printing header every N iterations" * 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: tools/power turbostat: version 2022.04.16 tools/power turbostat: No build warnings with -Wextra tools/power turbostat: be more useful as non-root tools/power turbostat: fix ICX DRAM power numbers tools/power turbostat: Support thermal throttle count print tools/power turbostat: Allow printing header every N iterations tools/power turbostat: Allow -e for all names. tools/power turbostat: print power values upto three decimal tools/power turbostat: Add Power Limit4 support tools/power turbostat: fix dump for AMD cpus tools/power turbostat: tweak --show and --hide capability
2022-04-19ARM: dts: stm32: enable RTC support on stm32mp135f-dkValentin Caron1-0/+4
Enables the support of RTC on stm32mp135f-dk board. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-19ARM: dts: stm32: add RTC node on stm32mp131Valentin Caron1-0/+15
Add RTC node with compatible, clock, and interrupt properties on stm32mp131. Add clk_rtc_k fixed clock for RTC. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-19ARM: dts: stm32: Fix PHY post-reset delay on Avenger96Marek Vasut1-0/+1
Per KSZ9031RNX PHY datasheet FIGURE 7-5: POWER-UP/POWER-DOWN/RESET TIMING Note 2: After the de-assertion of reset, wait a minimum of 100 μs before starting programming on the MIIM (MDC/MDIO) interface. Add 1ms post-reset delay to guarantee this figure. Fixes: 010ca9fe500bf ("ARM: dts: stm32: Add missing ethernet PHY reset on AV96") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-19x86/mm: Fix spacing within memory encryption features messageTom Lendacky1-1/+1
The spacing is off in the memory encryption features message on AMD platforms that support memory encryption, e.g.: "Memory Encryption Features active:AMD SEV SEV-ES" There is no space before "AMD" and two spaces after it. Fix this so that the message is spaced properly: "Memory Encryption Features active: AMD SEV SEV-ES" Fixes: 968b493173ac ("x86/mm: Make DMA memory shared for TD guest") Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Link: https://lkml.kernel.org/r/02401f3024b18e90bc2508147e22e729436cb6d9.1650298573.git.thomas.lendacky@amd.com
2022-04-19ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)Fabien Dessenne2-3/+3
The recent addition pinctrl.yaml in commit c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml") resulted in some node name warnings. Fix the node names to the preferred 'pinctrl'. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-19ARM: dts: stm32: fix pinctrl node name warnings (MCU soc)Fabien Dessenne3-3/+3
The recent addition pinctrl.yaml in commit c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml") resulted in some node name warnings. Fix the node names to the preferred 'pinctrl'. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-19ARM: pxa: move regs-lcd.h into driverArnd Bergmann1-199/+0
Only the pxafb driver uses this header, so move it into the same directory. The SMART_* macros are required by some platform data definitions and can go into the linux/platform_data/video-pxafb.h header. Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: move mach/sound.h to linux/platform_data/Arnd Bergmann28-58/+27
This is a basically a platform_data file, so move it out of the mach/* header directory. Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tomas Cech <sleep_walker@suse.com> Cc: Sergey Lapin <slapin@ossfans.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Cc: alsa-devel@alsa-project.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: stop using mach/bitfield.hArnd Bergmann3-5/+3
There are two identical copies of mach/bitfield.h, one for mach-sa1100 and one for mach-pxa. The pxafb driver only makes use of two macros, which can be trivially open-coded in the header. Cc: dri-devel@lists.freedesktop.org Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: split up mach/hardware.hArnd Bergmann56-344/+101
The mach/hardware.h is included in lots of places, and it provides three different things on pxa: - the cpu_is_pxa* macros - an indirect inclusion of mach/addr-map.h - the __REG() and io_pv2() helper macros Split it up into separate <linux/soc/pxa/cpu.h> and mach/pxa-regs.h headers, then change all the files that use mach/hardware.h to include the exact set of those three headers that they actually need, allowing for further more targeted cleanup. linux/soc/pxa/cpu.h can remain permanently exported and is now in a global location along with similar headers. pxa-regs.h and addr-map.h are only used in a very small number of drivers now and can be moved to arch/arm/mach-pxa/ directly when those drivers are to pass the necessary data as resources. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Jacek Anaszewski <jacek.anaszewski@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Guenter Roeck <linux@roeck-us.net> Acked-by: Mark Brown <broonie@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: linux-leds@vger.kernel.org Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Cc: linux-rtc@vger.kernel.org Cc: linux-usb@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: remove mach/dma.hArnd Bergmann4-20/+0
The file no longer contains anything useful, so remove it. Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: make mach/regs-uart.h privateArnd Bergmann3-2/+2
This is not used by any drivers, so make it private to the platform. Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: make mainstone.h privateArnd Bergmann2-3/+1
No driver includes this any more, so don't expose it globally. Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19ARM: pxa: split mach/generic.hArnd Bergmann2-6/+6
Only one declaration from this header is actually used in drivers, so move that one into the global location and leave everything else private. Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-19arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFSKrzysztof Kozlowski2-4/+4
The DT schema expects 'freq-table-hz' property to be an uint32-matrix, which is also easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220306111125.116455-10-krzysztof.kozlowski@canonical.com
2022-04-19x86/cpu: Add new Alderlake and Raptorlake CPU model numbersTony Luck1-0/+3
Intel is subdividing the mobile segment with additional models with the same codename. Using the Intel "N" and "P" suffices for these will be less confusing than trying to map to some different naming convention. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/YlS7n7Xtso9BXZA2@agluck-desk3.sc.intel.com
2022-04-19ARM: shmobile: defconfig: Refresh for v5.18-rc1Geert Uytterhoeven1-2/+2
Refresh the defconfig for Renesas ARM systems: - Move CONFIG_V4L_MEM2MEM_DRIVERS (moved in commit 256bf685691d8646 ("media: platform: move platform menu dependencies to drivers")), - Move CONFIG_DEBUG_FS (moved in commit f9b3cd24578401e7 ("Kconfig.debug: make DEBUG_INFO selectable from a choice")). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/922ba60d81a71acfae5d88c1991d8c96bb2b3527.1649947421.git.geert+renesas@glider.be
2022-04-19arm64: defconfig: Enable Maxim MAX96712 Quad GMSL2 Deserializer supportGeert Uytterhoeven1-0/+1
Increase build and test coverage by enabling modular support for the Maxim MAX96712 Quad GMSL2 Deserializer, as used on the Renesas Falcon board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7b5ea7eaabc1da79fd974f9d9845a5a527f2fb14.1649947458.git.geert+renesas@glider.be
2022-04-19ARM: dts: r9a06g032: Drop "arm,cortex-a7-timer" from timer nodeGeert Uytterhoeven1-2/+1
"make dtbs_check": arch/arm/boot/dts/r9a06g032-rzn1d400-db.dt.yaml: timer: compatible: 'oneOf' conditional failed, one must be fixed: ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long 'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer'] 'arm,cortex-a7-timer' is not one of ['arm,armv7-timer'] 'arm,cortex-a7-timer' is not one of ['arm,armv8-timer'] From schema: Documentation/devicetree/bindings/timer/arm,arch_timer.yaml The Cortex-A7 timer should just declare compatibility with "arm,armv7-timer". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a8e0cf00a983b4c539cdb1cfad5cc6b10b423c5b.1649680220.git.geert+renesas@glider.be
2022-04-19arm64: dts: renesas: r8a779f0: Add GPIO nodesGeert Uytterhoeven1-0/+60
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car S4-8 (R8A779F0) SoC. Note that GPIO blocks 4-7 are not added, as they can only be accessed from the Control Domain. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7fb68561026fa8bb5d9baf0596560c5c719a38cc.1649086225.git.geert+renesas@glider.be
2022-04-19ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier boardMax Krummenacher2-0/+114
Add support for Toradex Aster, small form-factor with header compatible with Arduino Uno and Raspberry Pi (RPi) maker boards. Additional detail available at https://www.toradex.com/products/carrier-boards/aster-carrier-board Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boardsMax Krummenacher3-0/+200
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configurationMax Krummenacher1-1/+20
The Toradex board Iris V2 has a SD-card slot with switchable power. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: CleanupMax Krummenacher2-170/+172
- Sort pinctrl nodes alphabetically - End all pinctrl node names in grp and avoid using dashes - Change pinctrl_usbc_id_1's node name to not use underscores - Change the pmic's node name to pmic@8 per binding requirement - Add sound-dai-cells to the codec node per binding requirement Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsiMax Krummenacher2-49/+53
The following two nodes define module level functionality, move them from the carrier board dts file to the SoM file. While at it, reorder the properties in the gpio-keys node alphabetical. - gpio-keys defining the wakeup pin - memory node The atmel touchscreen node can be used on any carrier board. Move it from the carrier board to the module-level device tree and keep it disabled. Set the default pinmuxing to the dedicated connector available on newer carrier boards and rename the pinctrl labels specifying the INT/Reset signal to a common pattern. pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Add additional pingroupsMax Krummenacher1-0/+52
The Toradex board Iris V2 has an LVDS transceiver which is configured with 4 signals. Add corresponding pins into the separate pingroup to be able to manage the transceiver. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Command pmic to standby for poweroffMax Krummenacher1-0/+5
The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC into a low power mode in poweroff. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Disable add-on accessoriesMax Krummenacher2-60/+56
The Toradex Colibri family is composed of SoM that can be plugged in various carrier board, with carrier boards allowing multiple optional add-on (e.g. display, camera, ...). Keep all the SoM specific part into the module .dtsi, disabling everything that is not self-contained on the board. The carrier board dts can reuse/enable anything that is defined in the module dtsi. Additional device tree overlays can be used for any accessories that are plugged in the carrier board. Disable parallel RGB: The parallel RGB interface (lcd_display) and all related nodes can be enabled in an overlay if used. Keep all nodes disabled in the module-level device tree. Rename display interface node to match imx6qdl-apalis to make it easier to use overlays. The pwm-backlight binding now requires the power-supply property, add it. Disable stmpe touchscreen: The touchscreen can be enabled in an overlay if used. Add labels to the stmpe sub nodes. Disable hdmi interface: HDMI can be enabled in an overlay if used. Update SPDX-License spelling to latest convention. Update Copyright year. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Add gpio-line-namesOleksandr Suvorov1-0/+218
Add GPIO line names on module level. Those are all GPIOs which a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board level device tree. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-19ARM: dts: imx6dl-colibri: Fix I2C pinmuxingMax Krummenacher1-3/+3
Fix names of extra pingroup node and property for gpio bus recovery. Without the change i2c2 is not functional. Fixes: 56f0df6b6b58 ("ARM: dts: imx*(colibri|apalis): add missing recovery modes to i2c") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18ARC: remove redundant READ_ONCE() in cmpxchg loopBang Li1-1/+1
This patch reverts commit 7082a29c22ac ("ARC: use ACCESS_ONCE in cmpxchg loop"). It is not necessary to use READ_ONCE() because cmpxchg contains barrier. We can get it from commit d57f727264f1 ("ARC: add compiler barrier to LLSC based cmpxchg"). Signed-off-by: Bang Li <libang.linuxer@gmail.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
2022-04-18ARC: atomic: cleanup atomic-llsc definitionsSergey Matyukevich1-16/+16
Remove redundant c_op macro argument. Only asm_op is needed to define atomic operations using llock/scond. Signed-off-by: Sergey Matyukevich <sergey.matyukevich@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
2022-04-18arc: drop definitions of pgd_index() and pgd_offset{, _k}() entirelyRolf Eike Beer1-3/+0
They were in <asm/pgtables.h> and have been removed from there in 974b9b2c68f ("mm: consolidate pte_index() and pte_offset_*() definitions") in favor of the generic version. But that missed that the same definitons also existed in <asm/pgtable-levels.h>, where they were (inadvertently?) introduced in fe6cb7b043b6 ("ARC: mm: disintegrate pgtable.h into levels and flags"). Fixes: 974b9b2c68f3 ("mm: consolidate pte_index() and pte_offset_*() definitions") Fixes: fe6cb7b043b6 ("ARC: mm: disintegrate pgtable.h into levels and flags") Signed-off-by: Rolf Eike Beer <eb@emlix.com> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
2022-04-18ARC: dts: align SPI NOR node name with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
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