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2022-04-13arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub nodeBiju Das1-1/+7
Fillup the pinctrl(GPIO) stub node in RZ/G2UL SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220402081328.26292-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVKBiju Das3-0/+138
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11): - memory - External input clock - CPG - DMA - SCIF It shares the same carrier board with RZ/G2L, but the pin mapping is different. Disable the device nodes which are not tested and delete the corresponding pinctrl definitions. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220412161314.13800-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoCBiju Das1-0/+413
Add initial DTSI for RZ/G2UL SoC. Both RZ/G2L and RZ/G2UL uses the same SMARC EVK. Therefore they share the common dtsi (rz-smarc.dtsi) file. Place holders are added in device nodes to avoid compilation errors for the devices which have not been enabled yet on RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220412161314.13800-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsiBiju Das3-1/+8
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property of vccq_sdhi1 regulator from common dtsi to soc specific dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier boardBiju Das3-6/+15
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the carrier board. This patch adds pinmux and spi1 nodes to the carrier board dtsi file and drops deleting pinctl* properties from DTS file. RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: ulcb: Add RPC HyperFlash device nodeGeert Uytterhoeven1-0/+49
Add the RPC HyperFlash device node along with its partitions to the common ULCB board DTS file. Based on a patch in the BSP by Valentine Barshak. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/61a63e819d4296760ca7ae83ef5226a2c4d7bd93.1648548339.git.geert+renesas@glider.be
2022-04-13arm64: dts: renesas: salvator-common: Add RPC HyperFlash device nodeGeert Uytterhoeven1-0/+49
Add the RPC HyperFlash device node along with its partitions to the common Salvator-X(S) board DTS file. Based on a patch in the BSP by Valentine Barshak. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/cfc6af8a4c42febcc405b7356c38448eec8e29b0.1648548339.git.geert+renesas@glider.be
2022-04-13arm64: dts: renesas: ebisu: Add RPC HyperFlash device nodeGeert Uytterhoeven1-0/+58
Add the RPC HyperFlash device node along with its partitions to the common Ebisu board DTS file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b14c769f62211b67d90dbd2f127357756e6cb4fa.1648548339.git.geert+renesas@glider.be
2022-04-13arm64: dts: renesas: draak: Add RPC HyperFlash device nodeGeert Uytterhoeven1-0/+58
Add the RPC HyperFlash device node along with its partitions to the common Draak board DTS file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
2022-04-13arm64: dts: renesas: rcar-gen3: Add RPC device nodesGeert Uytterhoeven6-0/+96
Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the various R-Car Gen3 SoCs that do not have support for them yet in their device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3). Based on patches in the BSP by Valentine Barshak. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/3231749c7b63df1a2134daabe66446a3e0e5515b.1648548339.git.geert+renesas@glider.be
2022-04-13arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodesWolfram Sang2-0/+2
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodesWolfram Sang3-0/+3
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rcar-gen3: Add interrupt properties to watchdog nodesWolfram Sang8-0/+8
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-4-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13ARM: dts: rzg1: Add interrupt properties to watchdog nodesWolfram Sang4-0/+4
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13ARM: dts: rcar-gen2: Add interrupt properties to watchdog nodesWolfram Sang5-0/+5
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13net: ethernet: mtk_eth_soc: use standard property for cci-control-portLorenzo Bianconi1-1/+1
Rely on standard cci-control-port property to identify CCI port reference. Update mt7622 dts binding. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-13arch: xtensa: platforms: Fix deadlock in rs_close()Duoming Zhou1-8/+0
There is a deadlock in rs_close(), which is shown below: (Thread 1) | (Thread 2) | rs_open() rs_close() | mod_timer() spin_lock_bh() //(1) | (wait a time) ... | rs_poll() del_timer_sync() | spin_lock() //(2) (wait timer to stop) | ... We hold timer_lock in position (1) of thread 1 and use del_timer_sync() to wait timer to stop, but timer handler also need timer_lock in position (2) of thread 2. As a result, rs_close() will block forever. This patch deletes the redundant timer_lock in order to prevent the deadlock. Because there is no race condition between rs_close, rs_open and rs_poll. Signed-off-by: Duoming Zhou <duoming@zju.edu.cn> Message-Id: <20220407154430.22387-1-duoming@zju.edu.cn> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-04-13xtensa: patch_text: Fixup last cpu should be masterGuo Ren1-1/+1
These patch_text implementations are using stop_machine_cpuslocked infrastructure with atomic cpu_count. The original idea: When the master CPU patch_text, the others should wait for it. But current implementation is using the first CPU as master, which couldn't guarantee the remaining CPUs are waiting. This patch changes the last CPU as the master to solve the potential risk. Fixes: 64711f9a47d4 ("xtensa: implement jump_label support") Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org> Cc: <stable@vger.kernel.org> Message-Id: <20220407073323.743224-4-guoren@kernel.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-04-12ARM: dts: qcom: sdx65: Add support for TCSR MutexRohit Agarwal1-0/+6
Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-7-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: sdx65: Enable ARM SMMURohit Agarwal1-0/+40
Add a node for the ARM SMMU found in the SDX65. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-6-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: sdx65: Add support for SDHCI controllerRohit Agarwal1-0/+13
Add devicetree support for SDHCI controller found in Qualcomm SDX65 platform. The SDHCI controller is based on the MSM SDHCI v5 IP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-4-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: sdx65: Add reserved memory nodesRohit Agarwal2-0/+66
Add reserved memory nodes to the SDX65 dtsi as defined by the memory map. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-2-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: do not use underscore in node nameKrzysztof Kozlowski10-13/+13
Align RPM requests node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Fixed up qcom-{apq8074,msm8974}-*.dts to match the qcom-msm8974.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-8-krzysztof.kozlowski@linaro.org
2022-04-12ARM: dts: qcom: msm8974-samsung-klte: move gpio-keys out of socKrzysztof Kozlowski1-32/+32
The GPIO keys are not part of SoC and they should be defined inside of the root node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-6-krzysztof.kozlowski@linaro.org
2022-04-12ARM: dts: qcom: msm8974-lge-nexus5: move gpio-keys out of socKrzysztof Kozlowski1-21/+21
The GPIO keys are not part of SoC and they should be defined inside of the root node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-5-krzysztof.kozlowski@linaro.org
2022-04-12ARM: dts: qcom: sdx65-mtp: Add regulator nodesRohit Agarwal1-0/+197
Add the regulators found on SDX65 MTP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-7-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: sdx65: Add rpmpd nodeRohit Agarwal1-0/+51
Add rpmpd node and opps for this node to the SDX65 dts. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-5-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: sdx65-mtp: Add pmx65 pmicRohit Agarwal1-0/+1
SDX65-mtp features PMX65 pmic, so include the dts as well. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-4-git-send-email-quic_rohiagar@quicinc.com
2022-04-12ARM: dts: qcom: Add PMIC pmx65 dtsRohit Agarwal1-0/+32
Add DTS for PMIC PMX65 found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-6-git-send-email-quic_rohiagar@quicinc.com
2022-04-12arm64: dts: qcom: add RPM clock controller fallback compatibleKrzysztof Kozlowski6-6/+6
The bindings require a fallback compatible to RPM clock controller. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: msm8994: remove SMD qcom,local-pid propertyKrzysztof Kozlowski1-1/+0
The Qualcomm SMD does not use qcom,local-pid property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: msm8953: do not use underscore in node nameKrzysztof Kozlowski1-1/+1
Align RPM requests node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifiLuca Weiss1-0/+10
Configure regulators used by the wifi hardware and enable it. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
2022-04-12arm64: dts: qcom: sm6350: Add wifi nodeLuca Weiss1-0/+22
Add a node describing the wifi hardware found on sm6350. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220325101841.172304-1-luca.weiss@fairphone.com
2022-04-12arm64: dts: qcom: msm8994: Add mmc aliasesKonrad Dybcio1-0/+5
Set the aliases for both SDHCI controllers. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-16-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Add watchdog timer nodeKonrad Dybcio1-0/+9
Add and configure the watchdog node. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-15-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Fix BLSP[12]_DMA channels countKonrad Dybcio1-2/+2
MSM8994 actually features 24 DMA channels for each BLSP, fix it! Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-14-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Add OCMEM nodeKonrad Dybcio2-0/+25
Add OCMEM node to allow for GPU SRAM access. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-13-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994-kitakami: Update regulator configurationKonrad Dybcio1-38/+44
Remove regulator-always-on property where not necessary and mark regulators that are not supposed to be voted active on boot with regulator-boot-on. While at it, reorder the load properties to make it look more decent. Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's inability to handle them (at least for now). Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-12-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994-kitakami: Disable a mistakengly enabled I2C hostKonrad Dybcio1-7/+0
I2C4 turns out not to be used on Kitakami after all and it only blocks a GPIO used by camera hardware. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-11-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992-libra: Fix up the framebufferKonrad Dybcio1-2/+14
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS is properly handled by its own driver) and touch up the fb address to prevent some weird shifting. It's still not perfect, but at least the kernel log doesn't start a third deep into your screen.. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Folded in change of framebuffer base address, from Konrad] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-10-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Fix the cont_splash_mem addressKonrad Dybcio1-2/+2
The default memory map places cont_splash_mem at 3401000, which was overlooked.. Fix it! Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-9-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992: Use the correct MMCC compatibleKonrad Dybcio1-0/+10
Now that proper msm8992 support is in the driver, switch to the new compatible. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-8-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992: Use the correct GCC compatibleKonrad Dybcio1-0/+4
Now that proper msm8992 support is in the driver, switch to the new compatible. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Add MMCC nodeKonrad Dybcio1-0/+40
Describe the Multimedia Clock Controller block in the DT. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay"Konrad Dybcio1-1/+0
The framebuffer is already enabled by default. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1Konrad Dybcio1-1/+1
The phone seems to randomly crash when more than 1 CPU is enabled, which is probably related to lack of some driver. Restrict the device to only use a single core until this is solved. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8992-libra: Add CPU regulatorsKonrad Dybcio1-0/+17
Specify CPU regulator voltages for both VDD_APC rails. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
2022-04-12arm64: dts: qcom: msm8994: Fix sleep clock nameKonrad Dybcio1-1/+1
The sleep clock name expected by GCC is actually "sleep" and not "sleep_clk". Fix the clock-names value for it to make sure it is provided. Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC") Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
2022-04-12ARM: dts: qcom: sdx65-mtp: Add pmk8350b and pm8150b pmicRohit Agarwal1-0/+2
SDX65-mtp features PMK8350b and PM8150B pmic, so include the dts as well Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-3-git-send-email-quic_rohiagar@quicinc.com
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