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2022-04-04ARM: dts: ste-dbx: Update spi clock-names propertyKuldeep Singh1-6/+6
Now that spi pl022 binding only accept "sspclk" as clock name, ST ericsson platform with "SSPCLK" clock name start raising dtbs_check warnings. Make necessary changes to update this property in order to make it compliant with binding. clock-names:0: 'sspclk' was expected Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Link: https://lore.kernel.org/r/20220312113853.63446-5-singh.kuldeep87k@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoCArınç ÜNAL4-4/+4
Fix compatible strings for devicetrees using the BCM53012 and BCM53016 SoC. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88UArınç ÜNAL1-0/+8
The et1macaddr NVRAM variable contains a MAC address for gmac1 on Asus RT-AC88U. Add NVMEM cell for it and reference it in the gmac1 node. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88UArınç ÜNAL1-0/+1
Define phy-mode of the Broadcom switch's port@5 as rgmii. This doesn't seem to matter but let's explicitly define it since phy-mode as rgmii is defined on the other side which is port@6 of the Realtek switch. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88UArınç ÜNAL1-4/+1
Remove #address-cells and #size-cells properties from the ports node of &srab. They are already defined on bcm5301x.dtsi, there's no need to define them again. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: BCM5301X: Fix DTC warning for NAND nodeArınç ÜNAL1-2/+0
Remove the unnecessary #address-cells and #size-cells properties on the nand@0 node to fix the warning below. Warning (avoid_unnecessary_addr_size): /nand-controller@18028000/nand@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: BCM5301X: Update pin controller node nameRafał Miłecki1-1/+1
This fixes: arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: cru-bus@100: 'pin-controller@1c0' does not match any of the regexes: '^clock-controller@[a-f0-9]+$', '^phy@[a-f0-9]+$', '^pinctrl@[a-f0-9]+$', '^syscon@[a-f0-9]+$', '^thermal@[a-f0-9]+$' From schema: Documentation/devicetree/bindings/mfd/brcm,cru.yaml arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pin-controller@1c0: $nodename:0: 'pin-controller@1c0' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$' From schema: Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml Ref: e7391b021e3f ("dt-bindings: mfd: brcm,cru: Rename pinctrl node") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: brcmstb: fix typos in commentsJulia Lawall1-1/+1
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: bcm-cygnus: Update spi clock propertiesKuldeep Singh1-6/+6
PL022 binding require two clocks to be defined but broadcom cygnus platform doesn't comply with bindings and define only one clock. Update spi clocks and clocks-names property by adding appropriate clock reference to make it compliant with bindings. CC: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04x86/fault: Cast an argument to the proper address space in prefetch()Lukas Bulwahn1-1/+1
Commit in Fixes uses accessors based on the access mode, i.e., it distinguishes its access if instr carries a user address or a kernel address. Since that commit, sparse complains about passing an argument without __user annotation to get_user(), which expects a pointer of the __user address space: arch/x86/mm/fault.c:152:29: warning: incorrect type in argument 1 (different address spaces) arch/x86/mm/fault.c:152:29: expected void const volatile [noderef] __user *ptr arch/x86/mm/fault.c:152:29: got unsigned char *[assigned] instr Cast instr to __user when accessing user memory. No functional change. No change in the generated object code. [ bp: Simplify commit message. ] Fixes: 35f1c89b0cce ("x86/fault: Fix AMD erratum #91 errata fixup for user code") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220201144055.5670-1-lukas.bulwahn@gmail.com
2022-04-04x86/mm/tlb: Revert retpoline avoidance approachDave Hansen1-32/+5
0day reported a regression on a microbenchmark which is intended to stress the TLB flushing path: https://lore.kernel.org/all/20220317090415.GE735@xsang-OptiPlex-9020/ It pointed at a commit from Nadav which intended to remove retpoline overhead in the TLB flushing path by taking the 'cond'-ition in on_each_cpu_cond_mask(), pre-calculating it, and incorporating it into 'cpumask'. That allowed the code to use a bunch of earlier direct calls instead of later indirect calls that need a retpoline. But, in practice, threads can go idle (and into lazy TLB mode where they don't need to flush their TLB) between the early and late calls. It works in this direction and not in the other because TLB-flushing threads tend to hold mmap_lock for write. Contention on that lock causes threads to _go_ idle right in this early/late window. There was not any performance data in the original commit specific to the retpoline overhead. I did a few tests on a system with retpolines: https://lore.kernel.org/all/dd8be93c-ded6-b962-50d4-96b1c3afb2b7@intel.com/ which showed a possible small win. But, that small win pales in comparison with the bigger loss induced on non-retpoline systems. Revert the patch that removed the retpolines. This was not a clean revert, but it was self-contained enough not to be too painful. Fixes: 6035152d8eeb ("x86/mm/tlb: Open-code on_each_cpu_cond_mask() for tlb_is_not_lazy()") Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Nadav Amit <namit@vmware.com> Cc: <stable@vger.kernel.org> Link: https://lkml.kernel.org/r/164874672286.389.7021457716635788197.tip-bot2@tip-bot2
2022-04-04ARM: mm: fix typos in commentsJulia Lawall1-1/+1
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: s3c: fix typos in commentsJulia Lawall3-3/+3
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220318103729.157574-31-Julia.Lawall@inria.fr Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI deviceKrzysztof Kozlowski1-14/+4
Move USB PHYs to a standard arrays for S5PV210 EHCI/OHCI devices. This resolves the conflict between S5PV210 EHCI/OHCI sub-nodes and generic USB device bindings. Suggested-by: Måns Rullgård <mans@mansr.com> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220314181948.246434-3-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschemaKrzysztof Kozlowski1-2/+2
The node names should be generic and USB DT schema expects "usb" names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314181948.246434-2-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4Krzysztof Kozlowski1-2/+2
The node names should be generic and USB DT schema expects "usb" names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314181948.246434-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: drop deprecated SFR region from MIPI phyKrzysztof Kozlowski1-3/+2
Commit e4b3d38088df ("phy: exynos-video-mipi: Fix regression by adding support for PMU regmap") deprecated the usage of unit address in MIPI phy node, in favor of a syscon phandle. Deprecating was a correct approach because that unit address was actually coming from Power Management Unit SFR range so its usage here caused overlapped memory mapping. In 2016 commit 26dbadba495f ("phy: exynos-mipi-video: Drop support for direct access to PMU") fully removed support for parsing that MIPI phy unit address (SFR range) but the address stayed in Exynos5250 DTSI for compatibility reasons. Remove that deprecated unit address from Exynos5250 MIPI phy, because it has been almost 6 years since it was deprecated and it causes now DT schema validation warnings: video-phy@10040710: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Any out-of-tree users of Exynos5250 DTSI, should update their code to use newer syscon property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar<alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314184113.251013-1-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: tesla: add a specific compatible to MCT on FSDKrzysztof Kozlowski1-1/+1
One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which is correct but not specific enough. The MCT blocks have different number of interrupts, so add a second specific compatible to Tesla FSD. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-5-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: exynos: add a specific compatible to MCTKrzysztof Kozlowski2-2/+4
One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: add a specific compatible to MCTKrzysztof Kozlowski4-4/+8
One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos3250 and all Exynos5 SoCs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-3-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: exynos: move aliases to board in Exynos850Krzysztof Kozlowski2-16/+5
The aliases for typical blocks which are disabled by default in DTSI (like I2C, UART and MMC) should be defined in the board DTS. The board should add aliases only for enabled blocks according to its specific order. On Exynos850, move aliases of enabled blocks to E850-96 board and remove unused ones. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220221075219.10827-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: bcm283x: fix ethernet node nameOleksij Rempel2-2/+2
It should be "ethernet@x" instead of "usbether@x" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-04-04ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on OdroidKrzysztof Kozlowski1-5/+2
Passing maximum frequency of LPDDR3 memory timings as unit address was deprecated in favor of 'max-freq' property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20220206135918.211990-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: s3c: Drop config symbol S3C24XX_PWMUwe Kleine-König4-11/+4
The only effect of this symbol is to select PWM_SAMSUNG. Drop it and fix the affected defconfigs to still keep PWM_SAMSUNG=y. Developers using MACH_NEO1973_GTA02 and/or MACH_RX1950 now have to manually select PWM and PWM_SAMSUNG (and get the freedom to select is as a module or not at all). A side effect of this change is that allmodconfig now contains PWM_SAMSUNG=m (which was =y before). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20220328082638.112185-1-u.kleine-koenig@pengutronix.de Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04ARM: dts: exynos: fix compatible strings for Ethernet USB devicesOleksij Rempel5-9/+9
Fix compatible string for Ethernet USB device as required by USB device schema: Documentation/devicetree/bindings/usb/usb-device.yaml The textual representation of VID and PID shall be in lower case hexadecimal with leading zeroes suppressed. Since there are no kernel driver matching against this compatibles, I expect no regressions with this patch. At the same time, without this fix, we are not be able to validate this device nodes with newly provided DT schema. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20220216074927.3619425-7-o.rempel@pengutronix.de Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04ARM: dts: exynos: fix ethernet node name for different odroid boardsOleksij Rempel5-5/+5
The node name of Ethernet controller should be "ethernet" instead of "usbether" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20220216074927.3619425-6-o.rempel@pengutronix.de Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04ARM: iop32x: include iop3xx.h header where neededArnd Bergmann1-0/+2
Building with 'make W=1' shows a warning about a missing prototype: arch/arm/mach-iop32x/cp6.c:10:6: warning: no previous prototype for 'iop_enable_cp6' [-Wmissing-prototypes] Include the header that contains the declaration. Fixes: 6f5d248d05db ("ARM: iop32x: use GENERIC_IRQ_MULTI_HANDLER") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-04x86/PCI: Eliminate remove_e820_regions() common subexpressionsBjorn Helgaas1-2/+4
Add local variables to reduce repetition later. No functional change intended. Link: https://lore.kernel.org/r/20220304035110.988712-2-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-04ARM: davinci: da850-evm: Avoid NULL pointer dereferenceNathan Chancellor1-1/+3
With newer versions of GCC, there is a panic in da850_evm_config_emac() when booting multi_v5_defconfig in QEMU under the palmetto-bmc machine: Unable to handle kernel NULL pointer dereference at virtual address 00000020 pgd = (ptrval) [00000020] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 5.15.0 #1 Hardware name: Generic DT based system PC is at da850_evm_config_emac+0x1c/0x120 LR is at do_one_initcall+0x50/0x1e0 The emac_pdata pointer in soc_info is NULL because davinci_soc_info only gets populated on davinci machines but da850_evm_config_emac() is called on all machines via device_initcall(). Move the rmii_en assignment below the machine check so that it is only dereferenced when running on a supported SoC. Fixes: bae105879f2f ("davinci: DA850/OMAP-L138 EVM: implement autodetect of RMII PHY") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/YcS4xVWs6bQlQSPC@archlinux-ax161/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-04Merge branch 'remove-h8300' of git://git.infradead.org/users/hch/misc into asm-genericArnd Bergmann92-5714/+0
* 'remove-h8300' of git://git.infradead.org/users/hch/misc: remove the h8300 architecture This is clearly the least actively maintained architecture we have at the moment, and probably the least useful. It is now the only one that does not support MMUs at all, and most of the boards only support 4MB of RAM, out of which the defconfig kernel needs more than half just for .text/.data. Guenter Roeck did the original patch to remove the architecture in 2013 after it had already been obsolete for a while, and Yoshinori Sato brought it back in a much more modern form in 2015. Looking at the git history since the reinstantiation, it's clear that almost all commits in the tree are build fixes or cross-architecture cleanups: $ git log --no-merges --format=%an v4.5.. arch/h8300/ | sort | uniq -c | sort -rn | head -n 12 25 Masahiro Yamada 18 Christoph Hellwig 14 Mike Rapoport 9 Arnd Bergmann 8 Mark Rutland 7 Peter Zijlstra 6 Kees Cook 6 Ingo Molnar 6 Al Viro 5 Randy Dunlap 4 Yury Norov Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-04arm64: dts: mt8192: Add H264 venc device nodeAllen-KH Cheng1-0/+23
Adds H264 venc node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220330133816.30806-4-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add PCIe nodeAllen-KH Cheng1-0/+35
Add PCIe node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220330133816.30806-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add dpi nodeAllen-KH Cheng1-0/+11
Add dpi node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-18-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add m4u and smi nodesAllen-KH Cheng1-0/+190
Add m4u and smi nodes for mt8192 SoC Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-15-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add efuse nodeAllen-KH Cheng1-0/+15
Add efuse node for mt8192 SoC Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-12-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Fix nor_flash status disable typoAllen-KH Cheng1-1/+1
Correct nor_flash status disable typo of mt8192 SoC. Fixes: d0a197a0d064a ("arm64: dts: mt8192: add nor_flash device node") Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-11-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add xhci nodeAllen-KH Cheng1-0/+24
Add xhci node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-7-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add usb-phy nodeAllen-KH Cheng1-0/+22
Add xhci node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-6-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add SCP nodeAllen-KH Cheng1-0/+12
Add SCP node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-5-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mt8192: Add pwrap nodeAllen-KH Cheng1-0/+12
Add pwrap node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220318144534.17996-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: dts: mediatek: Format mediatek,larbs as an array of phandlesNícolas F. R. A. Prado4-8/+8
Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas") updated the mediatek,larbs property in the mediatek,iommu.yaml dt-binding to make it clearer that the phandles passed to the property are independent, rather than subsequent arguments to the first phandle. Update the mediatek,larbs property in the arm64 Devicetrees to use the same formatting. This change doesn't impact any behavior: the compiled dtb is exactly the same. It does however fix the warnings generated by dtbs_check. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220301203147.1143782-2-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-04-04arm64: Fix comments in macro __init_el2_gicv3Zhiyuan Dai1-1/+1
Fix typo in comment. Signed-off-by: Zhiyuan Dai <daizhiyuan@phytium.com.cn> Link: https://lore.kernel.org/r/1647831387-3686-1-git-send-email-daizhiyuan@phytium.com.cn Signed-off-by: Will Deacon <will@kernel.org>
2022-04-04arm64: fix typos in commentsJulia Lawall4-5/+5
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/20220318103729.157574-10-Julia.Lawall@inria.fr [will: Squashed in 20220318103729.157574-28-Julia.Lawall@inria.fr] Signed-off-by: Will Deacon <will@kernel.org>
2022-04-04arch/arm64: Fix topology initialization for core schedulingPhil Auld1-1/+1
Arm64 systems rely on store_cpu_topology() to call update_siblings_masks() to transfer the toplogy to the various cpu masks. This needs to be done before the call to notify_cpu_starting() which tells the scheduler about each cpu found, otherwise the core scheduling data structures are setup in a way that does not match the actual topology. With smt_mask not setup correctly we bail on `cpumask_weight(smt_mask) == 1` for !leaders in: notify_cpu_starting() cpuhp_invoke_callback_range() sched_cpu_starting() sched_core_cpu_starting() which leads to rq->core not being correctly set for !leader-rq's. Without this change stress-ng (which enables core scheduling in its prctl tests in newer versions -- i.e. with PR_SCHED_CORE support) causes a warning and then a crash (trimmed for legibility): [ 1853.805168] ------------[ cut here ]------------ [ 1853.809784] task_rq(b)->core != rq->core [ 1853.809792] WARNING: CPU: 117 PID: 0 at kernel/sched/fair.c:11102 cfs_prio_less+0x1b4/0x1c4 ... [ 1854.015210] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000010 ... [ 1854.231256] Call trace: [ 1854.233689] pick_next_task+0x3dc/0x81c [ 1854.237512] __schedule+0x10c/0x4cc [ 1854.240988] schedule_idle+0x34/0x54 Fixes: 9edeaea1bc45 ("sched: Core-wide rq->lock") Signed-off-by: Phil Auld <pauld@redhat.com> Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Tested-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Link: https://lore.kernel.org/r/20220331153926.25742-1-pauld@redhat.com Signed-off-by: Will Deacon <will@kernel.org>
2022-04-04arm64: defconfig: Enable ARCH_R9A07G054Lad Prabhakar1-0/+1
Enable support for the Renesas RZ/V2L SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220308140033.10501-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r8a77961: Add CAN-FD nodeKoji Matsuoka1-0/+25
Add the device node for the CAN-FD device on R-Car M3-W+. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220319223306.60782-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: falcon: Enable CANFD 0 and 1Ulrich Hecht1-0/+24
Enables confirmed-working CAN interfaces 0 and 1 on the Falcon board. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20220309162609.3726306-4-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r8a779a0: Add CANFD device nodeUlrich Hecht1-0/+56
This patch adds a CANFD device node for r8a779a0. Based on patch by Kazuya Mizuguchi. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20220309162609.3726306-3-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86Kieran Bingham1-2/+10
The INTC block is a better choice for handling the interrupts on the V3U as the INTC will always be powered, while the GPIO block may be de-clocked if not in use. Further more, it may be likely to have a lower power consumption as it does not need to drive the pins. Switch the interrupt parent and interrupts definition from gpio1 to irq0 on intc_ex, and configure the PFC accordingly. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220309190631.1576372-1-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r9a07g054: Add TSU nodeLad Prabhakar1-0/+41
Add TSU and thermal-zones nodes to RZ/V2L (R9A07G054) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220308223324.7456-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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