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2022-02-07x86/alternative: Introduce text_poke_copySong Liu2-0/+35
This will be used by BPF jit compiler to dump JITed binary to a RX huge page, and thus allow multiple BPF programs sharing the a huge (2MB) page. Signed-off-by: Song Liu <song@kernel.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/bpf/20220204185742.271030-6-song@kernel.org
2022-02-07x86/Kconfig: Select HAVE_ARCH_HUGE_VMALLOC with HAVE_ARCH_HUGE_VMAPSong Liu1-0/+1
This enables module_alloc() to allocate huge page for 2MB+ requests. To check the difference of this change, we need enable config CONFIG_PTDUMP_DEBUGFS, and call module_alloc(2MB). Before the change, /sys/kernel/debug/page_tables/kernel shows pte for this map. With the change, /sys/kernel/debug/page_tables/ show pmd for thie map. Signed-off-by: Song Liu <songliubraving@fb.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20220204185742.271030-2-song@kernel.org
2022-02-07mips: Enable KCSANNemanja Rakovic3-0/+5
This patch enables KCSAN for the 64-bit version. Updated rules for the incompatible compilation units (vdso, boot/compressed). Signed-off-by: Nemanja Rakovic <nemanja.rakovic@syrmia.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-02-07MIPS: Loongson{2ef,64}: Wrap -mno-branch-likely with cc-optionNathan Chancellor3-2/+8
This flag is not supported by clang, which results in a warning: clang-14: warning: argument unused during compilation: '-mno-branch-likely' [-Wunused-command-line-argument] This breaks cc-option, which adds -Werror to make this warning fatal and catch flags that are not supported. Wrap this flag in cc-option so that it does not cause cc-option to fail, which can cause randconfigs to be really noisy, due to warnings not getting disabled that should be. Additionally, move the cc-option check to Kconfig so that the check is done at configuration time, rather than build time, as builds with no configuration change will be quicker because the cc-option call will not need to happen in those instances. Suggested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-02-07MIPS: Loongson64: Clean up use of cc-ifversionNathan Chancellor1-18/+3
This Makefile checks that GCC is 4.9 or newer, which is redundant after commit 76ae847497bc ("Documentation: raise minimum supported version of GCC to 5.1"), so cc-option can be removed. Clang does not support -march=loongson3a so it needs to continue to use -march=mips64r2, which no longer needs cc-option because all supported clang versions recognize this flag. -march=loonson3a can be used unconditionally with GCC because the minimum supported GCC version has been bumped past 4.9.0, which won't have the bug mentioned in the comment. The _MIPS_ISA macro redefinition can be removed at the same time for the same reason. Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Suggested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-02-07MIPS: ath79: add support for QCN550xWenli Looi3-0/+8
Adds support for QCN550x, which appears to be very similar to QCA956x. Signed-off-by: Wenli Looi <wlooi@ucalgary.ca> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-02-07Merge branch 'v5.17/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/fixesArnd Bergmann7-20/+16
* 'v5.17/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: meson-sm1-odroid: fix boot loop after reboot arm64: dts: meson-g12: drop BL32 region from SEI510/SEI610 arm64: dts: meson-g12: add ATF BL32 reserved-memory region arm64: dts: meson-gx: add ATF BL32 reserved-memory region arm64: dts: meson-sm1-bananapi-m5: fix wrong GPIO domain for GPIOE_2 arm64: dts: meson-sm1-odroid: use correct enable-gpio pin for tf-io regulator arm64: dts: meson-g12b-odroid-n2: fix typo 'dio2133' Link: https://lore.kernel.org/r/67888f6a-f4ff-9569-131a-0c7baba6ddaf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-07Merge tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixesArnd Bergmann7-46/+63
Fixes for omaps A series of fixes for omap variants for minor issues, and a fix for a timer regression for some omap3 beagleboard versions. The timer fix needs to patch both the dts and the timer code because otherwise the timer quirk handling for old dtbs will prevent the dts fix from working. The other changes are for issues found by automated analysis, a macasp typo fix, and two cosmetic fixes for clocks. * tag 'omap-for-v5.17/fixes-for-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Don't use legacy clock defines for dra7 clkctrl clk: ti: Move dra7 clock devices out of the legacy section ARM: dts: Fix timer regression for beagleboard revision c ARM: dts: am335x-wega: Fix typo in mcasp property rx-num-evt ARM: OMAP2+: adjust the location of put_device() call in omapdss_init_of ARM: OMAP2+: hwmod: Add of_node_put() before break Link: https://lore.kernel.org/r/pull-1641801310-149268@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-07irqchip/apple-aic: Move PMU-specific registers to their own include fileMarc Zyngier1-0/+19
As we are about to have a PMU driver, move the PMU bits from the AIC driver into a common include file. Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-02-07arm64: dts: apple: Add t8303 PMU nodesMarc Zyngier1-0/+12
Advertise the two PMU nodes for the t8103 SoC. Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-02-07arm64: dts: apple: Add t8103 PMU interrupt affinitiesMarc Zyngier1-0/+12
The two PMU pseudo interrupts have specific affinities. One set is affine to the small cores, and the other set affine to the big ones. Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-02-07parisc: Add ioread64_lo_hi() and iowrite64_lo_hi()Andy Shevchenko1-0/+18
It's a followup to the previous commit f15309d7ad5d ("parisc: Add ioread64_hi_lo() and iowrite64_hi_lo()") which does only half of the job. Add the rest, so we won't get a new kernel test robot reports. Fixes: f15309d7ad5d ("parisc: Add ioread64_hi_lo() and iowrite64_hi_lo()") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Helge Deller <deller@gmx.de>
2022-02-07ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15Olivier Moysan1-1/+1
Replace sai2a-2 node name by sai2a-sleep-2, to avoid name duplication. Fixes: 1a9a9d226f0f ("ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: Enable DMA2D on STM32F469-DISCO boardDillon Min1-0/+4
Enable DMA2D on STM32F469-DISCO board. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: Add DMA2D support for STM32F429 series socDillon Min1-0/+10
Add DMA2D for STM32F429 series soc. Signed-off-by: Dillon Min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add sdmmc2 pins for STM32MP13Yann Gautier1-0/+51
Those pins are used for SDIO on STM32MP135F-DK board. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add SDMMC2 in STM32MP13 DTYann Gautier1-0/+14
STM32MP13 embeds 2 instances of SDMMC peripheral. Add the required information in SoC device tree file. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: update SDMMC version for STM32MP13Yann Gautier1-1/+1
On STM32MP13, the embedded SDMMC peripheral version is v2.2. Update arm,primecell-periphid for SDMMC in the SoC DT file. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DKYann Gautier1-1/+2
Add sleep properties in pinctrl config for SDMMC1. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add sdmmc sleep pins for STM32MP13Yann Gautier1-0/+11
The node sdmmc1_b4_sleep_pins_a is added in stm32mp13-pinctrl.dtsi file. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK boardYann Gautier1-2/+2
Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage clock slew-rate. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrlGerald Baeza1-13/+10
SDMMC1/2 CK <= 50 MHz so slew-rate = <1> A new node sdmmc1-clk-0 is added to manage the new clock pin slew-rate. Signed-off-by: Gerald Baeza <gerald.baeza@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13Yann Gautier1-1/+1
The max-frequency limitation is due to IOs. On STM32MP13, it is 130MHz. Update the corresponding property. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131Yann Gautier1-1/+1
To align with bootloaders device tree files, and thanks to what was added in yaml file [1], the compatible property for sdmmc1 node is updated with "st,stm32-sdmmc2" string. [1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2 compatible") Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151Yann Gautier1-3/+3
To align with bootloaders device tree files, and thanks to what was added in yaml file [1], the compatible property for sdmmc nodes is updated with "st,stm32-sdmmc2" string. [1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2 compatible") Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07powerpc/ftrace: Prepare ftrace_64_mprofile.S for reuse by PPC32Christophe Leroy1-22/+51
PPC64 mprofile versions and PPC32 are very similar. Modify PPC64 version so that if can be reused for PPC32. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/82a732915dc71ee766e31809350939331944006d.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: directly call of function graph tracer by ftrace callerChristophe Leroy4-114/+20
Modify function graph tracer to be handled directly by the standard ftrace caller. This is made possible as powerpc now supports CONFIG_DYNAMIC_FTRACE_WITH_ARGS. This change simplifies the call of function graph ftrace. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/04d196585ff81bde06a000bd9c633a33a5b21130.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Refactor ftrace_{en/dis}able_ftrace_graph_callerChristophe Leroy1-12/+9
ftrace_enable_ftrace_graph_caller() and ftrace_disable_ftrace_graph_caller() have common code. They will have even more common code after following patch. Refactor into a single ftrace_modify_ftrace_graph_caller() function. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/f37785a531f1a8f201e1b3da45997a5c77e9d820.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Implement CONFIG_DYNAMIC_FTRACE_WITH_ARGSChristophe Leroy3-3/+19
Implement CONFIG_DYNAMIC_FTRACE_WITH_ARGS. It accelerates the call of livepatching. Also note that powerpc being the last one to convert to CONFIG_DYNAMIC_FTRACE_WITH_ARGS, it will now be possible to remove klp_arch_set_pc() on all architectures. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/5831f711a778fcd6eb51eb5898f1faae4378b35b.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Prepare PPC64's ftrace_caller() for CONFIG_DYNAMIC_FTRACE_WITH_ARGSChristophe Leroy1-6/+19
In order to implement CONFIG_DYNAMIC_FTRACE_WITH_ARGS, change ftrace_caller() to handle LIVEPATCH the same way as frace_caller_regs(). Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/850817333cc76593699032e8e9a70d8c36e1af1e.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Prepare PPC32's ftrace_caller() for CONFIG_DYNAMIC_FTRACE_WITH_ARGSChristophe Leroy2-42/+26
In order to implement CONFIG_DYNAMIC_FTRACE_WITH_ARGS, change ftrace_caller() stack layout to match struct pt_regs. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/da9734eba504998fb914aca12131c9f6bf6120a8.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Simplify PPC32's return_to_handler()Christophe Leroy1-10/+6
return_to_handler() was copied from PPC64. For PPC32 it just needs to save r3 and r4, and doesn't require any nop after the bl. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/aab39b77b34fb2c4ed08ed01c547b6ed13643788.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Don't save again LR in ftrace_regs_caller() on PPC32Christophe Leroy1-3/+0
PPC32 mcount() caller already saves LR on stack, no need to save it again. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/eadcfc770b4f1e35535ffb85e28e858a2c31dec4.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/ftrace: Add support for livepatch to PPC32Christophe Leroy4-6/+12
PPC64 needs some special logic to properly set up the TOC. See commit 85baa095497f ("powerpc/livepatch: Add live patching support on ppc64le") for details. PPC32 doesn't have TOC so it doesn't need that logic, so adding LIVEPATCH support is straight forward. Add CONFIG_LIVEPATCH_64 and move livepatch stack logic into that item. Livepatch sample modules all work. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/63cb094125b6a6038c65eeac2abaabbabe63addd.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/module_32: Fix livepatching for RO modulesChristophe Leroy1-14/+30
Livepatching a loaded module involves applying relocations through apply_relocate_add(), which attempts to write to read-only memory when CONFIG_STRICT_MODULE_RWX=y. R_PPC_ADDR16_LO, R_PPC_ADDR16_HI, R_PPC_ADDR16_HA and R_PPC_REL24 are the types generated by the kpatch-build userspace tool or klp-convert kernel tree observed applying a relocation to a post-init module. Use patch_instruction() to patch those relocations. Commit 8734b41b3efe ("powerpc/module_64: Fix livepatching for RO modules") did similar change in module_64. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Joe Lawrence <joe.lawrence@redhat.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/d5697157cb7dba3927e19aa17c915a83bc550bb2.1640017960.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/32: Remove _ENTRY() macroChristophe Leroy6-24/+20
_ENTRY() is now redundant with _GLOBAL(). Remove it. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/62a35f8dde2bb74c8d0d7a5430cce07a5a3a6fb6.1638273868.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/32: Remove remaining .stabs annotationsChristophe Leroy4-10/+0
STABS debug format has been superseded long time ago by DWARF. Remove the few remaining .stabs annotations from old 32 bits code. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/68932ec2ba6b868d35006b96e90f0890f3da3c05.1638273868.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/corenet: Change criteria to set MPIC_ENABLE_COREINTChristophe Leroy2-4/+2
Don't use ppc_md function comparison. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/c8ef82ee5f2713f4c36eb5d2d49b0905c7472801.1630667612.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/mpc86xx_hpcn: Remove obsolete statementChristophe Leroy1-6/+0
Comment says "Delete this in 2.6.27". Do so now. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/a47bb6a69c68156bc2d555152dab5a23733856b7.1630667612.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/machdep: Move sys_ctrler_t definition into pmac_feature.hChristophe Leroy3-15/+14
sys_ctrler_t definitions are tied to pmac. Move it into pmac_feature.h Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> [mpe: Move to pmac_feature.h to fix some build errors] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/7dd5ead4bbca749e2da089ff6fe2b1878d6bf40e.1630667612.git.christophe.leroy@csgroup.eu
2022-02-07ARM: socfpga: fix missing RESET_CONTROLLERKrzysztof Kozlowski1-0/+2
The SocFPGA machine since commit b3ca9888f35f ("reset: socfpga: add an early reset driver for SoCFPGA") uses reset controller, so it should select RESET_CONTROLLER explicitly. Selecting ARCH_HAS_RESET_CONTROLLER is not enough because it affects only default choice still allowing a non-buildable configuration: /usr/bin/arm-linux-gnueabi-ld: arch/arm/mach-socfpga/socfpga.o: in function `socfpga_init_irq': arch/arm/mach-socfpga/socfpga.c:56: undefined reference to `socfpga_reset_init' Reported-by: kernel test robot <lkp@intel.com> Cc: <stable@vger.kernel.org> Fixes: b3ca9888f35f ("reset: socfpga: add an early reset driver for SoCFPGA") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-07ARM: dts: stm32: Drop duplicate status okay from DHCOM gpioc nodeMarek Vasut1-1/+0
The stm32mp15xxaa-pinctrl.dtsi included in stm32mp15xx-dhcom-som.dtsi already sets status = "okay" in gpioc: gpio@50004000 node, drop the duplicate from stm32mp15xx-dhcom-som.dtsi . No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: kernel@dh-electronics.com Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: Add support for the emtrion emSBC-ArgonReinhold Mueller4-0/+698
This patch presents the DT patches for the emtrion GmbH Argon board series. They are available with STM32MP157 from STMicroelectronics with 512 MByte Memory. The devicetree stm32mp157c-emstamp-argon.dtsi is the common part providing the module components and the basic support for the SoC. The support for the emSBC-Argon baseboard in the developer-kit configuration is provided by the stm32mp157c-emsbc-argon.dts file. Signed-off-by: Reinhold Mueller <reinhold.mueller@emtrion.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: sun8i-h3: Drop args in 'thermal-sensors'Rob Herring1-1/+1
The "allwinner,sun8i-h3-ths" thermal sensor has 0 argument cells, but the consumer has an argument cell. It is ignored by the code, but the error was found with some upcoming schema validation changes. The schema and code both agree that 0 cells is correct. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220204002802.1214602-1-robh@kernel.org
2022-02-07ARM: dts: sun8i: v3s: Move the csi1 block to follow address orderPaul Kocialkowski1-11/+11
The csi1 block node was mistakenly added before the gic node, although its address comes after the gic's. Move the node to its correct position. Fixes: 90e048101fa1 ("ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node") Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220205185429.2278860-2-paul.kocialkowski@bootlin.com
2022-02-07ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f4 seriesFabrice Gasnier4-7/+36
Remove the following warnings seen when building with W=1. Warning (unique_unit_address): /soc/timer@40000c00: duplicate unit-address (also used in node /soc/timers@40000c00) This approach is based on some discussions[1], to restructure the dtsi and dts files. Timer5 is enabled by default on stm32f4 series, to act as clockevent. In order to get rid of the W=1 warning, and be compliant with dt-schemas (e.g. dtbs_check): - In stm32f429.dtsi: . Keep the more complete timers5 description . Remove the most simple timer5 node that is duplicate - In each board: . adopt "st,stm32-timer" compatible for timers5, also add the interrupt . use /delete-property/ and /delete-node/ so the it matches the clockevent bindings Note: all this is done in one shot (e.g. not split) to keep clockevent functionality. [1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/ Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07ARM: dts: stm32: remove some timer duplicate unit-address on stm32f4 seriesFabrice Gasnier1-40/+0
Several unused "timer" are duplicate nodes of "timers" nodes. There are two dt-schemas: - timer/st,stm32-timer.yaml: A timer is needed on STM32F4 series, on all boards, to act as clockevent. - mfd/st,stm32-timers.yaml: Timers can be used for other purpose. By default, timer5 is left enabled to be used as clockevent. Remove all other timer clockevent nodes that are currently unused and duplicated. This removes several messages: Warning (unique_unit_address): /soc/timer@.. duplicate unit-address (also used in node /soc/timers@...) Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-02-07powerpc/603: Fix boot failure with DEBUG_PAGEALLOC and KFENCEChristophe Leroy1-2/+2
Allthough kernel text is always mapped with BATs, we still have inittext mapped with pages, so TLB miss handling is required when CONFIG_DEBUG_PAGEALLOC or CONFIG_KFENCE is set. The final solution should be to set a BAT that also maps inittext but that BAT then needs to be cleared at end of init, and it will require more changes to be able to do it properly. As DEBUG_PAGEALLOC or KFENCE are debugging, performance is not a big deal so let's fix it simply for now to enable easy stable application. Fixes: 035b19a15a98 ("powerpc/32s: Always map kernel text and rodata with BATs") Cc: stable@vger.kernel.org # v5.11+ Reported-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/aea33b4813a26bdb9378b5f273f00bd5d4abe240.1638857364.git.christophe.leroy@csgroup.eu
2022-02-07powerpc/machdep: Remove CONFIG_PPC_HAS_FEATURE_CALLSChristophe Leroy1-5/+0
Last user was removed by commit 7bbd827750e6 ("[PATCH] ppc64: very basic desktop g5 sound support"). Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/803779fffb4ee0801746b2173d37cea3b273f821.1630667612.git.christophe.leroy@csgroup.eu
2022-02-07powerpc: Set crashkernel offset to mid of RMA regionSourabh Jain2-4/+17
On large config LPARs (having 192 and more cores), Linux fails to boot due to insufficient memory in the first memblock. It is due to the memory reservation for the crash kernel which starts at 128MB offset of the first memblock. This memory reservation for the crash kernel doesn't leave enough space in the first memblock to accommodate other essential system resources. The crash kernel start address was set to 128MB offset by default to ensure that the crash kernel get some memory below the RMA region which is used to be of size 256MB. But given that the RMA region size can be 512MB or more, setting the crash kernel offset to mid of RMA size will leave enough space for the kernel to allocate memory for other system resources. Since the above crash kernel offset change is only applicable to the LPAR platform, the LPAR feature detection is pushed before the crash kernel reservation. The rest of LPAR specific initialization will still be done during pseries_probe_fw_features as usual. This patch is dependent on changes to paca allocation for boot CPU. It expect boot CPU to discover 1T segment support which is introduced by the patch posted here: https://lists.ozlabs.org/pipermail/linuxppc-dev/2022-January/239175.html Reported-by: Abdul haleem <abdhalee@linux.vnet.ibm.com> Signed-off-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20220204085601.107257-1-sourabhjain@linux.ibm.com
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