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2021-12-23powerpc/ps3: Add __init attribute to eligible functionsNick Child7-24/+24
Some functions defined in 'arch/powerpc/platforms/ps3' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-14-nick.child@ibm.com
2021-12-23powerpc/pseries: Add __init attribute to eligible functionsNick Child11-18/+18
Some functions defined in 'arch/powerpc/platforms/pseries' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-13-nick.child@ibm.com
2021-12-23powerpc/powernv: Add __init attribute to eligible functionsNick Child15-28/+28
Some functions defined in 'arch/powerpc/platforms/powernv' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-12-nick.child@ibm.com
2021-12-23powerpc/powermac: Add __init attribute to eligible functionsNick Child8-11/+11
Some functions defined in 'arch/powerpc/platforms/powermac` are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-11-nick.child@ibm.com
2021-12-23powerpc/pasemi: Add __init attribute to eligible functionsNick Child5-5/+5
Some functions defined in 'arch/powerpc/platforms/pasemi' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-10-nick.child@ibm.com
2021-12-23powerpc/chrp: Add __init attribute to eligible functionsNick Child1-1/+1
The function `Enable_SRAM` defined in 'arch/powerpc/platforms/chrp' is deserving of an `__init` macro attribute. This function is only called by other initialization functions and therefore should inherit the attribute. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-9-nick.child@ibm.com
2021-12-23powerpc/cell: Add __init attribute to eligible functionsNick Child5-20/+20
Some functions defined in 'arch/powerpc/platforms/cell' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-8-nick.child@ibm.com
2021-12-23powerpc/xmon: Add __init attribute to eligible functionsNick Child2-2/+2
`xmon_register_spus` defined in 'arch/powerpc/xmon' is deserving of an `__init` macro attribute. This functions is only called by other initialization functions and therefore should inherit the attribute. Also, change the function declaration in the header file to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-7-nick.child@ibm.com
2021-12-23powerpc/sysdev: Add __init attribute to eligible functionsNick Child24-40/+40
Some files functions in 'arch/powerpc/sysdev' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-6-nick.child@ibm.com
2021-12-23powerpc/perf: Add __init attribute to eligible functionsNick Child12-20/+20
Some functions defined in 'arch/powerpc/perf' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-5-nick.child@ibm.com
2021-12-23powerpc/mm: Add __init attribute to eligible functionsNick Child13-20/+20
Some functions defined in 'arch/powerpc/mm' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-4-nick.child@ibm.com
2021-12-23powerpc/lib: Add __init attribute to eligible functionsNick Child3-15/+15
Some functions defined in 'arch/powerpc/lib' are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-3-nick.child@ibm.com
2021-12-23powerpc/kernel: Add __init attribute to eligible functionsNick Child24-68/+69
Some functions defined in `arch/powerpc/kernel` (and one in `arch/powerpc/ kexec`) are deserving of an `__init` macro attribute. These functions are only called by other initialization functions and therefore should inherit the attribute. Also, change function declarations in header files to include `__init`. Signed-off-by: Nick Child <nick.child@ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211216220035.605465-2-nick.child@ibm.com
2021-12-23x86/boot/compressed: Move CLANG_FLAGS to beginning of KBUILD_CFLAGSNathan Chancellor1-2/+5
When cross compiling i386_defconfig on an arm64 host with clang, there are a few instances of '-Waddress-of-packed-member' and '-Wgnu-variable-sized-type-not-at-end' in arch/x86/boot/compressed/, which should both be disabled with the cc-disable-warning calls in that directory's Makefile, which indicates that cc-disable-warning is failing at the point of testing these flags. The cc-disable-warning calls fail because at the point that the flags are tested, KBUILD_CFLAGS has '-march=i386' without $(CLANG_FLAGS), which has the '--target=' flag to tell clang what architecture it is targeting. Without the '--target=' flag, the host architecture (arm64) is used and i386 is not a valid value for '-march=' in that case. This error can be seen by adding some logging to try-run: clang-14: error: the clang compiler does not support '-march=i386' Invoking the compiler has to succeed prior to calling cc-option or cc-disable-warning in order to accurately test whether or not the flag is supported; if it doesn't, the requested flag can never be added to the compiler flags. Move $(CLANG_FLAGS) to the beginning of KBUILD_FLAGS so that any new flags that might be added in the future can be accurately tested. Fixes: d5cbd80e302d ("x86/boot: Add $(CLANG_FLAGS) to compressed KBUILD_CFLAGS") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211222163040.1961481-1-nathan@kernel.org
2021-12-23Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"Arnd Bergmann1-77/+0
This reverts commit 3d2d52a0d1835b56f6bd67d268f6c39df0e41692, it caused a build regression: arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:109.4-14: Warning (reg_format): /switch/ports:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format' arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #address-cells value arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts:106.9-149.5: Warning (avoid_default_addr_size): /switch/ports: Relying on default #size-cells value Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22um: virtio_uml: Allow probing from devicetreeVincent Whitchurch1-3/+47
Allow the virtio_uml device to be probed from the devicetree so that sub-devices can be specified using the standard virtio bindings, for example: virtio@1 { compatible = "virtio,uml"; socket-path = "i2c.sock"; virtio-device-id = <0x22>; i2c-controller { compatible = "virtio,device22"; #address-cells = <0x01>; #size-cells = <0x00>; light-sensor@01 { compatible = "ti,opt3001"; reg = <0x01>; }; }; }; Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-22um: Add devicetree supportVincent Whitchurch5-0/+52
Add a dtb=<filename> option to boot UML with a devicetree blob. This can be used for testing driver code using UML. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> [rw: Add dependency on CONFIG_OF] Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-22um: Extract load file helper from initrd.cVincent Whitchurch4-43/+75
The file loading support in initrd.c can be re-used for loading devicetrees. Move it out of initrd.c. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-22x86/mtrr: Remove the mtrr_bp_init() stubChristoph Hellwig3-8/+8
Add an IS_ENABLED() check in setup_arch() and call pat_disable() directly if MTRRs are not supported. This allows to remove the <asm/memtype.h> include in <asm/mtrr.h>, which pull in lowlevel x86 headers that should not be included for UML builds and will cause build warnings with a following patch. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211215165612.554426-2-hch@lst.de
2021-12-22Merge tag 'for-5.16/parisc-7' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linuxLinus Torvalds4-8/+5
Pull parisc architecture fixes from Helge Deller: - Fix a bug in the C code which calculates the relevant futex spinlock based on the futex virtual address. In some cases a wrong spinlock (compared to what is calculated in the assembly code path) was choosen which then can lead to deadlocks. - The 64-bit kernel missed to clip the LWS number in the Light-weight-syscall path for 32-bit processes. - Prevent CPU register dump to show stale value in IIR register on access rights traps. - Remove unused ARCH_DEFCONFIG entries. * tag 'for-5.16/parisc-7' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: remove ARCH_DEFCONFIG parisc: Fix mask used to select futex spinlock parisc: Correct completer in lws start parisc: Clear stale IIR value on instruction access rights trap
2021-12-22um: remove set_fsChristoph Hellwig5-40/+19
Remove address space overrides using set_fs() for User Mode Linux. Note that just like the existing kernel access case of the uaccess routines the new nofault kernel handlers do not actually have any exception handling. This is probably broken, but not change to the status quo. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-22Merge tag 'aspeed-5.17-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dtArnd Bergmann16-2/+2498
ASPEED device tree updates for 5.17 - New machines: * TYAN S8036 AST2500 BMC * Facebook Bletchley AST2600 BMC * Yadro VEGMAN series of AST2500 BMC for x86 servers - LPC clock additions, to fix long standing missed irq on boot issue - Secure boot controller description for AST2600 - Alternate chip flash layout, used by Bytedance's G220A - Various additions to Rainier, Everest, S7106 * tag 'aspeed-5.17-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: aspeed: add device tree for YADRO VEGMAN BMC dt-bindings: vendor-prefixes: add YADRO ARM: dts: aspeed: mtjade: Add uefi partition ARM: dts: aspeed: mtjade: Add I2C buses for NVMe devices ARM: dts: aspeed: tyan-s7106: Update nct7802 config Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank type enumerationYazen Ghannam2-41/+36
AMD systems currently lay out MCA bank types such that the type of bank number "i" is either the same across all CPUs or is Reserved/Read-as-Zero. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS CS 3 SMU RAZ Future AMD systems will lay out MCA bank types such that the type of bank number "i" may be different across CPUs. For example: Bank # | CPUx | CPUy 0 LS LS 1 RAZ UMC 2 CS NBIO 3 SMU RAZ Change the structures that cache MCA bank types to be per-CPU and update smca_get_bank_type() to handle this change. Move some SMCA-specific structures to amd.c from mce.h, since they no longer need to be global. Break out the "count" for bank types from struct smca_hwid, since this should provide a per-CPU count rather than a system-wide count. Apply the "const" qualifier to the struct smca_hwid_mcatypes array. The values in this array should not change at runtime. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211216162905.4132657-3-yazen.ghannam@amd.com
2021-12-22x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank typesYazen Ghannam2-5/+23
Add HWID and McaType values for new SMCA bank types, and add their error descriptions to edac_mce_amd. The "PHY" bank types all have the same error descriptions, and the NBIF and SHUB bank types have the same error descriptions. So reuse the same arrays where appropriate. [ bp: Remove useless comments over hwid types. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211216162905.4132657-2-yazen.ghannam@amd.com
2021-12-22Merge tag 'arm-soc/for-5.17/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann2-0/+51
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.17, please pull the following: - Rafal adds and documents the Netgear RAXE500 Wireless router based on the BCM4908 SoC. * tag 'arm-soc/for-5.17/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500 dt-bindings: arm: bcm: document Netgear RAXE500 binding Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22Merge tag 'arm-soc/for-5.17/devicetree' of https://github.com/Broadcom/stblinux into arm/dtArnd Bergmann8-78/+157
This pull request contains Broadcom ARM-based SocS Device Tree changes for v5.17, please pull the following: - Matthew enables the QCA8337 switch of the Merak MX65 to have the appropriate PLL properties for it to be enabled and set the SGMII transmit clock to falling edge. - Arinc removes unnecessary properties of the GPIO keyboard Device Tree node, adds the external Realtek RTM8365MB switch on the Ausus RT-AC88U, including fixing the RX delay on the Realtek switch side and enabling flow control on the Broadcom internal switch port connecting to the Realtek switch. - Christian updates the Meraki MR32 Device Tree node to make use of the hardware I2C controller instead of bitbanging - Rafal updates the BCM5310X Device Tree files to have the CRU node not generate warnings, updates the USB 2.0 PHY to use the non-deprecated binding - Uwe adds GPIO offset to the gpio names properties for readability - Stefan updates the BCM2835 VCHIQ Device Tree binding to YAML - Florian fixes the iProc PCIe Device Tree nodes in Cygnus, Hurricane 2 and Northstar Plus to be compliant with the iProc PCIe YAML binding (merged in RobH's tree) as well as the SATA controller node unit name. * tag 'arm-soc/for-5.17/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: correct RX delay and enable flow control on Asus RT-AC88U ARM: dts: NSP: Rename SATA unit name ARM: dts: NSP: Fixed iProc PCIe MSI sub-node ARM: dts: HR2: Fixed iProc PCIe MSI sub-node ARM: dts: Cygnus: Update PCIe PHY node unit name(s) ARM: dts: Cygnus: Fixed iProc PCIe controller properties dt-bindings: soc: bcm: Convert brcm,bcm2835-vchiq to json-schema ARM: dts: bcm2711-rpi-4-b: Add gpio offsets to line name array ARM: dts: BCM5301X: use non-deprecated USB 2.0 PHY binding ARM: dts: BCM5301X: update CRU block description ARM: BCM53016: MR32: convert to Broadcom iProc I2C Driver ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U ARM: dts: BCM5301X: remove unnecessary address & size cells from Asus RT-AC88U ARM: dts: NSP: MX65: add qca8k falling-edge, PLL properties
2021-12-22Merge tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dtArnd Bergmann79-111/+5823
Qualcomm ARM64 DeviceTree updates for v5.17 This introduces initial support for the brand new Snapdragon 8 Gen 1, aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses, TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and USB currently supported. SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are described as thermal zones. OnePlus devices gains msm-id and board-id, to facilitate a single firmware image for the multiple devices. On SM8350 the Sony Xperia 1 III and 5 III, as well as initial description of Microsoft's Surface Duo 2 are introduced. On the platform side, LLCC, QUP nodes, redistributor stride and all the low-speed QUPs are added MSM8996 gained various regulator fixes, and adsp firmware name to faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained touchkey controller definition. On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and regulator definitions, USB, eMMC and SD-card and a simple-framebuffer description. MSM8916 has the mmc aliases corrected, to stop the storage devices to move around and the RPM sleep stats memory is described. Support for the Samsung J5 2015 smartphone is introduced. SM6350 validation errors are fixed and and description of the audio, compute and modem remoteprocs are added. A couple new revisions of the SC7180 based Google devices are added. The SC7280 platform gains venus and a few fixes. The CRD development device is introduced, with the EC, touchscreen and touchpad. On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based on CPU frequency, are added. As is TX, RX macros and SoundWire blocks and used to enable audio on the SM8350 MTP. * tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits) arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes arm64: dts: qcom: sm8450: add cpufreq support arm64: dts: qcom: sm8450: Add rpmhpd node arm64: dts: qcom: sm8450-qrd: enable ufs nodes arm64: dts: qcom: sm8450: add ufs nodes arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes arm64: dts: qcom: Add base SM8450 QRD DTS arm64: dts: qcom: sm8450: add smmu nodes arm64: dts: qcom: sm8450: Add reserved memory nodes arm64: dts: qcom: sm8450: Add tlmm nodes arm64: dts: qcom: Add base SM8450 DTSI arm64: dts: qcom: ipq6018: Fix gpio-ranges property arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node arm64: qcom: dts: drop legacy property #stream-id-cells Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer" ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22arm64: errata: Fix exec handling in erratum 1418040 workaroundD Scott Phillips1-23/+16
The erratum 1418040 workaround enables CNTVCT_EL1 access trapping in EL0 when executing compat threads. The workaround is applied when switching between tasks, but the need for the workaround could also change at an exec(), when a non-compat task execs a compat binary or vice versa. Apply the workaround in arch_setup_new_exec(). This leaves a small window of time between SET_PERSONALITY and arch_setup_new_exec where preemption could occur and confuse the old workaround logic that compares TIF_32BIT between prev and next. Instead, we can just read cntkctl to make sure it's in the state that the next task needs. I measured cntkctl read time to be about the same as a mov from a general-purpose register on N1. Update the workaround logic to examine the current value of cntkctl instead of the previous task's compat state. Fixes: d49f7d7376d0 ("arm64: Move handling of erratum 1418040 into C code") Cc: <stable@vger.kernel.org> # 5.9.x Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211220234114.3926-1-scott@os.amperecomputing.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCXBjorn Andersson1-2/+2
The SM6125_VDDCX constant is introduced through a separate branch and is not available in the dts branch. Temporarily replace the constant with it's value to avoid the build breakage. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-12-22arm64: Unhash early pointer print plus improve commentGuilherme G. Piccoli1-1/+6
When facing a really early issue on DT parsing we have currently a message that shows both the physical and virtual address of the FDT. The printk pointer modifier for the virtual address shows a hashed address there unless the user provides "no_hash_pointers" parameter in the command-line. The situation in which this message shows-up is a bit more serious though: the boot process is broken, nothing can be done (even an oops is too much for this early stage) so we have this message as a last resort in order to help debug bootloader issues, for example. Hence, we hereby change that to "%px" in order to make debugging easy, there's not much information leak risk in such early boot failure. Also, we tried to improve a bit the commenting on that function, given that if kernel fails there, it just hangs forever in a cpu_relax() loop. The reason we cannot BUG/panic is that is too early to do so; thanks to Mark Brown for pointing that on IRC and thanks Robin Murphy for the good pointer hash discussion in the mailing-list. Cc: Mark Brown <broonie@kernel.org> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20211221155230.1532850-1-gpiccoli@igalia.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22x86/mm: Prevent early boot triple-faults with instrumentationBorislav Petkov2-3/+15
Commit in Fixes added a global TLB flush on the early boot path, after the kernel switches off of the trampoline page table. Compiler profiling options enabled with GCOV_PROFILE add additional measurement code on clang which needs to be initialized prior to use. The global flush in x86_64_start_kernel() happens before those initializations can happen, leading to accessing invalid memory. GCOV_PROFILE builds with gcc are still ok so this is clang-specific. The second issue this fixes is with KASAN: for a similar reason, kasan_early_init() needs to have happened before KASAN-instrumented functions are called. Therefore, reorder the flush to happen after the KASAN early init and prevent the compilers from adding profiling instrumentation to native_write_cr4(). Fixes: f154f290855b ("x86/mm/64: Flush global TLB on boot and AP bringup") Reported-by: "J. Bruce Fields" <bfields@fieldses.org> Reported-by: kernel test robot <oliver.sang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Carel Si <beibei.si@intel.com> Tested-by: "J. Bruce Fields" <bfields@fieldses.org> Link: https://lore.kernel.org/r/20211209144141.GC25654@xsang-OptiPlex-9020
2021-12-22asm-generic: introduce io_stop_wc() and add implementation for ARM64Xiongfeng Wang1-0/+9
For memory accesses with write-combining attributes (e.g. those returned by ioremap_wc()), the CPU may wait for prior accesses to be merged with subsequent ones. But in some situation, such wait is bad for the performance. We introduce io_stop_wc() to prevent the merging of write-combining memory accesses before this macro with those after it. We add implementation for ARM64 using DGH instruction and provide NOP implementation for other architectures. Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Suggested-by: Will Deacon <will@kernel.org> Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20211221035556.60346-1-wangxiongfeng2@huawei.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2021-12-22parisc: remove ARCH_DEFCONFIGMasahiro Yamada1-5/+0
Commit 2a86f6612164 ("kbuild: use KBUILD_DEFCONFIG as the fallback for DEFCONFIG_LIST") removed ARCH_DEFCONFIG because it does not make much sense. In the same development cycle, Commit ededa081ed20 ("parisc: Fix defconfig selection") added ARCH_DEFCONFIG for parisc. Please use KBUILD_DEFCONFIG in arch/*/Makefile for defconfig selection. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Helge Deller <deller@gmx.de> Signed-off-by: Helge Deller <deller@gmx.de>
2021-12-22arm64: defconfig: Enable USB controller drivers for TI K3 SoCVignesh Raghavendra1-0/+7
Enable Cadence USB, TI USB and required SERDES drivers to support USB on TI K3 SoCs. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/r/20211221152140.15151-1-vigneshr@ti.com
2021-12-22ARM: dts: Don't use legacy clock defines for dra7 clkctrlTony Lindgren1-10/+10
Looks like we are still using legacy clock defines for dra7. We want to stop using these as it prevents dropping the legacy clocks. Note that this is just a cosmetic fix. Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-21um: Use swap() to make code cleanerYang Guang1-4/+3
Use the macro 'swap()' defined in 'include/linux/minmax.h' to avoid opencoding it. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Yang Guang <yang.guang5@zte.com.cn> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - sigio.hAl Viro1-1/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - os.hAl Viro1-13/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - net_*.hAl Viro2-3/+0
externs dead since before the initial merge Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - mem_user.hAl Viro1-5/+0
get_vm(), add_iomem(), phys_offset() dead since 2004; init_mem_user() and setup_memory() - since before the initial merge. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: header debriding - activate_ipi()Al Viro1-1/+0
... had been dead for 15 years. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: common-offsets.h debriding...Al Viro1-12/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um, x86: bury crypto_tfm_ctx_offsetAl Viro2-6/+0
unused since 2011 Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: unexport handle_page_fault()Al Viro1-1/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: remove a dangling extern of syscall_trace()Al Viro1-1/+0
the function had been gone since 2012... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: kill unused cpu()Al Viro2-6/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21uml/i386: missing include in barrier.hAl Viro1-0/+1
we need cpufeatures.h there Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: stop polluting the namespace with registers.h contentsAl Viro9-3/+8
Only one extern in there is needed in processor-generic.h, and it's not needed anywhere else. So move it over there and get rid of the include in processor-generic.h, adding includes of registers.h to the few files that need the declarations in it. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21um: move amd64 variant of mmap(2) to arch/x86/um/syscalls_64.cAl Viro5-35/+11
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
2021-12-21uml: trim unused junk from arch/x86/um/sys_call_table_*.cAl Viro2-18/+0
a bunch of detritus there - definitions that are never expanded or checked. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Richard Weinberger <richard@nod.at>
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