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Jason A. Donenfeld
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path:
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/
drivers
/
clk
/
at91
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Author
Files
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2021-10-26
clk: at91: clk-master: improve readability by using local variables
Claudiu Beznea
1
-3
/
+3
2021-10-26
clk: at91: clk-master: add register definition for sama7g5's master clock
Claudiu Beznea
1
-27
/
+23
2021-10-26
clk: at91: sama7g5: add securam's peripheral clock
Claudiu Beznea
1
-0
/
+1
2021-10-26
clk: at91: pmc: execute suspend/resume only for backup mode
Claudiu Beznea
1
-0
/
+39
2021-10-26
clk: at91: re-factor clocks suspend/resume
Claudiu Beznea
12
-181
/
+558
2021-10-07
clk: at91: check pmc node status before registering syscore ops
Clément Léger
1
-0
/
+5
2021-09-01
Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next
Stephen Boyd
1
-7
/
+7
2021-08-28
clk: at91: clk-generated: Limit the requested rate to our range
Codrin Ciubotariu
1
-0
/
+6
2021-08-28
clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings
Randy Dunlap
1
-7
/
+7
2021-03-13
clk: at91: Trivial typo fixes in the file sama7g5.c
Bhaskar Chowdhury
1
-3
/
+3
2021-02-09
clk: at91: Fix the declaration of the clocks
Tudor Ambarus
9
-28
/
+28
2020-12-19
clk: at91: sam9x60: remove atmel,osc-bypass support
Alexandre Belloni
1
-5
/
+1
2020-12-19
clk: at91: sama7g5: register cpu clock
Claudiu Beznea
1
-7
/
+6
2020-12-19
clk: at91: clk-master: re-factor master clock
Claudiu Beznea
14
-146
/
+542
2020-12-19
clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz
Claudiu Beznea
1
-14
/
+47
2020-12-19
clk: at91: sama7g5: decrease lower limit for MCK0 rate
Claudiu Beznea
1
-1
/
+1
2020-12-19
clk: at91: sama7g5: remove mck0 from parent list of other clocks
Claudiu Beznea
1
-29
/
+26
2020-12-19
clk: at91: clk-sam9x60-pll: allow runtime changes for pll
Claudiu Beznea
4
-41
/
+197
2020-12-19
clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
Eugen Hristev
1
-2
/
+2
2020-12-19
clk: at91: clk-master: add 5th divisor for mck master
Eugen Hristev
2
-2
/
+2
2020-12-19
clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT
Eugen Hristev
1
-2
/
+4
2020-12-19
dt-bindings: clock: at91: add sama7g5 pll defines
Eugen Hristev
1
-3
/
+3
2020-12-19
clk: at91: sama7g5: fix compilation error
Claudiu Beznea
1
-2
/
+4
2020-10-20
Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next
Stephen Boyd
4
-8
/
+12
2020-10-14
clk: at91: sam9x60: support only two programmable clocks
Claudiu Beznea
1
-1
/
+1
2020-10-13
clk: at91: clk-sam9x60-pll: remove unused variable
Claudiu Beznea
1
-2
/
+1
2020-10-13
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
Claudiu Beznea
1
-3
/
+8
2020-10-13
clk: at91: remove the checking of parent_name
Claudiu Beznea
1
-2
/
+2
2020-09-22
clk: at91: drop unused at91sam9g45_pcr_layout
Krzysztof Kozlowski
1
-7
/
+0
2020-07-24
clk: at91: sama7g5: add clock support for sama7g5
Claudiu Beznea
2
-0
/
+1060
2020-07-24
clk: at91: clk-utmi: add utmi support for sama7g5
Claudiu Beznea
2
-5
/
+102
2020-07-24
clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs
Claudiu Beznea
3
-186
/
+433
2020-07-24
clk: at91: clk-programmable: add mux_table option
Claudiu Beznea
13
-17
/
+38
2020-07-24
clk: at91: clk-peripheral: add support for changeable parent rate
Claudiu Beznea
9
-16
/
+119
2020-07-24
clk: at91: clk-master: add master clock support for SAMA7G5
Claudiu Beznea
2
-5
/
+312
2020-07-24
clk: at91: clk-generated: add mux_table option
Claudiu Beznea
5
-8
/
+16
2020-07-24
clk: at91: clk-generated: pass the id of changeable parent at registration
Claudiu Beznea
5
-35
/
+37
2020-07-24
clk: at91: replace conditional operator with double logical not
Claudiu Beznea
5
-8
/
+8
2020-07-24
clk: at91: sckc: register slow_rc with accuracy option
Claudiu Beznea
1
-2
/
+3
2020-07-24
clk: at91: sam9x60: fix main rc oscillator frequency
Claudiu Beznea
1
-1
/
+1
2020-07-24
clk: at91: sam9x60-pll: use frac when setting frequency
Claudiu Beznea
1
-4
/
+8
2020-07-24
clk: at91: sam9x60-pll: check fcore against ranges
Claudiu Beznea
2
-2
/
+12
2020-07-24
clk: at91: sam9x60-pll: use logical or for range check
Claudiu Beznea
1
-1
/
+1
2020-07-24
clk: at91: clk-sam9x60-pll: fix mul mask
Claudiu Beznea
1
-1
/
+1
2020-07-24
clk: at91: clk-generated: check best_rate against ranges
Claudiu Beznea
1
-2
/
+2
2020-07-24
clk: at91: clk-generated: continue if __clk_determine_rate() returns error
Claudiu Beznea
1
-1
/
+2
2020-07-24
clk: at91: fix possible dead lock in new drivers
Ahmad Fatoum
4
-4
/
+4
2020-05-26
clk: at91: allow setting all PMC clock parents via DT
Michał Mirosław
10
-10
/
+38
2020-05-26
clk: at91: allow setting PCKx parent via DT
Michał Mirosław
12
-13
/
+45
2020-05-26
clk: at91: optimize pmc data allocation
Michał Mirosław
12
-37
/
+20
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