linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2019-11-26	clk: aspeed: Add RMII RCLK gates for both AST2500 MACs	Andrew Jeffery	1	-1/+26
2019-09-06	clk: aspeed: Move structures to header	Joel Stanley	1	-64/+3
2019-08-07	clk: aspeed: Add SDIO gate	Joel Stanley	1	-3/+8
2019-04-18	clk: Aspeed: Setup video engine clocking	Eddie James	1	-3/+39
2018-08-15	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-1/+1
2018-07-11	clk: aspeed: Support HPLL strapping on ast2400	Joel Stanley	1	-13/+29
2018-07-06	clk: aspeed: Fix SDCLK name	Lei YU	1	-1/+1
2018-07-06	clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical	Joel Stanley	1	-2/+2
2018-07-06	clk: aspeed: Treat a gate in reset as disabled	Benjamin Herrenschmidt	1	-0/+13
2018-06-09	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-11/+46
2018-06-06	treewide: Use struct_size() for kmalloc()-family	Kees Cook	1	-3/+3
2018-06-04	Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-next	Stephen Boyd	1	-1/+8
2018-06-01	clk: aspeed: Add 24MHz fixed clock	Lei YU	1	-1/+8
2018-05-15	clk:aspeed: Fix reset bits for PCI/VGA and PECI	Jae Hyun Yoo	1	-2/+2
2018-05-15	clk: aspeed: Support second reset register	Joel Stanley	1	-8/+36
2018-03-15	clk: aspeed: Prevent reset if clock is enabled	Eddie James	1	-12/+17
2018-03-15	clk: aspeed: Fix is_enabled for certain clocks	Eddie James	1	-1/+2
2018-01-26	clk: aspeed: Handle inverse polarity of USB port 1 clock gate	Benjamin Herrenschmidt	1	-3/+12
2018-01-26	clk: aspeed: Fix return value check in aspeed_cc_init()	Wei Yongjun	1	-1/+1
2018-01-26	clk: aspeed: Add reset controller	Joel Stanley	1	-1/+81
2018-01-26	clk: aspeed: Register gated clocks	Joel Stanley	1	-0/+130
2018-01-26	clk: aspeed: Add platform driver and register PLLs	Joel Stanley	1	-0/+130
2018-01-26	clk: aspeed: Register core clocks	Joel Stanley	1	-0/+177
2018-01-26	clk: Add clock driver for ASPEED BMC SoCs	Joel Stanley	1	-0/+141