Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-10-23 | clk: oxnas: Add OX820 Gate clocks | 1 | -0/+58 | |
2016-10-23 | clk: oxnas: Refactor to make use of devm_clk_hw_register() | 1 | -64/+84 | |
2016-10-23 | clk: oxnas: Rename to clk_oxnas_gate | 1 | -16/+16 | |
2016-07-06 | clk: oxnas: make it explicitly non-modular | 1 | -12/+3 | |
2016-06-20 | clk: Fix return value check in oxnas_stdclk_probe() | 1 | -2/+2 | |
2016-04-21 | clk: Add Oxford Semiconductor OXNAS Standard Clocks | 1 | -0/+195 |