Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-05-15 | clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC | 1 | -0/+17 | |
2018-03-12 | clk: hi3798cv200: add emmc sample and drive clock | 1 | -0/+20 | |
2018-02-27 | clk: hi3798cv200: add COMBPHY0 clock support | 1 | -4/+11 | |
2018-02-27 | clk: hi3798cv200: fix define indentation | 1 | -24/+24 | |
2018-02-27 | clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK | 1 | -0/+2 | |
2018-02-27 | clk: hi3798cv200: correct IR clock parent | 1 | -1/+1 | |
2018-02-27 | clk: hi3798cv200: fix unregister call sequence in error path | 1 | -7/+6 | |
2017-11-14 | clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' | 1 | -1/+11 | |
2017-06-21 | clk: hisilicon: add usb2 clocks for hi3798cv200 SoC | 1 | -0/+21 | |
2016-11-11 | clk: hisilicon: add CRG driver for Hi3798CV200 SoC | 1 | -0/+337 |