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path: root/drivers/clk/imx/clk-imx7d.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2017-11-02clk: imx: imx7d: Remove ARM_M0 clockAdriana Reus1-9/+0
2017-11-02clk: imx: imx7d: Fix parent clock for OCRAM_CLKAdriana Reus1-1/+1
2017-08-30clk: imx: constify clk_div_tableArvind Yadav1-2/+2
2017-06-19clk: imx7d: create clocks behind rawnand clock gateStefan Agner1-2/+4
2017-06-01clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam1-1/+1
2017-04-19clk: imx7d: fix USDHC NAND clockStefan Agner1-2/+1
2017-04-19clk: imx7d: add the missing ipg_root_clkDong Aisheng1-1/+2
2017-04-19clk: clk-imx7d: fix ahb clk definitionDong Aisheng1-3/+2
2017-01-20clk: imx7d: Add the OCOTP clockFabio Estevam1-0/+1
2016-08-30clk: imx7d: Add PLL_AUDIO_TEST_DIV/POST_DIV clocksFabio Estevam1-40/+61
2016-08-19clk: imx7d: Add SAI IPG clocksFabio Estevam1-3/+10
2016-08-19clk: imx7d: Add the clock for SDMAFabio Estevam1-0/+1
2016-08-11clk: imx7d: do not set the parent of IMX7D_ENET_AXI_ROOT_SRCFabio Estevam1-2/+0
2016-07-12clk: imx7d: do not set parent of ethernet time/ref clocksStefan Agner1-9/+0
2016-07-01clk: imx7d: only enable minimum required clocksDong Aisheng1-8/+10
2016-07-01clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLEDong Aisheng1-357/+357
2016-06-12clk: imx: fix pll clock parentsDong Aisheng1-6/+6
2016-06-12clk: imx7d: correct dram pll typeAnson Huang1-1/+1
2016-06-12clk: imx7d: correct dram root clk parent selectAnson Huang1-1/+1
2016-05-03clk: imx7d: fix ahb clock mux 1Stefan Agner1-1/+1
2016-04-06clk: imx: add ckil clock for i.MX7Gary Bisson1-1/+2
2015-12-02clk: imx: Replace clk error check with imx_check_clocks()Bai Ping1-4/+1
2015-12-02clk: imx: Add a virtual arm clk on i.mx7dBai Ping1-0/+6
2015-10-09clk: imx7d: add ADC root clockHaibo Chen1-0/+1
2015-09-25clk: imx7d: retain early UART clocks during kernel initLucas Stach1-0/+13
2015-06-03ARM: imx: add imx7d clk tree supportFrank Li1-0/+860