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path: root/drivers/clk/imx (follow)
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2019-12-11clk: imx: pllv2: Switch to clk_hw based APIAbel Vesa2-6/+13
2019-12-11clk: imx: pllv1: Switch to clk_hw based APIAbel Vesa2-6/+13
2019-12-11clk: imx: Replace all the clk based helpers with macrosAbel Vesa1-27/+12
2019-12-11clk: imx: Rename the SCCG to SSCGAbel Vesa4-81/+81
2019-12-11clk: imx: Add correct failure handling for clk based helpersAbel Vesa1-15/+22
2019-12-11clk: imx8qxp-lpcg: Warn against devm_platform_ioremap_resourceLeonard Crestez1-0/+11
2019-12-11clk: imx: pll14xx: fix clk_pll14xx_wait_lockPeng Fan1-1/+1
2019-12-11clk: imx8mn: correct the usb1_ctrl parent to be usb_busLi Jun1-1/+1
2019-12-09clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_tablePeng Fan1-0/+1
2019-12-09clk: imx8m: Suppress bind attrsLeonard Crestez3-0/+15
2019-12-09clk: imx7ulp: Fix watchdog2 clock name typoFabio Estevam1-1/+1
2019-12-09clk: imx6q: disable non functional dividerJan Remmet1-1/+4
2019-12-09clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHELeonard Crestez4-2/+10
2019-12-09clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocksLeonard Crestez3-8/+23
2019-12-09clk: imx: clk-composite-8m: add lock to gate/muxPeng Fan1-0/+2
2019-12-09clk: imx: clk-divider-gate: drop redundant initializationPeng Fan1-4/+4
2019-12-09clk: imx: clk-divider-gate: fix a typo in commentPeng Fan1-1/+1
2019-12-01Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds10-301/+208
2019-11-27Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-nextStephen Boyd10-287/+208
2019-11-04clk: imx: imx8mq: fix sys3_pll_out_selsPeng Fan1-2/+2
2019-10-28clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clockFancy Fang1-2/+1
2019-10-28clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARMLeonard Crestez2-2/+2
2019-10-28clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify codePeng Fan1-4/+4
2019-10-28clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify codePeng Fan1-6/+6
2019-10-28clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify codePeng Fan1-4/+4
2019-10-28clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify codePeng Fan1-2/+2
2019-10-26clk: imx7ulp: Correct DDR clock mux optionsAnson Huang1-2/+2
2019-10-26clk: imx7ulp: Correct system clock source option #7Anson Huang1-1/+1
2019-10-25clk: imx: imx8mq: mark sys1/2_pll as fixed clockPeng Fan1-6/+2
2019-10-25clk: imx: imx8mn: mark sys_pll1/2 as fixed clockPeng Fan1-26/+20
2019-10-25clk: imx: imx8mm: mark sys_pll1/2 as fixed clockPeng Fan1-26/+20
2019-10-25clk: imx8mn: Define gates for pll1/2 fixed dividersLeonard Crestez1-19/+38
2019-10-25clk: imx8mm: Define gates for pll1/2 fixed dividersLeonard Crestez1-19/+38
2019-10-25clk: imx8mq: Define gates for pll1/2 fixed dividersLeonard Crestez1-20/+41
2019-10-16clk: imx: imx8mn: drop unused pll enumPeng Fan1-14/+0
2019-10-14clk: imx: clk-pll14xx: Make two variables staticYueHaibing1-2/+2
2019-10-14clk: imx8mq: Add VIDEO2_PLL clockLaurentiu Palcu1-0/+4
2019-10-06clk: imx8mn: Use common 1443X/1416X PLL clock structureAnson Huang2-79/+12
2019-10-06clk: imx8mm: Move 1443X/1416X PLL clock structure to common placeAnson Huang3-77/+43
2019-10-06clk: imx: pll14xx: Fix quick switch of S/K parameterLeonard Crestez1-32/+8
2019-09-17clk: imx: imx8mn: fix pll mux bitPeng Fan1-22/+10
2019-09-17clk: imx: imx8mm: fix pll mux bitPeng Fan1-22/+10
2019-09-17clk: imx: clk-pll14xx: unbypass PLL by defaultPeng Fan1-0/+5
2019-09-17clk: imx: pll14xx: avoid glitch when set ratePeng Fan1-1/+21
2019-08-24clk: imx: imx8mn: fix audio pll settingPeng Fan1-2/+2
2019-08-19clk: imx8mn: Add necessary frequency support for ARM PLL tableAnson Huang1-0/+2
2019-08-19clk: imx8mn: Add missing rate_count assignment for each PLL structureAnson Huang1-0/+7
2019-08-19clk: imx8mn: fix int pll clk gatePeng Fan1-6/+6
2019-08-19clk: imx8mn: Add GIC clockLeonard Crestez1-0/+5
2019-08-19clk: imx8mn: Fix incorrect parentsLeonard Crestez1-7/+7