| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-08-12 | clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro |   Paul Cercueil | 1 | -1/+1 |
| 2019-06-25 | clk: ingenic: Handle setting the Low-Power Mode bit | Paul Cercueil | 1 | -0/+3 |
| 2019-06-07 | clk: ingenic/jz4725b: Fix "pll half" divider not read/written properly | Paul Cercueil | 1 | -1/+8 |
| 2019-06-07 | clk: ingenic/jz4725b: Fix incorrect dividers for main clocks | Paul Cercueil | 1 | -5/+24 |
| 2019-04-11 | clk: ingenic: jz4725b: Add UDC PHY clock | Paul Cercueil | 1 | -0/+6 |
| 2018-10-16 | clk: Add Ingenic jz4725b CGU driver | Paul Cercueil | 1 | -0/+225 |
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index : linux-dev | |
| Linux kernel development work - see feature branches | Jason A. Donenfeld |
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