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path: root/drivers/clk/mediatek (follow)
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2022-10-17clk: mediatek: clk-mt8195-topckgen: Fix error return code in clk_mt8195_topck_probe()Yang Yingliang1-1/+3
2022-10-14Merge branch 'clk-rate-range' into clk-nextStephen Boyd1-0/+10
2022-10-14clk: mediatek: clk-mux: Add .determine_rate() callbackAngeloGioacchino Del Regno1-0/+10
2022-09-30clk: mediatek: add driver for MT8365 SoCFabien Parent9-0/+1614
2022-09-30clk: mediatek: Export required common code symbolsMarkus Schneider-Pargmann1-0/+2
2022-09-30clk: mediatek: Provide mtk_devm_alloc_clk_dataMarkus Schneider-Pargmann2-5/+30
2022-09-29clk: mediatek: mt8192: deduplicate parent clock listsChen-Yu Tsai1-181/+25
2022-09-29clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()Chen-Yu Tsai1-5/+5
2022-09-29clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanupChen-Yu Tsai1-1/+1
2022-09-29clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_selAngeloGioacchino Del Regno1-0/+28
2022-09-29clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parentAngeloGioacchino Del Regno1-2/+4
2022-09-29clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parentsAngeloGioacchino Del Regno1-3/+6
2022-09-29clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifierAngeloGioacchino Del Regno1-0/+20
2022-09-29clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic muxAngeloGioacchino Del Regno1-12/+7
2022-09-29clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changesAngeloGioacchino Del Regno1-2/+4
2022-09-29clk: mediatek: mt8183: Add clk mux notifier for MFG muxChen-Yu Tsai1-0/+28
2022-09-29clk: mediatek: mux: add clk notifier functionsChen-Yu Tsai2-0/+53
2022-09-29clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parentChen-Yu Tsai1-3/+3
2022-09-26clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probeYassine Oudjana1-1/+2
2022-09-26clk: mediatek: gate: Export mtk_clk_register_gates_with_devYassine Oudjana1-0/+1
2022-09-26clk: mediatek: add VDOSYS1 clockPablo Sun1-0/+11
2022-09-26clk: mediatek: mt8192: add mtk_clk_simple_removeMiles Chen10-0/+10
2022-09-26clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driverMiles Chen9-137/+108
2022-09-26clk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driverMiles Chen3-69/+39
2022-09-26clk: mediatek: mt6779: use mtk_clk_simple_probe to simplify driverMiles Chen7-111/+90
2022-09-26clk: mediatek: mt6765: use mtk_clk_simple_probe to simplify driverMiles Chen6-129/+72
2022-09-26clk: mediatek: mt2712: use mtk_clk_simple_probe to simplify driverMiles Chen6-132/+72
2022-09-26clk: mediatek: mt2701: use mtk_clk_simple_probe to simplify driverMiles Chen3-69/+39
2022-09-26clk: mediatek: Add MediaTek Helio X10 MT6795 clock driversAngeloGioacchino Del Regno10-0/+1408
2022-09-26clk: mediatek: clk-apmixed: Add helper function to unregister ref2usb_txAngeloGioacchino Del Regno2-0/+10
2022-09-26clk: mediatek: Export required symbols to compile clk drivers as moduleAngeloGioacchino Del Regno4-0/+6
2022-09-26clk: mediatek: clk-apmixed: Remove unneeded __init annotationAngeloGioacchino Del Regno1-1/+1
2022-08-31clk: mediatek: mt8195: Add reset idx for USB/PCIe T-PHYAngeloGioacchino Del Regno1-0/+1
2022-08-31clk: mediatek: mt8195-infra_ao: Set pwrmcu clocks as criticalAngeloGioacchino Del Regno1-3/+10
2022-08-31clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1AngeloGioacchino Del Regno1-0/+2
2022-08-31clk: mediatek: clk-mt8195-vdo1: Reparent and set rate on vdo1_dpintf's parentAngeloGioacchino Del Regno1-1/+5
2022-08-31clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parentAngeloGioacchino Del Regno1-1/+6
2022-06-15clk: mediatek: reset: Add infra_ao reset support for MT8186Rex-BC Chen1-0/+23
2022-06-15clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195Rex-BC Chen4-6/+60
2022-06-15clk: mediatek: reset: Add reset support for simple probeRex-BC Chen2-0/+8
2022-06-15clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen13-16/+86
2022-06-15clk: mediatek: reset: Change return type for clock reset register functionRex-BC Chen2-8/+13
2022-06-15clk: mediatek: reset: Support inuput argument index modeRex-BC Chen2-1/+25
2022-06-15clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen15-43/+85
2022-06-15clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen15-40/+186
2022-06-15clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen15-46/+61
2022-06-15clk: mediatek: reset: Extract common drivers to update functionRex-BC Chen1-16/+22
2022-06-15clk: mediatek: reset: Refine and reorder functions in reset.cRex-BC Chen1-32/+36
2022-06-15clk: mediatek: reset: Fix written reset bit offsetRex-BC Chen1-2/+2
2022-06-15clk: mediatek: reset: Add reset.hRex-BC Chen3-14/+27