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path: root/drivers/clk/mediatek/clk-mt2701.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner1-9/+1
2019-02-25clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_selchunhui dai1-2/+2
2018-08-30clk: mediatek: remove unused array audio_parentsColin Ian King1-5/+0
2018-05-15clk: mediatek: correct the clocks for MT2701 HDMI PHY moduleRyder Lee1-2/+6
2018-03-19clk: mediatek: fix PWM clock source by adding a fixed-factor clockSean Wang1-7/+8
2017-11-02clk: mediatek: mark mtk_infrasys_init_early __initArnd Bergmann1-1/+1
2017-06-19clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCsSean Wang1-0/+8
2016-11-08reset: mediatek: Add MT2701 reset driverShunli Wang1-2/+10
2016-11-08clk: mediatek: Add MT2701 clock supportShunli Wang1-0/+1027