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Jason A. Donenfeld
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path:
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drivers
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clk
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renesas
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r8a77995-cpg-mssr.c
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Age
Commit message (
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Author
Files
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2019-06-18
clk: renesas: r8a77995: Add CMM clocks
Jacopo Mondi
1
-0
/
+2
2019-04-02
clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC
Takeshi Kihara
1
-1
/
+1
2018-12-04
clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
Geert Uytterhoeven
1
-2
/
+2
2018-12-04
clk: renesas: r8a77995: Add missing CPEX clock
Geert Uytterhoeven
1
-1
/
+2
2018-12-04
clk: renesas: r8a77995: Remove non-existent SSP clocks
Geert Uytterhoeven
1
-1
/
+0
2018-12-04
clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
Geert Uytterhoeven
1
-3
/
+0
2018-12-04
clk: renesas: r8a77995: Correct parent clock of DU
Geert Uytterhoeven
1
-2
/
+2
2018-10-18
Merge branch 'clk-renesas' into clk-next
Stephen Boyd
1
-2
/
+10
2018-08-30
clk: renesas: use SPDX identifier for Renesas drivers
Wolfram Sang
1
-4
/
+1
2018-08-27
clk: renesas: r8a77995: Correct RCLK handling
Geert Uytterhoeven
1
-2
/
+10
2017-10-16
clk: renesas: r8a77995: Correct parent clock of INTC-AP
Geert Uytterhoeven
1
-1
/
+1
2017-08-16
clk: renesas: cpg-mssr: Add R8A77995 support
Geert Uytterhoeven
1
-0
/
+236