| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-09-11 | clk: renesas: r9a06g032: Fix UART34567 clock rate |   Phil Edworthy | 1 | -1/+2 |
| 2018-06-25 | clk: renesas: Renesas R9A06G032 clock driver |   Michel Pollet | 1 | -0/+893 |
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index : linux-dev | |
| Linux kernel development work - see feature branches | Jason A. Donenfeld |
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