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path: root/drivers/clk/rockchip (follow)
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2014-11-28Merge tag 'v3.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-nextMichael Turquette7-50/+302
2014-11-28clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan5-0/+198
2014-11-28clk: rockchip: rk3288 export i2s0_clkout for use in DTSonny Rao1-1/+1
2014-11-26clk: rockchip: use clock ID for DMC (memory controller) on rk3288Jeff Chen1-4/+4
2014-11-25clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some pllsHeiko Stuebner2-5/+5
2014-11-25clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner2-0/+56
2014-11-25clk: rockchip: setup pll_mux data earlierHeiko Stuebner1-14/+13
2014-11-25clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner5-13/+19
2014-11-24Merge branch 'clk-fixes' into clk-nextMichael Turquette1-3/+1
2014-11-23clk: rockchip: fix rk3188 USB HSIC PHY clock dividerJulien CHAUVEAU1-1/+1
2014-11-23clk: rockchip: fix clock gate for rk3188 spdif_preJulien CHAUVEAU1-16/+9
2014-11-18clk: rockchip: fix parent clock for rk3188 hclk_lcdc1Julien CHAUVEAU1-1/+1
2014-11-17clk-divider: Fix READ_ONLY when divider > 1James Hogan1-3/+1
2014-11-16clk: rockchip: fix clock select order for rk3288 usbphy480m_srcKever Yang1-2/+2
2014-11-16clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in registerKever Yang1-1/+1
2014-11-13clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabledDmitry Torokhov1-2/+2
2014-11-10clk: rockchip: rk3288: add suspend and resumeChris Zhong1-0/+60
2014-11-07clk: rockchip: fix rk3188 hsadc_frac definitionHeiko Stübner1-2/+2
2014-11-04clk: rockchip: disable unused clocksKever Yang3-92/+83
2014-10-29clk: rockchip: change PLL setting for better clock jitterKever Yang2-1/+10
2014-10-20clk: rockchip: add npll to source of sclk_gpuKever Yang1-4/+4
2014-10-20clk: rockchip: rk3288: removing the CLK_SET_RATE_PARENT from i2s_clkoutJianqun1-1/+1
2014-10-20clk: rockchip: add 400MHz and 500MHz for rk3288 clock rateKever Yang1-0/+2
2014-10-20clk: rockchip: Add CLK_SET_RATE_PARENT to aclk_cpu_preDoug Anderson1-1/+1
2014-10-20clk: rockchip: fix parent for spdif_8ch_frac on rk3288Sonny Rao1-1/+1
2014-10-01clk: rockchip: add restart handlerHeiko Stübner4-0/+30
2014-10-01clk: rockchip: rk3288: i2s_frac adds flag to set parent's rateJianqun1-4/+4
2014-09-27clk: rockchip: switch to using the new cpuclk type for armclkHeiko Stuebner2-6/+169
2014-09-27clk: rockchip: add new clock-type for the cpuclkHeiko Stuebner4-0/+388
2014-09-27clk: rockchip: make tightly bound armclk child-clocks read-onlyHeiko Stuebner2-17/+27
2014-09-27clk: rockchip: reparent aclk_cpu_pre to the gpllHeiko Stuebner1-0/+21
2014-09-27clk: rockchip: fix rk3288 pll status register locationJianqun1-2/+2
2014-09-27clk: rockchip: fix rk3066 pll status register locationHeiko Stuebner1-3/+7
2014-09-27clk: rockchip: change pll rate without a clk-notifierDoug Anderson1-50/+13
2014-09-25Merge branch 'clk-next-rockchip' into clk-nextMike Turquette1-36/+56
2014-09-25clk: rockchip: add clock node in PD_VIDEOKever Yang1-0/+20
2014-09-25clk: rockchip: use the clock id for nodes initKever Yang1-34/+34
2014-09-25clk: rockchip: add missing rk3288 npll rate tableHeiko Stübner1-1/+1
2014-09-25clk: rockchip: rk3288: fix softreset register countMark yao1-1/+1
2014-09-17Merge branch 'clk-fixes' into clk-nextMike Turquette1-2/+2
2014-09-10clk: rockchip: also protect hclk_peri as criticalHeiko Stübner2-0/+2
2014-09-03clk: rockchip: Fix the clocks for i2c1 and i2c2Doug Anderson1-2/+2
2014-09-02clk: rockchip: protect critical clocks from getting disabledHeiko Stübner4-0/+28
2014-09-02clk: rockchip: make rockchip_clk_register_branch staticHeiko Stübner1-1/+1
2014-09-02clk: rockchip: implement the fraction divider branch typeHeiko Stübner1-2/+56
2014-07-13clk: rockchip: add clock controller for rk3288Heiko Stübner3-0/+727
2014-07-13clk: rockchip: add clock driver for rk3188 and rk3066 clocksHeiko Stübner2-0/+674
2014-07-13clk: rockchip: add reset controllerHeiko Stübner3-0/+133
2014-07-13clk: rockchip: add clock type for pll clocks and pll used on rk3066Heiko Stübner4-0/+541
2014-07-13clk: rockchip: add basic infrastructure for clock branchesHeiko Stübner3-0/+460