linux-dev - Linux kernel development work

Age	Commit message (Expand)	Author	Files	Lines
2014-01-28	Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux	Linus Torvalds	1	-1/+1
2014-01-23	Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux	Linus Torvalds	5	-1164/+1282
2014-01-23	Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc	Linus Torvalds	1	-1/+2
2014-01-20	Merge branch 'for-next' into for-linus	Takashi Iwai	1	-2/+2
2014-01-17	clk: samsung: Remove unneeded semicolon	Sachin Kamat	1	-1/+1
2014-01-08	clk: exynos-audss: add support for Exynos 5420	Andrew Bresticker	1	-7/+33
2014-01-08	clk: exynos5250: add clock ID for div_pcm0	Andrew Bresticker	1	-1/+1
2014-01-08	clk: exynos-audss: allow input clocks to be specified in device tree	Andrew Bresticker	1	-5/+20
2014-01-08	clk: exynos-audss: convert to platform device	Andrew Bresticker	1	-16/+88
2014-01-08	clk: exynos5440: replace clock ID private enums with IDs from DT header	Andrzej Hajda	1	-47/+34
2014-01-08	clk: exynos5420: replace clock ID private enums with IDs from DT header	Andrzej Hajda	1	-339/+309
2014-01-08	clk: exynos5250: replace clock ID private enums with IDs from DT header	Andrzej Hajda	1	-295/+264
2014-01-08	clk: exynos4: replace clock ID private enums with IDs from DT header	Andrzej Hajda	1	-455/+402
2014-01-08	clk: exynos5250: register APLL rate table	Andrew Bresticker	1	-1/+24
2013-12-30	clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll	Sachin Kamat	1	-1/+2
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from MFC domain	Tomasz Figa	1	-3/+5
2013-12-30	clk: samsung: exynos5250: Correct parent list of audio muxes	Tomasz Figa	1	-3/+3
2013-12-30	clk: samsung: exynos5250: Add missing unpopulated mux parents	Tomasz Figa	1	-4/+12
2013-12-30	clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domain	Tomasz Figa	1	-6/+8
2013-12-30	clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain	Tomasz Figa	1	-8/+17
2013-12-30	clk: samsung: exynos5250: Make names of mux and div clocks consistent	Tomasz Figa	1	-122/+123
2013-12-30	clk: samsung: exynos5250: Sort definitions by registers and bitfield	Tomasz Figa	1	-102/+188
2013-12-30	Merge branch 'samsung-fixes' into samsung-next-base	Tomasz Figa	3	-11/+15
2013-12-30	clk: exynos: File scope reg_save array should depend on PM_SLEEP	Krzysztof Kozlowski	1	-5/+5
2013-12-30	clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock	Abhilash Kesavan	1	-1/+2
2013-12-30	clk: samsung: exynos5250: Add MDMA0 clocks	Abhilash Kesavan	1	-1/+4
2013-12-30	clk: samsung: exynos5250: Fix ACP gate register offset	Abhilash Kesavan	1	-1/+1
2013-12-30	clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks	Andrew Bresticker	1	-2/+2
2013-12-30	clk: samsung: exynos4: Correct SRC_MFC register	Seung-Woo Kim	1	-1/+1
2013-12-21	clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider	Tomasz Figa	1	-1/+2
2013-12-04	clk: exynos5420: fix cpll clock register offsets	Chander Kashyap	1	-2/+2
2013-11-24	clk: samsung: s3c64xx: Remove clock aliases of old DMA driver	Tomasz Figa	1	-2/+0
2013-11-24	clk: samsung: s3c64xx: Add aliases for DMA clocks	Tomasz Figa	1	-0/+2
2013-09-17	ARM: S3C64XX: Migrate clock handling to Common Clock Framework	Tomasz Figa	1	-2/+0
2013-09-09	Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux	Linus Torvalds	11	-508/+1702
2013-09-06	clk: samsung: exynos5250: Simplify registration of PLL rate tables	Tomasz Figa	1	-10/+2
2013-09-06	clk: samsung: exynos4: Register PLL rate tables for Exynos4x12	Tomasz Figa	1	-0/+49
2013-09-06	clk: samsung: exynos4: Register PLL rate tables for Exynos4210	Tomasz Figa	1	-0/+45
2013-09-06	clk: samsung: exynos4: Reorder registration of mout_vpllsrc	Tomasz Figa	1	-1/+7
2013-09-06	clk: samsung: pll: Add support for rate configuration of PLL46xx	Tomasz Figa	2	-1/+135
2013-09-06	clk: samsung: pll: Use new registration method for PLL46xx	Tomasz Figa	3	-65/+14
2013-09-06	clk: samsung: pll: Add support for rate configuration of PLL45xx	Tomasz Figa	2	-1/+119
2013-09-06	clk: samsung: pll: Use new registration method for PLL45xx	Tomasz Figa	3	-62/+20
2013-09-06	clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls	Tomasz Figa	1	-3/+3
2013-09-06	clk: samsung: exynos4: Remove checks for DT node	Tomasz Figa	1	-7/+4
2013-09-06	clk: samsung: exynos4: Remove unused static clkdev aliases	Tomasz Figa	1	-184/+172
2013-09-06	clk: samsung: Modify _get_rate() helper to use __clk_lookup()	Tomasz Figa	3	-9/+7
2013-09-06	clk: samsung: exynos4: Use separate aliases for cpufreq related clocks	Tomasz Figa	1	-8/+27
2013-08-29	clk/exynos5420: assign dout_pixel id to pixel clock divider	Rahul Sharma	1	-1/+4
2013-08-29	clk/exynos5420: add hdmi mux to change parents in hdmi driver	Rahul Sharma	1	-1/+4