Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-07-17 | Update Viresh Kumar's email address | 1 | -1/+1 | |
2012-11-21 | CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks | 1 | -1/+2 | |
2012-06-20 | Viresh has moved | 1 | -1/+1 | |
2012-05-12 | SPEAr: clk: Add Auxiliary Synthesizer clock | 1 | -0/+198 |