| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-06-10 | treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE (part 2) |   Thomas Gleixner | 1 | -4/+1 |
| 2015-07-17 | Update Viresh Kumar's email address |   Viresh Kumar | 1 | -1/+1 |
| 2012-11-21 | CLK: SPEAr: Correct index scanning done for clock synths |   Deepak Sikri | 1 | -0/+3 |
| 2012-06-20 | Viresh has moved |   Viresh Kumar | 1 | -1/+1 |
| 2012-05-12 | SPEAr: clk: Add VCO-PLL Synthesizer clock |   Viresh Kumar | 1 | -0/+36 |
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index : linux-dev | |
| Linux kernel development work - see feature branches | Jason A. Donenfeld |
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