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path: root/drivers/clk/st/clkgen-fsyn.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2016-09-16drivers: clk: st: Add fs660c32 synthesizer algorithmGabriel Fernandez1-69/+111
2016-09-16drivers: clk: st: Simplify clock binding of STiH4xx platformsGabriel Fernandez1-24/+17
2016-09-16drivers: clk: st: Remove stih415-416 clock supportGabriel Fernandez1-260/+0
2016-06-30clk: st: clkgen-fsyn: Detect critical clocksLee Jones1-3/+7
2016-01-29clk: st: avoid uninitialized variable useArnd Bergmann1-2/+6
2015-11-20clk: st: avoid uninitialized variable useArnd Bergmann1-8/+9
2015-09-17drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_xGabriel Fernandez1-4/+4
2015-08-24clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd1-9/+9
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd1-0/+1
2015-07-20clk: st: Include clk.hStephen Boyd1-0/+1
2015-07-07drivers: clk: st: Incorrect register offset used for lock_statusPankaj Dev1-1/+1
2015-07-06drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocksPankaj Dev1-1/+1
2015-07-06drivers: clk: st: Fix FSYN channel valuesGabriel Fernandez1-2/+2
2015-07-06drivers: clk: st: Remove unused codeGabriel Fernandez1-4/+0
2015-05-14clk: st: Silence sparse warningsStephen Boyd1-2/+2
2015-04-01clk: constify of_device_id arrayFabian Frederick1-1/+1
2014-07-28clk: st: Update frequency tables for fs660c32 and fs432c65Gabriel FERNANDEZ1-8/+59
2014-07-28clk: st: STiH407: Support for clockgenD0/D2/D3Gabriel FERNANDEZ1-0/+46
2014-07-28clk: st: STiH407: Support for clockgenC0Gabriel FERNANDEZ1-0/+51
2014-07-28clk: st: Add quadfs reset handlingGabriel FERNANDEZ1-0/+5
2014-07-28clk: st: Add polarity bit indicationGabriel FERNANDEZ1-5/+7
2014-07-28clk: st: Remove uncessary (void *) castGabriel FERNANDEZ1-4/+4
2014-07-28clk: st: use static const for stm_fs tablesGabriel FERNANDEZ1-17/+17
2014-03-25clk: st: Support for QUADFS inside ClockGenB/C/D/E/FGabriel FERNANDEZ1-0/+1039
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