Age | Commit message (Expand) | Author | Files | Lines |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 28 | -252/+28 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 15 | -150/+15 |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 13 | -65/+13 |
2019-05-21 | treewide: Add SPDX license identifier - Makefile/Kconfig | ![](https://seccdn.libravatar.org/avatar/655933b9bf9ea16efc37f6cf1438efaa?s=13&d=retro) Thomas Gleixner | 1 | -0/+1 |
2019-05-15 | clk: Remove io.h from clk-provider.h | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 26 | -0/+26 |
2019-05-07 | Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 2 | -3/+3 |
2019-05-07 | Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and 'clk-qoriq' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 6 | -13/+23 |
2019-05-01 | clk: sunxi-ng: Use the correct style for SPDX License Identifier | ![](https://seccdn.libravatar.org/avatar/65998cdf9f777607757b5edc0643311f?s=13&d=retro) Nishad Kamdar | 2 | -3/+3 |
2019-04-10 | clk: sunxi-ng: sun5i: Export the MBUS clock | ![](https://seccdn.libravatar.org/avatar/2ff4e08c2d612705ad5a1ad49d3b15cd?s=13&d=retro) Maxime Ripard | 1 | -4/+0 |
2019-04-09 | clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -2/+3 |
2019-04-04 | clk: sunxi-ng: nkmp: Explain why zero width check is needed | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -0/+6 |
2019-04-04 | clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -3/+3 |
2019-04-03 | clk: sunxi-ng: h6: Preset hdmi-cec clock parent | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -0/+11 |
2019-04-03 | clk: sunxi-ng: nkmp: Avoid GENMASK(-1, 0) | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -5/+13 |
2019-03-18 | clk: sunxi-ng: f1c100s: fix USB PHY gate bit offset | ![](https://seccdn.libravatar.org/avatar/5790f361e9779d46970177927322cef7?s=13&d=retro) Icenowy Zheng | 1 | -1/+1 |
2019-03-18 | clk: sunxi-ng: Allow DE clock to set parent rate | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 3 | -3/+5 |
2019-03-08 | Merge branches 'clk-optional', 'clk-devm-clkdev-register', 'clk-allwinner', 'clk-meson' and 'clk-renesas' into clk-next | ![](https://seccdn.libravatar.org/avatar/8c6b7eae8dbc6e6ed2f41596b1254753?s=13&d=retro) Stephen Boyd | 1 | -1/+1 |
2019-01-28 | clk: sunxi: A31: Fix wrong AHB gate number | ![](https://seccdn.libravatar.org/avatar/3e4f28ff580d6746a4daff30b6997906?s=13&d=retro) Andre Przywara | 1 | -2/+2 |
2019-01-25 | clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -1/+1 |
2019-01-22 | clk: sunxi-ng: v3s: Fix TCON reset de-assert bit | ![](https://seccdn.libravatar.org/avatar/23bad33b46857266cdec755f4f185b4f?s=13&d=retro) Paul Kocialkowski | 1 | -1/+1 |
2018-12-10 | clk: sunxi-ng: a64: Allow parent change for VE clock | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -1/+1 |
2018-12-05 | clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -3/+3 |
2018-12-05 | clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -13/+24 |
2018-12-04 | clk: sunxi-ng: h3: Allow parent change for ve clock | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -1/+1 |
2018-12-04 | clk: sunxi-ng: add support for suniv F1C100s SoC | ![](https://seccdn.libravatar.org/avatar/9b8486a8d25df9cadef35c019d79f336?s=13&d=retro) Mesih Kilinc | 4 | -0/+581 |
2018-12-03 | clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -1/+1 |
2018-11-30 | clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -0/+11 |
2018-11-23 | clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -13/+24 |
2018-11-13 | clk: sunxi-ng: a64: Fix gate bit of DSI DPHY | ![](https://seccdn.libravatar.org/avatar/c4197474071144a5e59b188f17c9a6d3?s=13&d=retro) Jagan Teki | 1 | -1/+1 |
2018-11-13 | clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I | ![](https://seccdn.libravatar.org/avatar/c4197474071144a5e59b188f17c9a6d3?s=13&d=retro) Jagan Teki | 1 | -0/+1 |
2018-11-05 | clk: sunxi-ng: Add support for H6 DE3 clocks | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 2 | -4/+71 |
2018-11-05 | clk: sunxi-ng: h6: Set video PLLs limits | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -0/+4 |
2018-11-05 | clk: sunxi-ng: Use u64 for calculation of NM rate | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -3/+15 |
2018-11-05 | clk: sunxi-ng: Adjust MP clock parent rate when allowed | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -2/+62 |
2018-11-05 | clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width | ![](https://seccdn.libravatar.org/avatar/c4197474071144a5e59b188f17c9a6d3?s=13&d=retro) Jagan Teki | 1 | -3/+3 |
2018-11-05 | clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock | ![](https://seccdn.libravatar.org/avatar/5790f361e9779d46970177927322cef7?s=13&d=retro) Icenowy Zheng | 1 | -1/+6 |
2018-10-31 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 10 | -86/+143 |
2018-09-07 | clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting | ![](https://seccdn.libravatar.org/avatar/53e17915a0ebda94220596c4137b83fa?s=13&d=retro) Chen-Yu Tsai | 1 | -1/+9 |
2018-09-05 | dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro | ![](https://seccdn.libravatar.org/avatar/c4197474071144a5e59b188f17c9a6d3?s=13&d=retro) Jagan Teki | 1 | -1/+3 |
2018-09-05 | clk: sunxi-ng: a64: Add max. rate constraint to video PLLs | ![](https://seccdn.libravatar.org/avatar/5790f361e9779d46970177927322cef7?s=13&d=retro) Icenowy Zheng | 1 | -24/+26 |
2018-09-05 | clk: sunxi-ng: a64: Add minimal rate for video PLLs | ![](https://seccdn.libravatar.org/avatar/c4197474071144a5e59b188f17c9a6d3?s=13&d=retro) Jagan Teki | 1 | -22/+24 |
2018-09-05 | clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks | ![](https://seccdn.libravatar.org/avatar/5790f361e9779d46970177927322cef7?s=13&d=retro) Icenowy Zheng | 1 | -20/+23 |
2018-08-27 | clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -0/+2 |
2018-08-27 | clk: sunxi-ng: nkmp: Add constraint for maximum rate | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 2 | -0/+8 |
2018-08-27 | clk: sunxi-ng: r40: Add max. rate constraint to video PLLs | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -26/+26 |
2018-08-27 | clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 1 | -12/+13 |
2018-08-27 | clk: sunxi-ng: Add maximum rate constraint to NM PLLs | ![](https://seccdn.libravatar.org/avatar/7a7bd521e623e0cde71c30119298ef3e?s=13&d=retro) Jernej Skrabec | 2 | -0/+37 |
2018-08-27 | clk: sunxi-ng: h6: fix PWM gate/reset offset | ![](https://seccdn.libravatar.org/avatar/b11f50d8a68d336e6221f97ad4baffbd?s=13&d=retro) Rongyi Chen | 1 | -1/+1 |
2018-08-27 | clk: sunxi-ng: h6: fix bus clocks' divider position | ![](https://seccdn.libravatar.org/avatar/5790f361e9779d46970177927322cef7?s=13&d=retro) Icenowy Zheng | 1 | -4/+4 |
2018-08-15 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux | ![](https://seccdn.libravatar.org/avatar/fb47627bc8c0bcdb36321edfbf02e916?s=13&d=retro) Linus Torvalds | 3 | -35/+42 |