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path: root/drivers/clk/sunxi-ng (follow)
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2018-08-15Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds3-35/+42
2018-06-27clk: sunxi-ng: add A64 compatible stringIcenowy Zheng1-7/+4
2018-06-27clk: sunxi-ng: r40: Export video PLLsJernej Skrabec1-2/+6
2018-06-27clk: sunxi-ng: r40: Allow setting parent rate to display related clocksJernej Skrabec1-4/+8
2018-06-27clk: sunxi-ng: r40: Add minimal rate for video PLLsJernej Skrabec1-22/+24
2018-06-21clk: sunxi-ng: replace lib-y with obj-yMasahiro Yamada1-24/+15
2018-05-17clk: sunxi-ng: r40: export a regmap to access the GMAC registerIcenowy Zheng1-0/+33
2018-05-17clk: sunxi-ng: r40: rewrite init code to a platform driverIcenowy Zheng1-11/+28
2018-05-04clk: sunxi-ng: add support for H6 PRCM CCUIcenowy Zheng4-0/+232
2018-04-13Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds10-35/+1375
2018-03-21clk: sunxi-ng: add missing hdmi-slow clock for H6 CCUIcenowy Zheng2-1/+5
2018-03-18clk: sunxi-ng: add support for the Allwinner H6 CCUIcenowy Zheng4-0/+1269
2018-03-18clk: sunxi-ng: Support fixed post-dividers on NKMP style clocksIcenowy Zheng2-3/+19
2018-03-02clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEOJernej Skrabec1-1/+3
2018-03-02clk: sunxi-ng: h3: h5: Allow some clocks to set parent rateJernej Skrabec1-3/+6
2018-03-02clk: sunxi-ng: h3: h5: Add minimal rate for video PLLJernej Skrabec1-11/+12
2018-03-02clk: sunxi-ng: Add check for minimal rate to NM PLLsJernej Skrabec2-0/+34
2018-02-19clk: sunxi-ng: a31: Fix CLK_OUT_* clock opsChen-Yu Tsai1-3/+3
2018-02-15clk: sunxi-ng: Use u64 for calculation of nkmp rateJernej Skrabec1-3/+18
2018-02-15clk: sunxi-ng: Mask nkmp factors when setting registerJernej Skrabec1-9/+12
2018-02-13clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig nameCorentin Labbe1-7/+0
2018-01-26Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-nextStephen Boyd7-43/+185
2018-01-26Merge branch 'clk-divider-container' into clk-nextStephen Boyd1-1/+1
2018-01-03clk: sunxi-ng: a83t: Add M divider to TCON1 clockJernej Škrabec1-2/+2
2017-12-29clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCUIcenowy Zheng1-3/+3
2017-12-29clk: sunxi-ng: add support for Allwinner H3 DE2 CCUIcenowy Zheng1-0/+47
2017-12-28clk: divider: fix incorrect usage of container_ofJerome Brunet1-1/+1
2017-12-21clk: move clock common macros out from vendor directoriesChunyan Zhang1-29/+0
2017-12-08clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-1/+10
2017-12-08clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLLChen-Yu Tsai1-3/+6
2017-12-08clk: sunxi-ng: Support fixed post-dividers on NM style clocksChen-Yu Tsai2-13/+39
2017-12-07clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocksChen-Yu Tsai1-20/+37
2017-12-07clk: sunxi-ng: Support fixed post-dividers on MP style clocksChen-Yu Tsai2-2/+42
2017-11-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds16-79/+453
2017-11-14clk: sunxi-ng: a83t: Fix i2c buses bitsMylene JOSSERAND1-2/+2
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman3-0/+3
2017-10-17clk: sunxi-ng: sun4i: Export video PLLsJonathan Liu1-2/+2
2017-10-17clk: sunxi-ng: Add A83T display clocksMaxime Ripard1-8/+13
2017-10-13clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: sun6i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-6/+19
2017-10-13clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-6/+20
2017-10-13clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+25
2017-10-13clk: sunxi-ng: nm: Add support for sigma-delta modulationChen-Yu Tsai2-1/+46
2017-10-13clk: sunxi-ng: Add sigma-delta modulation supportChen-Yu Tsai4-0/+240
2017-10-13clk: sunxi-ng: nm: Check if requested rate is supported by fractional clockChen-Yu Tsai1-0/+3
2017-10-13clk: sunxi-ng: sun5i: Fix bit offset of audio PLL post-dividerChen-Yu Tsai1-2/+2
2017-10-09clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offsetOndrej Jirman1-1/+1
2017-09-29clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collisionChen-Yu Tsai1-1/+1
2017-09-29clk: sunxi-ng: sun6i: Export video PLLsChen-Yu Tsai1-2/+6